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-rw-r--r--arch/mips/Kconfig4
-rw-r--r--arch/mips/Makefile2
-rw-r--r--arch/mips/arc/arc_con.c2
-rw-r--r--arch/mips/configs/ip27_defconfig13
-rw-r--r--arch/mips/kernel/binfmt_elfn32.c5
-rw-r--r--arch/mips/kernel/binfmt_elfo32.c5
-rw-r--r--arch/mips/kernel/irq-mv6434x.c8
-rw-r--r--arch/mips/kernel/linux32.c76
-rw-r--r--arch/mips/kernel/process.c158
-rw-r--r--arch/mips/kernel/scall32-o32.S4
-rw-r--r--arch/mips/kernel/scall64-n32.S6
-rw-r--r--arch/mips/kernel/scall64-o32.S4
-rw-r--r--arch/mips/kernel/setup.c3
-rw-r--r--arch/mips/kernel/signal-common.h2
-rw-r--r--arch/mips/kernel/signal32.c76
-rw-r--r--arch/mips/kernel/signal_n32.c35
-rw-r--r--arch/mips/kernel/smp.c22
-rw-r--r--arch/mips/kernel/smp_mt.c47
-rw-r--r--arch/mips/kernel/time.c5
-rw-r--r--arch/mips/kernel/traps.c4
-rw-r--r--arch/mips/kernel/vmlinux.lds.S4
-rw-r--r--arch/mips/lib/iomap.c2
-rw-r--r--arch/mips/mm/c-r4k.c120
-rw-r--r--arch/mips/mm/c-tx39.c70
-rw-r--r--arch/mips/mm/cex-sb1.S2
-rw-r--r--arch/mips/mm/tlbex.c34
-rw-r--r--arch/mips/momentum/jaguar_atx/prom.c2
-rw-r--r--arch/mips/momentum/jaguar_atx/setup.c5
-rw-r--r--arch/mips/momentum/ocelot_c/irq.c2
-rw-r--r--arch/mips/momentum/ocelot_c/prom.c2
-rw-r--r--arch/mips/momentum/ocelot_c/setup.c27
-rw-r--r--arch/mips/pci/pci-ocelot-c.c6
-rw-r--r--arch/mips/pmc-sierra/yosemite/smp.c26
-rw-r--r--arch/mips/sgi-ip27/ip27-smp.c7
-rw-r--r--arch/mips/sibyte/Kconfig4
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c5
-rw-r--r--arch/mips/sibyte/cfe/smp.c10
37 files changed, 338 insertions, 471 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 767de847b4ab..3a0f89d2c8dc 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1053,6 +1053,7 @@ config CPU_MIPS32_R1
1053 depends on SYS_HAS_CPU_MIPS32_R1 1053 depends on SYS_HAS_CPU_MIPS32_R1
1054 select CPU_HAS_PREFETCH 1054 select CPU_HAS_PREFETCH
1055 select CPU_SUPPORTS_32BIT_KERNEL 1055 select CPU_SUPPORTS_32BIT_KERNEL
1056 select CPU_SUPPORTS_HIGHMEM
1056 help 1057 help
1057 Choose this option to build a kernel for release 1 or later of the 1058 Choose this option to build a kernel for release 1 or later of the
1058 MIPS32 architecture. Most modern embedded systems with a 32-bit 1059 MIPS32 architecture. Most modern embedded systems with a 32-bit
@@ -1069,6 +1070,7 @@ config CPU_MIPS32_R2
1069 depends on SYS_HAS_CPU_MIPS32_R2 1070 depends on SYS_HAS_CPU_MIPS32_R2
1070 select CPU_HAS_PREFETCH 1071 select CPU_HAS_PREFETCH
1071 select CPU_SUPPORTS_32BIT_KERNEL 1072 select CPU_SUPPORTS_32BIT_KERNEL
1073 select CPU_SUPPORTS_HIGHMEM
1072 help 1074 help
1073 Choose this option to build a kernel for release 2 or later of the 1075 Choose this option to build a kernel for release 2 or later of the
1074 MIPS32 architecture. Most modern embedded systems with a 32-bit 1076 MIPS32 architecture. Most modern embedded systems with a 32-bit
@@ -1082,6 +1084,7 @@ config CPU_MIPS64_R1
1082 select CPU_HAS_PREFETCH 1084 select CPU_HAS_PREFETCH
1083 select CPU_SUPPORTS_32BIT_KERNEL 1085 select CPU_SUPPORTS_32BIT_KERNEL
1084 select CPU_SUPPORTS_64BIT_KERNEL 1086 select CPU_SUPPORTS_64BIT_KERNEL
1087 select CPU_SUPPORTS_HIGHMEM
1085 help 1088 help
1086 Choose this option to build a kernel for release 1 or later of the 1089 Choose this option to build a kernel for release 1 or later of the
1087 MIPS64 architecture. Many modern embedded systems with a 64-bit 1090 MIPS64 architecture. Many modern embedded systems with a 64-bit
@@ -1099,6 +1102,7 @@ config CPU_MIPS64_R2
1099 select CPU_HAS_PREFETCH 1102 select CPU_HAS_PREFETCH
1100 select CPU_SUPPORTS_32BIT_KERNEL 1103 select CPU_SUPPORTS_32BIT_KERNEL
1101 select CPU_SUPPORTS_64BIT_KERNEL 1104 select CPU_SUPPORTS_64BIT_KERNEL
1105 select CPU_SUPPORTS_HIGHMEM
1102 help 1106 help
1103 Choose this option to build a kernel for release 2 or later of the 1107 Choose this option to build a kernel for release 2 or later of the
1104 MIPS64 architecture. Many modern embedded systems with a 64-bit 1108 MIPS64 architecture. Many modern embedded systems with a 64-bit
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 6a57407df1bc..fe9da16f3a40 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -94,8 +94,8 @@ endif
94# machines may also. Since BFD is incredibly buggy with respect to 94# machines may also. Since BFD is incredibly buggy with respect to
95# crossformat linking we rely on the elf2ecoff tool for format conversion. 95# crossformat linking we rely on the elf2ecoff tool for format conversion.
96# 96#
97cflags-y += -I $(TOPDIR)/include/asm/gcc
98cflags-y += -G 0 -mno-abicalls -fno-pic -pipe 97cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
98cflags-y += -msoft-float
99LDFLAGS_vmlinux += -G 0 -static -n -nostdlib 99LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
100MODFLAGS += -mlong-calls 100MODFLAGS += -mlong-calls
101 101
diff --git a/arch/mips/arc/arc_con.c b/arch/mips/arc/arc_con.c
index 51785a6a7328..bc32fe64f42a 100644
--- a/arch/mips/arc/arc_con.c
+++ b/arch/mips/arc/arc_con.c
@@ -24,7 +24,7 @@ static void prom_console_write(struct console *co, const char *s,
24 } 24 }
25} 25}
26 26
27static int __init prom_console_setup(struct console *co, char *options) 27static int prom_console_setup(struct console *co, char *options)
28{ 28{
29 return !(prom_flags & PROM_FLAG_USE_AS_CONSOLE); 29 return !(prom_flags & PROM_FLAG_USE_AS_CONSOLE);
30} 30}
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index e17d3adff021..58c22cd344d3 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.15-rc2 3# Linux kernel version: 2.6.16-rc4
4# Thu Nov 24 01:06:21 2005 4# Tue Feb 21 13:44:31 2006
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -144,7 +144,6 @@ CONFIG_PREEMPT_BKL=y
144# Code maturity level options 144# Code maturity level options
145# 145#
146CONFIG_EXPERIMENTAL=y 146CONFIG_EXPERIMENTAL=y
147CONFIG_CLEAN_COMPILE=y
148CONFIG_LOCK_KERNEL=y 147CONFIG_LOCK_KERNEL=y
149CONFIG_INIT_ENV_ARG_LIMIT=32 148CONFIG_INIT_ENV_ARG_LIMIT=32
150 149
@@ -250,6 +249,7 @@ CONFIG_NET=y
250# 249#
251# Networking options 250# Networking options
252# 251#
252# CONFIG_NETDEBUG is not set
253CONFIG_PACKET=y 253CONFIG_PACKET=y
254CONFIG_PACKET_MMAP=y 254CONFIG_PACKET_MMAP=y
255CONFIG_UNIX=y 255CONFIG_UNIX=y
@@ -289,6 +289,7 @@ CONFIG_TCP_CONG_BIC=y
289# SCTP Configuration (EXPERIMENTAL) 289# SCTP Configuration (EXPERIMENTAL)
290# 290#
291# CONFIG_IP_SCTP is not set 291# CONFIG_IP_SCTP is not set
292
292# CONFIG_ATM is not set 293# CONFIG_ATM is not set
293# CONFIG_BRIDGE is not set 294# CONFIG_BRIDGE is not set
294# CONFIG_VLAN_8021Q is not set 295# CONFIG_VLAN_8021Q is not set
@@ -448,7 +449,7 @@ CONFIG_SCSI_SAS_ATTRS=m
448# 449#
449# SCSI low-level drivers 450# SCSI low-level drivers
450# 451#
451CONFIG_ISCSI_TCP=m 452# CONFIG_ISCSI_TCP is not set
452# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 453# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
453# CONFIG_SCSI_3W_9XXX is not set 454# CONFIG_SCSI_3W_9XXX is not set
454# CONFIG_SCSI_ACARD is not set 455# CONFIG_SCSI_ACARD is not set
@@ -774,6 +775,10 @@ CONFIG_USB_ARCH_HAS_OHCI=y
774# 775#
775 776
776# 777#
778# EDAC - error detection and reporting (RAS)
779#
780
781#
777# File systems 782# File systems
778# 783#
779CONFIG_EXT2_FS=y 784CONFIG_EXT2_FS=y
diff --git a/arch/mips/kernel/binfmt_elfn32.c b/arch/mips/kernel/binfmt_elfn32.c
index d8e2674a1543..4a9f1ecefaf2 100644
--- a/arch/mips/kernel/binfmt_elfn32.c
+++ b/arch/mips/kernel/binfmt_elfn32.c
@@ -103,8 +103,9 @@ jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
103 * one divide. 103 * one divide.
104 */ 104 */
105 u64 nsec = (u64)jiffies * TICK_NSEC; 105 u64 nsec = (u64)jiffies * TICK_NSEC;
106 value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &value->tv_usec); 106 long rem;
107 value->tv_usec /= NSEC_PER_USEC; 107 value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &rem);
108 value->tv_usec = rem / NSEC_PER_USEC;
108} 109}
109 110
110#define ELF_CORE_EFLAGS EF_MIPS_ABI2 111#define ELF_CORE_EFLAGS EF_MIPS_ABI2
diff --git a/arch/mips/kernel/binfmt_elfo32.c b/arch/mips/kernel/binfmt_elfo32.c
index cec5f327e360..e31813779895 100644
--- a/arch/mips/kernel/binfmt_elfo32.c
+++ b/arch/mips/kernel/binfmt_elfo32.c
@@ -105,8 +105,9 @@ jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
105 * one divide. 105 * one divide.
106 */ 106 */
107 u64 nsec = (u64)jiffies * TICK_NSEC; 107 u64 nsec = (u64)jiffies * TICK_NSEC;
108 value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &value->tv_usec); 108 long rem;
109 value->tv_usec /= NSEC_PER_USEC; 109 value->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &rem);
110 value->tv_usec = rem / NSEC_PER_USEC;
110} 111}
111 112
112#undef ELF_CORE_COPY_REGS 113#undef ELF_CORE_COPY_REGS
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c
index 0ac067f45cf5..0613f1f36b1b 100644
--- a/arch/mips/kernel/irq-mv6434x.c
+++ b/arch/mips/kernel/irq-mv6434x.c
@@ -11,12 +11,14 @@
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <asm/ptrace.h>
15#include <linux/sched.h>
16#include <linux/kernel_stat.h> 14#include <linux/kernel_stat.h>
15#include <linux/mv643xx.h>
16#include <linux/sched.h>
17
18#include <asm/ptrace.h>
17#include <asm/io.h> 19#include <asm/io.h>
18#include <asm/irq.h> 20#include <asm/irq.h>
19#include <linux/mv643xx.h> 21#include <asm/marvell.h>
20 22
21static unsigned int irq_base; 23static unsigned int irq_base;
22 24
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 60353f5acc48..e00e5f6e7fdd 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -161,60 +161,6 @@ out:
161 return error; 161 return error;
162} 162}
163 163
164struct dirent32 {
165 unsigned int d_ino;
166 unsigned int d_off;
167 unsigned short d_reclen;
168 char d_name[NAME_MAX + 1];
169};
170
171static void
172xlate_dirent(void *dirent64, void *dirent32, long n)
173{
174 long off;
175 struct dirent *dirp;
176 struct dirent32 *dirp32;
177
178 off = 0;
179 while (off < n) {
180 dirp = (struct dirent *)(dirent64 + off);
181 dirp32 = (struct dirent32 *)(dirent32 + off);
182 off += dirp->d_reclen;
183 dirp32->d_ino = dirp->d_ino;
184 dirp32->d_off = (unsigned int)dirp->d_off;
185 dirp32->d_reclen = dirp->d_reclen;
186 strncpy(dirp32->d_name, dirp->d_name, dirp->d_reclen - ((3 * 4) + 2));
187 }
188 return;
189}
190
191asmlinkage long
192sys32_getdents(unsigned int fd, void * dirent32, unsigned int count)
193{
194 long n;
195 void *dirent64;
196
197 dirent64 = (void *)((unsigned long)(dirent32 + (sizeof(long) - 1)) & ~(sizeof(long) - 1));
198 if ((n = sys_getdents(fd, dirent64, count - (dirent64 - dirent32))) < 0)
199 return(n);
200 xlate_dirent(dirent64, dirent32, n);
201 return(n);
202}
203
204asmlinkage int old_readdir(unsigned int fd, void * dirent, unsigned int count);
205
206asmlinkage int
207sys32_readdir(unsigned int fd, void * dirent32, unsigned int count)
208{
209 int n;
210 struct dirent dirent64;
211
212 if ((n = old_readdir(fd, &dirent64, count)) < 0)
213 return(n);
214 xlate_dirent(&dirent64, dirent32, dirent64.d_reclen);
215 return(n);
216}
217
218asmlinkage int 164asmlinkage int
219sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr, int options) 165sys32_waitpid(compat_pid_t pid, unsigned int *stat_addr, int options)
220{ 166{
@@ -230,6 +176,9 @@ sysn32_waitid(int which, compat_pid_t pid,
230 long ret; 176 long ret;
231 mm_segment_t old_fs = get_fs(); 177 mm_segment_t old_fs = get_fs();
232 178
179 if (!access_ok(VERIFY_WRITE, uinfo, sizeof(*uinfo)))
180 return -EFAULT;
181
233 set_fs (KERNEL_DS); 182 set_fs (KERNEL_DS);
234 ret = sys_waitid(which, pid, uinfo, options, 183 ret = sys_waitid(which, pid, uinfo, options,
235 uru ? (struct rusage __user *) &ru : NULL); 184 uru ? (struct rusage __user *) &ru : NULL);
@@ -1450,25 +1399,6 @@ sys32_timer_create(u32 clock, struct sigevent32 __user *se32, timer_t __user *ti
1450 return sys_timer_create(clock, p, timer_id); 1399 return sys_timer_create(clock, p, timer_id);
1451} 1400}
1452 1401
1453asmlinkage long
1454sysn32_rt_sigtimedwait(const sigset_t __user *uthese,
1455 siginfo_t __user *uinfo,
1456 const struct compat_timespec __user *uts32,
1457 size_t sigsetsize)
1458{
1459 struct timespec __user *uts = NULL;
1460
1461 if (uts32) {
1462 struct timespec ts;
1463 uts = compat_alloc_user_space(sizeof(struct timespec));
1464 if (get_user(ts.tv_sec, &uts32->tv_sec) ||
1465 get_user(ts.tv_nsec, &uts32->tv_nsec) ||
1466 copy_to_user (uts, &ts, sizeof (ts)))
1467 return -EFAULT;
1468 }
1469 return sys_rt_sigtimedwait(uthese, uinfo, uts, sigsetsize);
1470}
1471
1472save_static_function(sys32_clone); 1402save_static_function(sys32_clone);
1473__attribute_used__ noinline static int 1403__attribute_used__ noinline static int
1474_sys32_clone(nabi_no_regargs struct pt_regs regs) 1404_sys32_clone(nabi_no_regargs struct pt_regs regs)
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 5232fc752935..092679c2dca9 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -25,6 +25,7 @@
25#include <linux/a.out.h> 25#include <linux/a.out.h>
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/completion.h> 27#include <linux/completion.h>
28#include <linux/kallsyms.h>
28 29
29#include <asm/abi.h> 30#include <asm/abi.h>
30#include <asm/bootinfo.h> 31#include <asm/bootinfo.h>
@@ -272,46 +273,19 @@ long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
272 273
273static struct mips_frame_info { 274static struct mips_frame_info {
274 void *func; 275 void *func;
275 int omit_fp; /* compiled without fno-omit-frame-pointer */ 276 unsigned long func_size;
276 int frame_offset; 277 int frame_size;
277 int pc_offset; 278 int pc_offset;
278} schedule_frame, mfinfo[] = { 279} *schedule_frame, mfinfo[64];
279 { schedule, 0 }, /* must be first */ 280static int mfinfo_num;
280 /* arch/mips/kernel/semaphore.c */
281 { __down, 1 },
282 { __down_interruptible, 1 },
283 /* kernel/sched.c */
284#ifdef CONFIG_PREEMPT
285 { preempt_schedule, 0 },
286#endif
287 { wait_for_completion, 0 },
288 { interruptible_sleep_on, 0 },
289 { interruptible_sleep_on_timeout, 0 },
290 { sleep_on, 0 },
291 { sleep_on_timeout, 0 },
292 { yield, 0 },
293 { io_schedule, 0 },
294 { io_schedule_timeout, 0 },
295#if defined(CONFIG_SMP) && defined(CONFIG_PREEMPT)
296 { __preempt_spin_lock, 0 },
297 { __preempt_write_lock, 0 },
298#endif
299 /* kernel/timer.c */
300 { schedule_timeout, 1 },
301/* { nanosleep_restart, 1 }, */
302 /* lib/rwsem-spinlock.c */
303 { __down_read, 1 },
304 { __down_write, 1 },
305};
306 281
307static int mips_frame_info_initialized;
308static int __init get_frame_info(struct mips_frame_info *info) 282static int __init get_frame_info(struct mips_frame_info *info)
309{ 283{
310 int i; 284 int i;
311 void *func = info->func; 285 void *func = info->func;
312 union mips_instruction *ip = (union mips_instruction *)func; 286 union mips_instruction *ip = (union mips_instruction *)func;
313 info->pc_offset = -1; 287 info->pc_offset = -1;
314 info->frame_offset = info->omit_fp ? 0 : -1; 288 info->frame_size = 0;
315 for (i = 0; i < 128; i++, ip++) { 289 for (i = 0; i < 128; i++, ip++) {
316 /* if jal, jalr, jr, stop. */ 290 /* if jal, jalr, jr, stop. */
317 if (ip->j_format.opcode == jal_op || 291 if (ip->j_format.opcode == jal_op ||
@@ -320,6 +294,23 @@ static int __init get_frame_info(struct mips_frame_info *info)
320 ip->r_format.func == jr_op))) 294 ip->r_format.func == jr_op)))
321 break; 295 break;
322 296
297 if (info->func_size && i >= info->func_size / 4)
298 break;
299 if (
300#ifdef CONFIG_32BIT
301 ip->i_format.opcode == addiu_op &&
302#endif
303#ifdef CONFIG_64BIT
304 ip->i_format.opcode == daddiu_op &&
305#endif
306 ip->i_format.rs == 29 &&
307 ip->i_format.rt == 29) {
308 /* addiu/daddiu sp,sp,-imm */
309 if (info->frame_size)
310 continue;
311 info->frame_size = - ip->i_format.simmediate;
312 }
313
323 if ( 314 if (
324#ifdef CONFIG_32BIT 315#ifdef CONFIG_32BIT
325 ip->i_format.opcode == sw_op && 316 ip->i_format.opcode == sw_op &&
@@ -327,31 +318,20 @@ static int __init get_frame_info(struct mips_frame_info *info)
327#ifdef CONFIG_64BIT 318#ifdef CONFIG_64BIT
328 ip->i_format.opcode == sd_op && 319 ip->i_format.opcode == sd_op &&
329#endif 320#endif
330 ip->i_format.rs == 29) 321 ip->i_format.rs == 29 &&
331 { 322 ip->i_format.rt == 31) {
332 /* sw / sd $ra, offset($sp) */ 323 /* sw / sd $ra, offset($sp) */
333 if (ip->i_format.rt == 31) { 324 if (info->pc_offset != -1)
334 if (info->pc_offset != -1) 325 continue;
335 continue; 326 info->pc_offset =
336 info->pc_offset = 327 ip->i_format.simmediate / sizeof(long);
337 ip->i_format.simmediate / sizeof(long);
338 }
339 /* sw / sd $s8, offset($sp) */
340 if (ip->i_format.rt == 30) {
341//#if 0 /* gcc 3.4 does aggressive optimization... */
342 if (info->frame_offset != -1)
343 continue;
344//#endif
345 info->frame_offset =
346 ip->i_format.simmediate / sizeof(long);
347 }
348 } 328 }
349 } 329 }
350 if (info->pc_offset == -1 || info->frame_offset == -1) { 330 if (info->pc_offset == -1 || info->frame_size == 0) {
351 printk("Can't analyze prologue code at %p\n", func); 331 if (func == schedule)
332 printk("Can't analyze prologue code at %p\n", func);
352 info->pc_offset = -1; 333 info->pc_offset = -1;
353 info->frame_offset = -1; 334 info->frame_size = 0;
354 return -1;
355 } 335 }
356 336
357 return 0; 337 return 0;
@@ -359,25 +339,36 @@ static int __init get_frame_info(struct mips_frame_info *info)
359 339
360static int __init frame_info_init(void) 340static int __init frame_info_init(void)
361{ 341{
362 int i, found; 342 int i;
363 for (i = 0; i < ARRAY_SIZE(mfinfo); i++) 343#ifdef CONFIG_KALLSYMS
364 if (get_frame_info(&mfinfo[i])) 344 char *modname;
365 return -1; 345 char namebuf[KSYM_NAME_LEN + 1];
366 schedule_frame = mfinfo[0]; 346 unsigned long start, size, ofs;
367 /* bubble sort */ 347 extern char __sched_text_start[], __sched_text_end[];
368 do { 348 extern char __lock_text_start[], __lock_text_end[];
369 struct mips_frame_info tmp; 349
370 found = 0; 350 start = (unsigned long)__sched_text_start;
371 for (i = 1; i < ARRAY_SIZE(mfinfo); i++) { 351 for (i = 0; i < ARRAY_SIZE(mfinfo); i++) {
372 if (mfinfo[i-1].func > mfinfo[i].func) { 352 if (start == (unsigned long)schedule)
373 tmp = mfinfo[i]; 353 schedule_frame = &mfinfo[i];
374 mfinfo[i] = mfinfo[i-1]; 354 if (!kallsyms_lookup(start, &size, &ofs, &modname, namebuf))
375 mfinfo[i-1] = tmp; 355 break;
376 found = 1; 356 mfinfo[i].func = (void *)(start + ofs);
377 } 357 mfinfo[i].func_size = size;
378 } 358 start += size - ofs;
379 } while (found); 359 if (start >= (unsigned long)__lock_text_end)
380 mips_frame_info_initialized = 1; 360 break;
361 if (start == (unsigned long)__sched_text_end)
362 start = (unsigned long)__lock_text_start;
363 }
364#else
365 mfinfo[0].func = schedule;
366 schedule_frame = &mfinfo[0];
367#endif
368 for (i = 0; i < ARRAY_SIZE(mfinfo) && mfinfo[i].func; i++)
369 get_frame_info(&mfinfo[i]);
370
371 mfinfo_num = i;
381 return 0; 372 return 0;
382} 373}
383 374
@@ -394,47 +385,52 @@ unsigned long thread_saved_pc(struct task_struct *tsk)
394 if (t->reg31 == (unsigned long) ret_from_fork) 385 if (t->reg31 == (unsigned long) ret_from_fork)
395 return t->reg31; 386 return t->reg31;
396 387
397 if (schedule_frame.pc_offset < 0) 388 if (!schedule_frame || schedule_frame->pc_offset < 0)
398 return 0; 389 return 0;
399 return ((unsigned long *)t->reg29)[schedule_frame.pc_offset]; 390 return ((unsigned long *)t->reg29)[schedule_frame->pc_offset];
400} 391}
401 392
402/* get_wchan - a maintenance nightmare^W^Wpain in the ass ... */ 393/* get_wchan - a maintenance nightmare^W^Wpain in the ass ... */
403unsigned long get_wchan(struct task_struct *p) 394unsigned long get_wchan(struct task_struct *p)
404{ 395{
405 unsigned long stack_page; 396 unsigned long stack_page;
406 unsigned long frame, pc; 397 unsigned long pc;
398#ifdef CONFIG_KALLSYMS
399 unsigned long frame;
400#endif
407 401
408 if (!p || p == current || p->state == TASK_RUNNING) 402 if (!p || p == current || p->state == TASK_RUNNING)
409 return 0; 403 return 0;
410 404
411 stack_page = (unsigned long)task_stack_page(p); 405 stack_page = (unsigned long)task_stack_page(p);
412 if (!stack_page || !mips_frame_info_initialized) 406 if (!stack_page || !mfinfo_num)
413 return 0; 407 return 0;
414 408
415 pc = thread_saved_pc(p); 409 pc = thread_saved_pc(p);
410#ifdef CONFIG_KALLSYMS
416 if (!in_sched_functions(pc)) 411 if (!in_sched_functions(pc))
417 return pc; 412 return pc;
418 413
419 frame = ((unsigned long *)p->thread.reg30)[schedule_frame.frame_offset]; 414 frame = p->thread.reg29 + schedule_frame->frame_size;
420 do { 415 do {
421 int i; 416 int i;
422 417
423 if (frame < stack_page || frame > stack_page + THREAD_SIZE - 32) 418 if (frame < stack_page || frame > stack_page + THREAD_SIZE - 32)
424 return 0; 419 return 0;
425 420
426 for (i = ARRAY_SIZE(mfinfo) - 1; i >= 0; i--) { 421 for (i = mfinfo_num - 1; i >= 0; i--) {
427 if (pc >= (unsigned long) mfinfo[i].func) 422 if (pc >= (unsigned long) mfinfo[i].func)
428 break; 423 break;
429 } 424 }
430 if (i < 0) 425 if (i < 0)
431 break; 426 break;
432 427
433 if (mfinfo[i].omit_fp)
434 break;
435 pc = ((unsigned long *)frame)[mfinfo[i].pc_offset]; 428 pc = ((unsigned long *)frame)[mfinfo[i].pc_offset];
436 frame = ((unsigned long *)frame)[mfinfo[i].frame_offset]; 429 if (!mfinfo[i].frame_size)
430 break;
431 frame += mfinfo[i].frame_size;
437 } while (in_sched_functions(pc)); 432 } while (in_sched_functions(pc));
433#endif
438 434
439 return pc; 435 return pc;
440} 436}
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index d7c4a38ed5ae..2f2dc54b2e26 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -623,10 +623,10 @@ einval: li v0, -EINVAL
623 sys sys_mknodat 4 /* 4290 */ 623 sys sys_mknodat 4 /* 4290 */
624 sys sys_fchownat 5 624 sys sys_fchownat 5
625 sys sys_futimesat 3 625 sys sys_futimesat 3
626 sys sys_newfstatat 4 626 sys sys_fstatat64 4
627 sys sys_unlinkat 3 627 sys sys_unlinkat 3
628 sys sys_renameat 4 /* 4295 */ 628 sys sys_renameat 4 /* 4295 */
629 sys sys_linkat 4 629 sys sys_linkat 5
630 sys sys_symlinkat 3 630 sys sys_symlinkat 3
631 sys sys_readlinkat 4 631 sys sys_readlinkat 4
632 sys sys_fchmodat 3 632 sys sys_fchmodat 3
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index bc4980cefc8b..02c8267e45e7 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -195,7 +195,7 @@ EXPORT(sysn32_call_table)
195 PTR sys_fdatasync 195 PTR sys_fdatasync
196 PTR sys_truncate 196 PTR sys_truncate
197 PTR sys_ftruncate /* 6075 */ 197 PTR sys_ftruncate /* 6075 */
198 PTR sys32_getdents 198 PTR compat_sys_getdents
199 PTR sys_getcwd 199 PTR sys_getcwd
200 PTR sys_chdir 200 PTR sys_chdir
201 PTR sys_fchdir 201 PTR sys_fchdir
@@ -245,9 +245,9 @@ EXPORT(sysn32_call_table)
245 PTR sys_capget 245 PTR sys_capget
246 PTR sys_capset 246 PTR sys_capset
247 PTR sys32_rt_sigpending /* 6125 */ 247 PTR sys32_rt_sigpending /* 6125 */
248 PTR sysn32_rt_sigtimedwait 248 PTR compat_sys_rt_sigtimedwait
249 PTR sys_rt_sigqueueinfo 249 PTR sys_rt_sigqueueinfo
250 PTR sys32_rt_sigsuspend 250 PTR sysn32_rt_sigsuspend
251 PTR sys32_sigaltstack 251 PTR sys32_sigaltstack
252 PTR compat_sys_utime /* 6130 */ 252 PTR compat_sys_utime /* 6130 */
253 PTR sys_mknod 253 PTR sys_mknod
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 5b0414018c9a..797e0d874889 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -293,7 +293,7 @@ sys_call_table:
293 PTR sys_uselib 293 PTR sys_uselib
294 PTR sys_swapon 294 PTR sys_swapon
295 PTR sys_reboot 295 PTR sys_reboot
296 PTR sys32_readdir 296 PTR compat_sys_old_readdir
297 PTR old_mmap /* 4090 */ 297 PTR old_mmap /* 4090 */
298 PTR sys_munmap 298 PTR sys_munmap
299 PTR sys_truncate 299 PTR sys_truncate
@@ -345,7 +345,7 @@ sys_call_table:
345 PTR sys_setfsuid 345 PTR sys_setfsuid
346 PTR sys_setfsgid 346 PTR sys_setfsgid
347 PTR sys32_llseek /* 4140 */ 347 PTR sys32_llseek /* 4140 */
348 PTR sys32_getdents 348 PTR compat_sys_getdents
349 PTR compat_sys_select 349 PTR compat_sys_select
350 PTR sys_flock 350 PTR sys_flock
351 PTR sys_msync 351 PTR sys_msync
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index d86affa21278..d9293c558e41 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -540,6 +540,9 @@ void __init setup_arch(char **cmdline_p)
540 sparse_init(); 540 sparse_init();
541 paging_init(); 541 paging_init();
542 resource_init(); 542 resource_init();
543#ifdef CONFIG_SMP
544 plat_smp_setup();
545#endif
543} 546}
544 547
545int __init fpu_disable(char *s) 548int __init fpu_disable(char *s)
diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h
index 0fbc492d24b4..36bfc2588aa3 100644
--- a/arch/mips/kernel/signal-common.h
+++ b/arch/mips/kernel/signal-common.h
@@ -176,7 +176,7 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
176 if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) 176 if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0))
177 sp = current->sas_ss_sp + current->sas_ss_size; 177 sp = current->sas_ss_sp + current->sas_ss_size;
178 178
179 return (void __user *)((sp - frame_size) & (ICACHE_REFILLS_WORKAROUND_WAR ? 32 : ALMASK)); 179 return (void __user *)((sp - frame_size) & (ICACHE_REFILLS_WORKAROUND_WAR ? ~(cpu_icache_line_size()-1) : ALMASK));
180} 180}
181 181
182static inline int install_sigtramp(unsigned int __user *tramp, 182static inline int install_sigtramp(unsigned int __user *tramp,
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index da3271e1fdac..237cd8a2cd32 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -4,7 +4,7 @@
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1991, 1992 Linus Torvalds 6 * Copyright (C) 1991, 1992 Linus Torvalds
7 * Copyright (C) 1994 - 2000 Ralf Baechle 7 * Copyright (C) 1994 - 2000, 2006 Ralf Baechle
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 */ 9 */
10#include <linux/cache.h> 10#include <linux/cache.h>
@@ -106,8 +106,6 @@ typedef struct compat_siginfo {
106 106
107#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 107#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
108 108
109extern int do_signal32(sigset_t *oldset, struct pt_regs *regs);
110
111/* 32-bit compatibility types */ 109/* 32-bit compatibility types */
112 110
113#define _NSIG_BPW32 32 111#define _NSIG_BPW32 32
@@ -198,7 +196,7 @@ __attribute_used__ noinline static int
198_sys32_sigsuspend(nabi_no_regargs struct pt_regs regs) 196_sys32_sigsuspend(nabi_no_regargs struct pt_regs regs)
199{ 197{
200 compat_sigset_t *uset; 198 compat_sigset_t *uset;
201 sigset_t newset, saveset; 199 sigset_t newset;
202 200
203 uset = (compat_sigset_t *) regs.regs[4]; 201 uset = (compat_sigset_t *) regs.regs[4];
204 if (get_sigset(&newset, uset)) 202 if (get_sigset(&newset, uset))
@@ -206,19 +204,15 @@ _sys32_sigsuspend(nabi_no_regargs struct pt_regs regs)
206 sigdelsetmask(&newset, ~_BLOCKABLE); 204 sigdelsetmask(&newset, ~_BLOCKABLE);
207 205
208 spin_lock_irq(&current->sighand->siglock); 206 spin_lock_irq(&current->sighand->siglock);
209 saveset = current->blocked; 207 current->saved_sigmask = current->blocked;
210 current->blocked = newset; 208 current->blocked = newset;
211 recalc_sigpending(); 209 recalc_sigpending();
212 spin_unlock_irq(&current->sighand->siglock); 210 spin_unlock_irq(&current->sighand->siglock);
213 211
214 regs.regs[2] = EINTR; 212 current->state = TASK_INTERRUPTIBLE;
215 regs.regs[7] = 1; 213 schedule();
216 while (1) { 214 set_thread_flag(TIF_RESTORE_SIGMASK);
217 current->state = TASK_INTERRUPTIBLE; 215 return -ERESTARTNOHAND;
218 schedule();
219 if (do_signal32(&saveset, &regs))
220 return -EINTR;
221 }
222} 216}
223 217
224save_static_function(sys32_rt_sigsuspend); 218save_static_function(sys32_rt_sigsuspend);
@@ -226,8 +220,8 @@ __attribute_used__ noinline static int
226_sys32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs) 220_sys32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
227{ 221{
228 compat_sigset_t *uset; 222 compat_sigset_t *uset;
229 sigset_t newset, saveset; 223 sigset_t newset;
230 size_t sigsetsize; 224 size_t sigsetsize;
231 225
232 /* XXX Don't preclude handling different sized sigset_t's. */ 226 /* XXX Don't preclude handling different sized sigset_t's. */
233 sigsetsize = regs.regs[5]; 227 sigsetsize = regs.regs[5];
@@ -240,19 +234,15 @@ _sys32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
240 sigdelsetmask(&newset, ~_BLOCKABLE); 234 sigdelsetmask(&newset, ~_BLOCKABLE);
241 235
242 spin_lock_irq(&current->sighand->siglock); 236 spin_lock_irq(&current->sighand->siglock);
243 saveset = current->blocked; 237 current->saved_sigmask = current->blocked;
244 current->blocked = newset; 238 current->blocked = newset;
245 recalc_sigpending(); 239 recalc_sigpending();
246 spin_unlock_irq(&current->sighand->siglock); 240 spin_unlock_irq(&current->sighand->siglock);
247 241
248 regs.regs[2] = EINTR; 242 current->state = TASK_INTERRUPTIBLE;
249 regs.regs[7] = 1; 243 schedule();
250 while (1) { 244 set_thread_flag(TIF_RESTORE_SIGMASK);
251 current->state = TASK_INTERRUPTIBLE; 245 return -ERESTARTNOHAND;
252 schedule();
253 if (do_signal32(&saveset, &regs))
254 return -EINTR;
255 }
256} 246}
257 247
258asmlinkage int sys32_sigaction(int sig, const struct sigaction32 *act, 248asmlinkage int sys32_sigaction(int sig, const struct sigaction32 *act,
@@ -537,7 +527,7 @@ _sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
537 /* The ucontext contains a stack32_t, so we must convert! */ 527 /* The ucontext contains a stack32_t, so we must convert! */
538 if (__get_user(sp, &frame->rs_uc.uc_stack.ss_sp)) 528 if (__get_user(sp, &frame->rs_uc.uc_stack.ss_sp))
539 goto badframe; 529 goto badframe;
540 st.ss_size = (long) sp; 530 st.ss_sp = (void *)(long) sp;
541 if (__get_user(st.ss_size, &frame->rs_uc.uc_stack.ss_size)) 531 if (__get_user(st.ss_size, &frame->rs_uc.uc_stack.ss_size))
542 goto badframe; 532 goto badframe;
543 if (__get_user(st.ss_flags, &frame->rs_uc.uc_stack.ss_flags)) 533 if (__get_user(st.ss_flags, &frame->rs_uc.uc_stack.ss_flags))
@@ -783,7 +773,7 @@ static inline int handle_signal(unsigned long sig, siginfo_t *info,
783 regs->regs[2] = EINTR; 773 regs->regs[2] = EINTR;
784 break; 774 break;
785 case ERESTARTSYS: 775 case ERESTARTSYS:
786 if(!(ka->sa.sa_flags & SA_RESTART)) { 776 if (!(ka->sa.sa_flags & SA_RESTART)) {
787 regs->regs[2] = EINTR; 777 regs->regs[2] = EINTR;
788 break; 778 break;
789 } 779 }
@@ -810,9 +800,10 @@ static inline int handle_signal(unsigned long sig, siginfo_t *info,
810 return ret; 800 return ret;
811} 801}
812 802
813int do_signal32(sigset_t *oldset, struct pt_regs *regs) 803void do_signal32(struct pt_regs *regs)
814{ 804{
815 struct k_sigaction ka; 805 struct k_sigaction ka;
806 sigset_t *oldset;
816 siginfo_t info; 807 siginfo_t info;
817 int signr; 808 int signr;
818 809
@@ -822,17 +813,30 @@ int do_signal32(sigset_t *oldset, struct pt_regs *regs)
822 * if so. 813 * if so.
823 */ 814 */
824 if (!user_mode(regs)) 815 if (!user_mode(regs))
825 return 1; 816 return;
826 817
827 if (try_to_freeze()) 818 if (try_to_freeze())
828 goto no_signal; 819 goto no_signal;
829 820
830 if (!oldset) 821 if (test_thread_flag(TIF_RESTORE_SIGMASK))
822 oldset = &current->saved_sigmask;
823 else
831 oldset = &current->blocked; 824 oldset = &current->blocked;
832 825
833 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 826 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
834 if (signr > 0) 827 if (signr > 0) {
835 return handle_signal(signr, &info, &ka, oldset, regs); 828 /* Whee! Actually deliver the signal. */
829 if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
830 /*
831 * A signal was successfully delivered; the saved
832 * sigmask will have been stored in the signal frame,
833 * and will be restored by sigreturn, so we can simply
834 * clear the TIF_RESTORE_SIGMASK flag.
835 */
836 if (test_thread_flag(TIF_RESTORE_SIGMASK))
837 clear_thread_flag(TIF_RESTORE_SIGMASK);
838 }
839 }
836 840
837no_signal: 841no_signal:
838 /* 842 /*
@@ -853,7 +857,15 @@ no_signal:
853 regs->cp0_epc -= 4; 857 regs->cp0_epc -= 4;
854 } 858 }
855 } 859 }
856 return 0; 860
861 /*
862 * If there's no signal to deliver, we just put the saved sigmask
863 * back
864 */
865 if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
866 clear_thread_flag(TIF_RESTORE_SIGMASK);
867 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
868 }
857} 869}
858 870
859asmlinkage int sys32_rt_sigaction(int sig, const struct sigaction32 *act, 871asmlinkage int sys32_rt_sigaction(int sig, const struct sigaction32 *act,
diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c
index 384fc4a639a4..3e168c08a3a8 100644
--- a/arch/mips/kernel/signal_n32.c
+++ b/arch/mips/kernel/signal_n32.c
@@ -81,6 +81,39 @@ struct rt_sigframe_n32 {
81#endif 81#endif
82}; 82};
83 83
84extern void sigset_from_compat (sigset_t *set, compat_sigset_t *compat);
85
86save_static_function(sysn32_rt_sigsuspend);
87__attribute_used__ noinline static int
88_sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
89{
90 compat_sigset_t __user *unewset, uset;
91 size_t sigsetsize;
92 sigset_t newset;
93
94 /* XXX Don't preclude handling different sized sigset_t's. */
95 sigsetsize = regs.regs[5];
96 if (sigsetsize != sizeof(sigset_t))
97 return -EINVAL;
98
99 unewset = (compat_sigset_t __user *) regs.regs[4];
100 if (copy_from_user(&uset, unewset, sizeof(uset)))
101 return -EFAULT;
102 sigset_from_compat (&newset, &uset);
103 sigdelsetmask(&newset, ~_BLOCKABLE);
104
105 spin_lock_irq(&current->sighand->siglock);
106 current->saved_sigmask = current->blocked;
107 current->blocked = newset;
108 recalc_sigpending();
109 spin_unlock_irq(&current->sighand->siglock);
110
111 current->state = TASK_INTERRUPTIBLE;
112 schedule();
113 set_thread_flag(TIF_RESTORE_SIGMASK);
114 return -ERESTARTNOHAND;
115}
116
84save_static_function(sysn32_rt_sigreturn); 117save_static_function(sysn32_rt_sigreturn);
85__attribute_used__ noinline static void 118__attribute_used__ noinline static void
86_sysn32_rt_sigreturn(nabi_no_regargs struct pt_regs regs) 119_sysn32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
@@ -108,7 +141,7 @@ _sysn32_rt_sigreturn(nabi_no_regargs struct pt_regs regs)
108 /* The ucontext contains a stack32_t, so we must convert! */ 141 /* The ucontext contains a stack32_t, so we must convert! */
109 if (__get_user(sp, &frame->rs_uc.uc_stack.ss_sp)) 142 if (__get_user(sp, &frame->rs_uc.uc_stack.ss_sp))
110 goto badframe; 143 goto badframe;
111 st.ss_size = (long) sp; 144 st.ss_sp = (void *)(long) sp;
112 if (__get_user(st.ss_size, &frame->rs_uc.uc_stack.ss_size)) 145 if (__get_user(st.ss_size, &frame->rs_uc.uc_stack.ss_size))
113 goto badframe; 146 goto badframe;
114 if (__get_user(st.ss_flags, &frame->rs_uc.uc_stack.ss_flags)) 147 if (__get_user(st.ss_flags, &frame->rs_uc.uc_stack.ss_flags))
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 25472fcaf715..06ed90752424 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -29,6 +29,7 @@
29#include <linux/timex.h> 29#include <linux/timex.h>
30#include <linux/sched.h> 30#include <linux/sched.h>
31#include <linux/cpumask.h> 31#include <linux/cpumask.h>
32#include <linux/cpu.h>
32 33
33#include <asm/atomic.h> 34#include <asm/atomic.h>
34#include <asm/cpu.h> 35#include <asm/cpu.h>
@@ -235,7 +236,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
235 init_new_context(current, &init_mm); 236 init_new_context(current, &init_mm);
236 current_thread_info()->cpu = 0; 237 current_thread_info()->cpu = 0;
237 smp_tune_scheduling(); 238 smp_tune_scheduling();
238 prom_prepare_cpus(max_cpus); 239 plat_prepare_cpus(max_cpus);
239} 240}
240 241
241/* preload SMP state for boot cpu */ 242/* preload SMP state for boot cpu */
@@ -424,6 +425,25 @@ void flush_tlb_one(unsigned long vaddr)
424 local_flush_tlb_one(vaddr); 425 local_flush_tlb_one(vaddr);
425} 426}
426 427
428static DEFINE_PER_CPU(struct cpu, cpu_devices);
429
430static int __init topology_init(void)
431{
432 int cpu;
433 int ret;
434
435 for_each_cpu(cpu) {
436 ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL);
437 if (ret)
438 printk(KERN_WARNING "topology_init: register_cpu %d "
439 "failed (%d)\n", cpu, ret);
440 }
441
442 return 0;
443}
444
445subsys_initcall(topology_init);
446
427EXPORT_SYMBOL(flush_tlb_page); 447EXPORT_SYMBOL(flush_tlb_page);
428EXPORT_SYMBOL(flush_tlb_one); 448EXPORT_SYMBOL(flush_tlb_one);
429EXPORT_SYMBOL(cpu_data); 449EXPORT_SYMBOL(cpu_data);
diff --git a/arch/mips/kernel/smp_mt.c b/arch/mips/kernel/smp_mt.c
index 794a1c3de2a4..993b8bf56aaf 100644
--- a/arch/mips/kernel/smp_mt.c
+++ b/arch/mips/kernel/smp_mt.c
@@ -68,6 +68,8 @@ void __init sanitize_tlb_entries(void)
68 68
69 set_c0_mvpcontrol(MVPCONTROL_VPC); 69 set_c0_mvpcontrol(MVPCONTROL_VPC);
70 70
71 back_to_back_c0_hazard();
72
71 /* Disable TLB sharing */ 73 /* Disable TLB sharing */
72 clear_c0_mvpcontrol(MVPCONTROL_STLB); 74 clear_c0_mvpcontrol(MVPCONTROL_STLB);
73 75
@@ -102,35 +104,6 @@ void __init sanitize_tlb_entries(void)
102 clear_c0_mvpcontrol(MVPCONTROL_VPC); 104 clear_c0_mvpcontrol(MVPCONTROL_VPC);
103} 105}
104 106
105#if 0
106/*
107 * Use c0_MVPConf0 to find out how many CPUs are available, setting up
108 * phys_cpu_present_map and the logical/physical mappings.
109 */
110void __init prom_build_cpu_map(void)
111{
112 int i, num, ncpus;
113
114 cpus_clear(phys_cpu_present_map);
115
116 /* assume we boot on cpu 0.... */
117 cpu_set(0, phys_cpu_present_map);
118 __cpu_number_map[0] = 0;
119 __cpu_logical_map[0] = 0;
120
121 if (cpu_has_mipsmt) {
122 ncpus = ((read_c0_mvpconf0() & (MVPCONF0_PVPE)) >> MVPCONF0_PVPE_SHIFT) + 1;
123 for (i=1, num=0; i< NR_CPUS && i<ncpus; i++) {
124 cpu_set(i, phys_cpu_present_map);
125 __cpu_number_map[i] = ++num;
126 __cpu_logical_map[num] = i;
127 }
128
129 printk(KERN_INFO "%i available secondary CPU(s)\n", num);
130 }
131}
132#endif
133
134static void ipi_resched_dispatch (struct pt_regs *regs) 107static void ipi_resched_dispatch (struct pt_regs *regs)
135{ 108{
136 do_IRQ(MIPS_CPU_IPI_RESCHED_IRQ, regs); 109 do_IRQ(MIPS_CPU_IPI_RESCHED_IRQ, regs);
@@ -170,7 +143,7 @@ static struct irqaction irq_call = {
170 * Make sure all CPU's are in a sensible state before we boot any of the 143 * Make sure all CPU's are in a sensible state before we boot any of the
171 * secondarys 144 * secondarys
172 */ 145 */
173void prom_prepare_cpus(unsigned int max_cpus) 146void plat_smp_setup(void)
174{ 147{
175 unsigned long val; 148 unsigned long val;
176 int i, num; 149 int i, num;
@@ -206,11 +179,9 @@ void prom_prepare_cpus(unsigned int max_cpus)
206 write_vpe_c0_vpeconf0(tmp); 179 write_vpe_c0_vpeconf0(tmp);
207 180
208 /* Record this as available CPU */ 181 /* Record this as available CPU */
209 if (i < max_cpus) { 182 cpu_set(i, phys_cpu_present_map);
210 cpu_set(i, phys_cpu_present_map); 183 __cpu_number_map[i] = ++num;
211 __cpu_number_map[i] = ++num; 184 __cpu_logical_map[num] = i;
212 __cpu_logical_map[num] = i;
213 }
214 } 185 }
215 186
216 /* disable multi-threading with TC's */ 187 /* disable multi-threading with TC's */
@@ -222,6 +193,9 @@ void prom_prepare_cpus(unsigned int max_cpus)
222 193
223 /* set config to be the same as vpe0, particularly kseg0 coherency alg */ 194 /* set config to be the same as vpe0, particularly kseg0 coherency alg */
224 write_vpe_c0_config( read_c0_config()); 195 write_vpe_c0_config( read_c0_config());
196
197 /* Propagate Config7 */
198 write_vpe_c0_config7(read_c0_config7());
225 } 199 }
226 200
227 } 201 }
@@ -265,7 +239,10 @@ void prom_prepare_cpus(unsigned int max_cpus)
265 set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); 239 set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch);
266 set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); 240 set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
267 } 241 }
242}
268 243
244void __init plat_prepare_cpus(unsigned int max_cpus)
245{
269 cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; 246 cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ;
270 cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ; 247 cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ;
271 248
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 7050b4ffffcd..42c94c771afb 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -163,7 +163,7 @@ void do_gettimeofday(struct timeval *tv)
163 unsigned long seq; 163 unsigned long seq;
164 unsigned long lost; 164 unsigned long lost;
165 unsigned long usec, sec; 165 unsigned long usec, sec;
166 unsigned long max_ntp_tick = tick_usec - tickadj; 166 unsigned long max_ntp_tick;
167 167
168 do { 168 do {
169 seq = read_seqbegin(&xtime_lock); 169 seq = read_seqbegin(&xtime_lock);
@@ -178,12 +178,13 @@ void do_gettimeofday(struct timeval *tv)
178 * Better to lose some accuracy than have time go backwards.. 178 * Better to lose some accuracy than have time go backwards..
179 */ 179 */
180 if (unlikely(time_adjust < 0)) { 180 if (unlikely(time_adjust < 0)) {
181 max_ntp_tick = (USEC_PER_SEC / HZ) - tickadj;
181 usec = min(usec, max_ntp_tick); 182 usec = min(usec, max_ntp_tick);
182 183
183 if (lost) 184 if (lost)
184 usec += lost * max_ntp_tick; 185 usec += lost * max_ntp_tick;
185 } else if (unlikely(lost)) 186 } else if (unlikely(lost))
186 usec += lost * tick_usec; 187 usec += lost * (USEC_PER_SEC / HZ);
187 188
188 sec = xtime.tv_sec; 189 sec = xtime.tv_sec;
189 usec += (xtime.tv_nsec / 1000); 190 usec += (xtime.tv_nsec / 1000);
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index c9d2b5147ca3..005debbfbe84 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1994 - 1999, 2000, 01 Ralf Baechle 6 * Copyright (C) 1994 - 1999, 2000, 01, 06 Ralf Baechle
7 * Copyright (C) 1995, 1996 Paul M. Antoine 7 * Copyright (C) 1995, 1996 Paul M. Antoine
8 * Copyright (C) 1998 Ulf Carlsson 8 * Copyright (C) 1998 Ulf Carlsson
9 * Copyright (C) 1999 Silicon Graphics, Inc. 9 * Copyright (C) 1999 Silicon Graphics, Inc.
@@ -548,6 +548,8 @@ asmlinkage void do_ov(struct pt_regs *regs)
548{ 548{
549 siginfo_t info; 549 siginfo_t info;
550 550
551 die_if_kernel("Integer overflow", regs);
552
551 info.si_code = FPE_INTOVF; 553 info.si_code = FPE_INTOVF;
552 info.si_signo = SIGFPE; 554 info.si_signo = SIGFPE;
553 info.si_errno = 0; 555 info.si_errno = 0;
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index ff699dbb99f7..2ad0cedf29fe 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -106,6 +106,9 @@ SECTIONS
106 .con_initcall.init : { *(.con_initcall.init) } 106 .con_initcall.init : { *(.con_initcall.init) }
107 __con_initcall_end = .; 107 __con_initcall_end = .;
108 SECURITY_INIT 108 SECURITY_INIT
109 /* .exit.text is discarded at runtime, not link time, to deal with
110 references from .rodata */
111 .exit.text : { *(.exit.text) }
109 . = ALIGN(_PAGE_SIZE); 112 . = ALIGN(_PAGE_SIZE);
110 __initramfs_start = .; 113 __initramfs_start = .;
111 .init.ramfs : { *(.init.ramfs) } 114 .init.ramfs : { *(.init.ramfs) }
@@ -133,7 +136,6 @@ SECTIONS
133 136
134 /* Sections to be discarded */ 137 /* Sections to be discarded */
135 /DISCARD/ : { 138 /DISCARD/ : {
136 *(.exit.text)
137 *(.exit.data) 139 *(.exit.data)
138 *(.exitcall.exit) 140 *(.exitcall.exit)
139 141
diff --git a/arch/mips/lib/iomap.c b/arch/mips/lib/iomap.c
index 7e2ced715cfb..f4ac5bbcd81f 100644
--- a/arch/mips/lib/iomap.c
+++ b/arch/mips/lib/iomap.c
@@ -63,7 +63,7 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
63 return ioport_map(start, len); 63 return ioport_map(start, len);
64 if (flags & IORESOURCE_MEM) { 64 if (flags & IORESOURCE_MEM) {
65 if (flags & IORESOURCE_CACHEABLE) 65 if (flags & IORESOURCE_CACHEABLE)
66 return ioremap_cacheable_cow(start, len); 66 return ioremap_cachable(start, len);
67 return ioremap_nocache(start, len); 67 return ioremap_nocache(start, len);
68 } 68 }
69 69
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index e51c38cef88e..0668e9bfce41 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -235,7 +235,9 @@ static inline void r4k_blast_scache_page_setup(void)
235{ 235{
236 unsigned long sc_lsize = cpu_scache_line_size(); 236 unsigned long sc_lsize = cpu_scache_line_size();
237 237
238 if (sc_lsize == 16) 238 if (scache_size == 0)
239 r4k_blast_scache_page = (void *)no_sc_noop;
240 else if (sc_lsize == 16)
239 r4k_blast_scache_page = blast_scache16_page; 241 r4k_blast_scache_page = blast_scache16_page;
240 else if (sc_lsize == 32) 242 else if (sc_lsize == 32)
241 r4k_blast_scache_page = blast_scache32_page; 243 r4k_blast_scache_page = blast_scache32_page;
@@ -251,7 +253,9 @@ static inline void r4k_blast_scache_page_indexed_setup(void)
251{ 253{
252 unsigned long sc_lsize = cpu_scache_line_size(); 254 unsigned long sc_lsize = cpu_scache_line_size();
253 255
254 if (sc_lsize == 16) 256 if (scache_size == 0)
257 r4k_blast_scache_page_indexed = (void *)no_sc_noop;
258 else if (sc_lsize == 16)
255 r4k_blast_scache_page_indexed = blast_scache16_page_indexed; 259 r4k_blast_scache_page_indexed = blast_scache16_page_indexed;
256 else if (sc_lsize == 32) 260 else if (sc_lsize == 32)
257 r4k_blast_scache_page_indexed = blast_scache32_page_indexed; 261 r4k_blast_scache_page_indexed = blast_scache32_page_indexed;
@@ -267,7 +271,9 @@ static inline void r4k_blast_scache_setup(void)
267{ 271{
268 unsigned long sc_lsize = cpu_scache_line_size(); 272 unsigned long sc_lsize = cpu_scache_line_size();
269 273
270 if (sc_lsize == 16) 274 if (scache_size == 0)
275 r4k_blast_scache = (void *)no_sc_noop;
276 else if (sc_lsize == 16)
271 r4k_blast_scache = blast_scache16; 277 r4k_blast_scache = blast_scache16;
272 else if (sc_lsize == 32) 278 else if (sc_lsize == 32)
273 r4k_blast_scache = blast_scache32; 279 r4k_blast_scache = blast_scache32;
@@ -471,61 +477,29 @@ struct flush_icache_range_args {
471static inline void local_r4k_flush_icache_range(void *args) 477static inline void local_r4k_flush_icache_range(void *args)
472{ 478{
473 struct flush_icache_range_args *fir_args = args; 479 struct flush_icache_range_args *fir_args = args;
474 unsigned long dc_lsize = cpu_dcache_line_size();
475 unsigned long ic_lsize = cpu_icache_line_size();
476 unsigned long sc_lsize = cpu_scache_line_size();
477 unsigned long start = fir_args->start; 480 unsigned long start = fir_args->start;
478 unsigned long end = fir_args->end; 481 unsigned long end = fir_args->end;
479 unsigned long addr, aend;
480 482
481 if (!cpu_has_ic_fills_f_dc) { 483 if (!cpu_has_ic_fills_f_dc) {
482 if (end - start > dcache_size) { 484 if (end - start > dcache_size) {
483 r4k_blast_dcache(); 485 r4k_blast_dcache();
484 } else { 486 } else {
485 R4600_HIT_CACHEOP_WAR_IMPL; 487 R4600_HIT_CACHEOP_WAR_IMPL;
486 addr = start & ~(dc_lsize - 1); 488 protected_blast_dcache_range(start, end);
487 aend = (end - 1) & ~(dc_lsize - 1);
488
489 while (1) {
490 /* Hit_Writeback_Inv_D */
491 protected_writeback_dcache_line(addr);
492 if (addr == aend)
493 break;
494 addr += dc_lsize;
495 }
496 } 489 }
497 490
498 if (!cpu_icache_snoops_remote_store) { 491 if (!cpu_icache_snoops_remote_store && scache_size) {
499 if (end - start > scache_size) { 492 if (end - start > scache_size)
500 r4k_blast_scache(); 493 r4k_blast_scache();
501 } else { 494 else
502 addr = start & ~(sc_lsize - 1); 495 protected_blast_scache_range(start, end);
503 aend = (end - 1) & ~(sc_lsize - 1);
504
505 while (1) {
506 /* Hit_Writeback_Inv_SD */
507 protected_writeback_scache_line(addr);
508 if (addr == aend)
509 break;
510 addr += sc_lsize;
511 }
512 }
513 } 496 }
514 } 497 }
515 498
516 if (end - start > icache_size) 499 if (end - start > icache_size)
517 r4k_blast_icache(); 500 r4k_blast_icache();
518 else { 501 else
519 addr = start & ~(ic_lsize - 1); 502 protected_blast_icache_range(start, end);
520 aend = (end - 1) & ~(ic_lsize - 1);
521 while (1) {
522 /* Hit_Invalidate_I */
523 protected_flush_icache_line(addr);
524 if (addr == aend)
525 break;
526 addr += ic_lsize;
527 }
528 }
529} 503}
530 504
531static void r4k_flush_icache_range(unsigned long start, unsigned long end) 505static void r4k_flush_icache_range(unsigned long start, unsigned long end)
@@ -619,27 +593,14 @@ static void r4k_flush_icache_page(struct vm_area_struct *vma,
619 593
620static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size) 594static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
621{ 595{
622 unsigned long end, a;
623
624 /* Catch bad driver code */ 596 /* Catch bad driver code */
625 BUG_ON(size == 0); 597 BUG_ON(size == 0);
626 598
627 if (cpu_has_subset_pcaches) { 599 if (cpu_has_subset_pcaches) {
628 unsigned long sc_lsize = cpu_scache_line_size(); 600 if (size >= scache_size)
629
630 if (size >= scache_size) {
631 r4k_blast_scache(); 601 r4k_blast_scache();
632 return; 602 else
633 } 603 blast_scache_range(addr, addr + size);
634
635 a = addr & ~(sc_lsize - 1);
636 end = (addr + size - 1) & ~(sc_lsize - 1);
637 while (1) {
638 flush_scache_line(a); /* Hit_Writeback_Inv_SD */
639 if (a == end)
640 break;
641 a += sc_lsize;
642 }
643 return; 604 return;
644 } 605 }
645 606
@@ -651,17 +612,8 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
651 if (size >= dcache_size) { 612 if (size >= dcache_size) {
652 r4k_blast_dcache(); 613 r4k_blast_dcache();
653 } else { 614 } else {
654 unsigned long dc_lsize = cpu_dcache_line_size();
655
656 R4600_HIT_CACHEOP_WAR_IMPL; 615 R4600_HIT_CACHEOP_WAR_IMPL;
657 a = addr & ~(dc_lsize - 1); 616 blast_dcache_range(addr, addr + size);
658 end = (addr + size - 1) & ~(dc_lsize - 1);
659 while (1) {
660 flush_dcache_line(a); /* Hit_Writeback_Inv_D */
661 if (a == end)
662 break;
663 a += dc_lsize;
664 }
665 } 617 }
666 618
667 bc_wback_inv(addr, size); 619 bc_wback_inv(addr, size);
@@ -669,44 +621,22 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
669 621
670static void r4k_dma_cache_inv(unsigned long addr, unsigned long size) 622static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
671{ 623{
672 unsigned long end, a;
673
674 /* Catch bad driver code */ 624 /* Catch bad driver code */
675 BUG_ON(size == 0); 625 BUG_ON(size == 0);
676 626
677 if (cpu_has_subset_pcaches) { 627 if (cpu_has_subset_pcaches) {
678 unsigned long sc_lsize = cpu_scache_line_size(); 628 if (size >= scache_size)
679
680 if (size >= scache_size) {
681 r4k_blast_scache(); 629 r4k_blast_scache();
682 return; 630 else
683 } 631 blast_scache_range(addr, addr + size);
684
685 a = addr & ~(sc_lsize - 1);
686 end = (addr + size - 1) & ~(sc_lsize - 1);
687 while (1) {
688 flush_scache_line(a); /* Hit_Writeback_Inv_SD */
689 if (a == end)
690 break;
691 a += sc_lsize;
692 }
693 return; 632 return;
694 } 633 }
695 634
696 if (size >= dcache_size) { 635 if (size >= dcache_size) {
697 r4k_blast_dcache(); 636 r4k_blast_dcache();
698 } else { 637 } else {
699 unsigned long dc_lsize = cpu_dcache_line_size();
700
701 R4600_HIT_CACHEOP_WAR_IMPL; 638 R4600_HIT_CACHEOP_WAR_IMPL;
702 a = addr & ~(dc_lsize - 1); 639 blast_dcache_range(addr, addr + size);
703 end = (addr + size - 1) & ~(dc_lsize - 1);
704 while (1) {
705 flush_dcache_line(a); /* Hit_Writeback_Inv_D */
706 if (a == end)
707 break;
708 a += dc_lsize;
709 }
710 } 640 }
711 641
712 bc_inv(addr, size); 642 bc_inv(addr, size);
@@ -727,7 +657,7 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
727 657
728 R4600_HIT_CACHEOP_WAR_IMPL; 658 R4600_HIT_CACHEOP_WAR_IMPL;
729 protected_writeback_dcache_line(addr & ~(dc_lsize - 1)); 659 protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
730 if (!cpu_icache_snoops_remote_store) 660 if (!cpu_icache_snoops_remote_store && scache_size)
731 protected_writeback_scache_line(addr & ~(sc_lsize - 1)); 661 protected_writeback_scache_line(addr & ~(sc_lsize - 1));
732 protected_flush_icache_line(addr & ~(ic_lsize - 1)); 662 protected_flush_icache_line(addr & ~(ic_lsize - 1));
733 if (MIPS4K_ICACHE_REFILL_WAR) { 663 if (MIPS4K_ICACHE_REFILL_WAR) {
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index 0a97a9434eba..7c572bea4a98 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -44,8 +44,6 @@ __asm__ __volatile__( \
44/* TX39H-style cache flush routines. */ 44/* TX39H-style cache flush routines. */
45static void tx39h_flush_icache_all(void) 45static void tx39h_flush_icache_all(void)
46{ 46{
47 unsigned long start = KSEG0;
48 unsigned long end = (start + icache_size);
49 unsigned long flags, config; 47 unsigned long flags, config;
50 48
51 /* disable icache (set ICE#) */ 49 /* disable icache (set ICE#) */
@@ -53,33 +51,18 @@ static void tx39h_flush_icache_all(void)
53 config = read_c0_conf(); 51 config = read_c0_conf();
54 write_c0_conf(config & ~TX39_CONF_ICE); 52 write_c0_conf(config & ~TX39_CONF_ICE);
55 TX39_STOP_STREAMING(); 53 TX39_STOP_STREAMING();
56 54 blast_icache16();
57 /* invalidate icache */
58 while (start < end) {
59 cache16_unroll32(start, Index_Invalidate_I);
60 start += 0x200;
61 }
62
63 write_c0_conf(config); 55 write_c0_conf(config);
64 local_irq_restore(flags); 56 local_irq_restore(flags);
65} 57}
66 58
67static void tx39h_dma_cache_wback_inv(unsigned long addr, unsigned long size) 59static void tx39h_dma_cache_wback_inv(unsigned long addr, unsigned long size)
68{ 60{
69 unsigned long end, a;
70 unsigned long dc_lsize = current_cpu_data.dcache.linesz;
71
72 /* Catch bad driver code */ 61 /* Catch bad driver code */
73 BUG_ON(size == 0); 62 BUG_ON(size == 0);
74 63
75 iob(); 64 iob();
76 a = addr & ~(dc_lsize - 1); 65 blast_inv_dcache_range(addr, addr + size);
77 end = (addr + size - 1) & ~(dc_lsize - 1);
78 while (1) {
79 invalidate_dcache_line(a); /* Hit_Invalidate_D */
80 if (a == end) break;
81 a += dc_lsize;
82 }
83} 66}
84 67
85 68
@@ -241,42 +224,21 @@ static void tx39_flush_data_cache_page(unsigned long addr)
241 224
242static void tx39_flush_icache_range(unsigned long start, unsigned long end) 225static void tx39_flush_icache_range(unsigned long start, unsigned long end)
243{ 226{
244 unsigned long dc_lsize = current_cpu_data.dcache.linesz;
245 unsigned long addr, aend;
246
247 if (end - start > dcache_size) 227 if (end - start > dcache_size)
248 tx39_blast_dcache(); 228 tx39_blast_dcache();
249 else { 229 else
250 addr = start & ~(dc_lsize - 1); 230 protected_blast_dcache_range(start, end);
251 aend = (end - 1) & ~(dc_lsize - 1);
252
253 while (1) {
254 /* Hit_Writeback_Inv_D */
255 protected_writeback_dcache_line(addr);
256 if (addr == aend)
257 break;
258 addr += dc_lsize;
259 }
260 }
261 231
262 if (end - start > icache_size) 232 if (end - start > icache_size)
263 tx39_blast_icache(); 233 tx39_blast_icache();
264 else { 234 else {
265 unsigned long flags, config; 235 unsigned long flags, config;
266 addr = start & ~(dc_lsize - 1);
267 aend = (end - 1) & ~(dc_lsize - 1);
268 /* disable icache (set ICE#) */ 236 /* disable icache (set ICE#) */
269 local_irq_save(flags); 237 local_irq_save(flags);
270 config = read_c0_conf(); 238 config = read_c0_conf();
271 write_c0_conf(config & ~TX39_CONF_ICE); 239 write_c0_conf(config & ~TX39_CONF_ICE);
272 TX39_STOP_STREAMING(); 240 TX39_STOP_STREAMING();
273 while (1) { 241 protected_blast_icache_range(start, end);
274 /* Hit_Invalidate_I */
275 protected_flush_icache_line(addr);
276 if (addr == aend)
277 break;
278 addr += dc_lsize;
279 }
280 write_c0_conf(config); 242 write_c0_conf(config);
281 local_irq_restore(flags); 243 local_irq_restore(flags);
282 } 244 }
@@ -311,7 +273,7 @@ static void tx39_flush_icache_page(struct vm_area_struct *vma, struct page *page
311 273
312static void tx39_dma_cache_wback_inv(unsigned long addr, unsigned long size) 274static void tx39_dma_cache_wback_inv(unsigned long addr, unsigned long size)
313{ 275{
314 unsigned long end, a; 276 unsigned long end;
315 277
316 if (((size | addr) & (PAGE_SIZE - 1)) == 0) { 278 if (((size | addr) & (PAGE_SIZE - 1)) == 0) {
317 end = addr + size; 279 end = addr + size;
@@ -322,20 +284,13 @@ static void tx39_dma_cache_wback_inv(unsigned long addr, unsigned long size)
322 } else if (size > dcache_size) { 284 } else if (size > dcache_size) {
323 tx39_blast_dcache(); 285 tx39_blast_dcache();
324 } else { 286 } else {
325 unsigned long dc_lsize = current_cpu_data.dcache.linesz; 287 blast_dcache_range(addr, addr + size);
326 a = addr & ~(dc_lsize - 1);
327 end = (addr + size - 1) & ~(dc_lsize - 1);
328 while (1) {
329 flush_dcache_line(a); /* Hit_Writeback_Inv_D */
330 if (a == end) break;
331 a += dc_lsize;
332 }
333 } 288 }
334} 289}
335 290
336static void tx39_dma_cache_inv(unsigned long addr, unsigned long size) 291static void tx39_dma_cache_inv(unsigned long addr, unsigned long size)
337{ 292{
338 unsigned long end, a; 293 unsigned long end;
339 294
340 if (((size | addr) & (PAGE_SIZE - 1)) == 0) { 295 if (((size | addr) & (PAGE_SIZE - 1)) == 0) {
341 end = addr + size; 296 end = addr + size;
@@ -346,14 +301,7 @@ static void tx39_dma_cache_inv(unsigned long addr, unsigned long size)
346 } else if (size > dcache_size) { 301 } else if (size > dcache_size) {
347 tx39_blast_dcache(); 302 tx39_blast_dcache();
348 } else { 303 } else {
349 unsigned long dc_lsize = current_cpu_data.dcache.linesz; 304 blast_inv_dcache_range(addr, addr + size);
350 a = addr & ~(dc_lsize - 1);
351 end = (addr + size - 1) & ~(dc_lsize - 1);
352 while (1) {
353 invalidate_dcache_line(a); /* Hit_Invalidate_D */
354 if (a == end) break;
355 a += dc_lsize;
356 }
357 } 305 }
358} 306}
359 307
diff --git a/arch/mips/mm/cex-sb1.S b/arch/mips/mm/cex-sb1.S
index 0e71580774ff..e54a62f2807c 100644
--- a/arch/mips/mm/cex-sb1.S
+++ b/arch/mips/mm/cex-sb1.S
@@ -64,7 +64,7 @@ LEAF(except_vec2_sb1)
64 sd k0,0x170($0) 64 sd k0,0x170($0)
65 sd k1,0x178($0) 65 sd k1,0x178($0)
66 66
67#if CONFIG_SB1_CEX_ALWAYS_FATAL 67#ifdef CONFIG_SB1_CEX_ALWAYS_FATAL
68 j handle_vec2_sb1 68 j handle_vec2_sb1
69 nop 69 nop
70#else 70#else
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 0f9485806bac..ac4f4bfaae50 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -280,69 +280,69 @@ static void __init build_insn(u32 **buf, enum opcode opc, ...)
280} 280}
281 281
282#define I_u1u2u3(op) \ 282#define I_u1u2u3(op) \
283 static inline void i##op(u32 **buf, unsigned int a, \ 283 static inline void __init i##op(u32 **buf, unsigned int a, \
284 unsigned int b, unsigned int c) \ 284 unsigned int b, unsigned int c) \
285 { \ 285 { \
286 build_insn(buf, insn##op, a, b, c); \ 286 build_insn(buf, insn##op, a, b, c); \
287 } 287 }
288 288
289#define I_u2u1u3(op) \ 289#define I_u2u1u3(op) \
290 static inline void i##op(u32 **buf, unsigned int a, \ 290 static inline void __init i##op(u32 **buf, unsigned int a, \
291 unsigned int b, unsigned int c) \ 291 unsigned int b, unsigned int c) \
292 { \ 292 { \
293 build_insn(buf, insn##op, b, a, c); \ 293 build_insn(buf, insn##op, b, a, c); \
294 } 294 }
295 295
296#define I_u3u1u2(op) \ 296#define I_u3u1u2(op) \
297 static inline void i##op(u32 **buf, unsigned int a, \ 297 static inline void __init i##op(u32 **buf, unsigned int a, \
298 unsigned int b, unsigned int c) \ 298 unsigned int b, unsigned int c) \
299 { \ 299 { \
300 build_insn(buf, insn##op, b, c, a); \ 300 build_insn(buf, insn##op, b, c, a); \
301 } 301 }
302 302
303#define I_u1u2s3(op) \ 303#define I_u1u2s3(op) \
304 static inline void i##op(u32 **buf, unsigned int a, \ 304 static inline void __init i##op(u32 **buf, unsigned int a, \
305 unsigned int b, signed int c) \ 305 unsigned int b, signed int c) \
306 { \ 306 { \
307 build_insn(buf, insn##op, a, b, c); \ 307 build_insn(buf, insn##op, a, b, c); \
308 } 308 }
309 309
310#define I_u2s3u1(op) \ 310#define I_u2s3u1(op) \
311 static inline void i##op(u32 **buf, unsigned int a, \ 311 static inline void __init i##op(u32 **buf, unsigned int a, \
312 signed int b, unsigned int c) \ 312 signed int b, unsigned int c) \
313 { \ 313 { \
314 build_insn(buf, insn##op, c, a, b); \ 314 build_insn(buf, insn##op, c, a, b); \
315 } 315 }
316 316
317#define I_u2u1s3(op) \ 317#define I_u2u1s3(op) \
318 static inline void i##op(u32 **buf, unsigned int a, \ 318 static inline void __init i##op(u32 **buf, unsigned int a, \
319 unsigned int b, signed int c) \ 319 unsigned int b, signed int c) \
320 { \ 320 { \
321 build_insn(buf, insn##op, b, a, c); \ 321 build_insn(buf, insn##op, b, a, c); \
322 } 322 }
323 323
324#define I_u1u2(op) \ 324#define I_u1u2(op) \
325 static inline void i##op(u32 **buf, unsigned int a, \ 325 static inline void __init i##op(u32 **buf, unsigned int a, \
326 unsigned int b) \ 326 unsigned int b) \
327 { \ 327 { \
328 build_insn(buf, insn##op, a, b); \ 328 build_insn(buf, insn##op, a, b); \
329 } 329 }
330 330
331#define I_u1s2(op) \ 331#define I_u1s2(op) \
332 static inline void i##op(u32 **buf, unsigned int a, \ 332 static inline void __init i##op(u32 **buf, unsigned int a, \
333 signed int b) \ 333 signed int b) \
334 { \ 334 { \
335 build_insn(buf, insn##op, a, b); \ 335 build_insn(buf, insn##op, a, b); \
336 } 336 }
337 337
338#define I_u1(op) \ 338#define I_u1(op) \
339 static inline void i##op(u32 **buf, unsigned int a) \ 339 static inline void __init i##op(u32 **buf, unsigned int a) \
340 { \ 340 { \
341 build_insn(buf, insn##op, a); \ 341 build_insn(buf, insn##op, a); \
342 } 342 }
343 343
344#define I_0(op) \ 344#define I_0(op) \
345 static inline void i##op(u32 **buf) \ 345 static inline void __init i##op(u32 **buf) \
346 { \ 346 { \
347 build_insn(buf, insn##op); \ 347 build_insn(buf, insn##op); \
348 } 348 }
@@ -623,42 +623,42 @@ static __init int __attribute__((unused)) insn_has_bdelay(struct reloc *rel,
623} 623}
624 624
625/* convenience functions for labeled branches */ 625/* convenience functions for labeled branches */
626static void __attribute__((unused)) il_bltz(u32 **p, struct reloc **r, 626static void __init __attribute__((unused))
627 unsigned int reg, enum label_id l) 627 il_bltz(u32 **p, struct reloc **r, unsigned int reg, enum label_id l)
628{ 628{
629 r_mips_pc16(r, *p, l); 629 r_mips_pc16(r, *p, l);
630 i_bltz(p, reg, 0); 630 i_bltz(p, reg, 0);
631} 631}
632 632
633static void __attribute__((unused)) il_b(u32 **p, struct reloc **r, 633static void __init __attribute__((unused)) il_b(u32 **p, struct reloc **r,
634 enum label_id l) 634 enum label_id l)
635{ 635{
636 r_mips_pc16(r, *p, l); 636 r_mips_pc16(r, *p, l);
637 i_b(p, 0); 637 i_b(p, 0);
638} 638}
639 639
640static void il_beqz(u32 **p, struct reloc **r, unsigned int reg, 640static void __init il_beqz(u32 **p, struct reloc **r, unsigned int reg,
641 enum label_id l) 641 enum label_id l)
642{ 642{
643 r_mips_pc16(r, *p, l); 643 r_mips_pc16(r, *p, l);
644 i_beqz(p, reg, 0); 644 i_beqz(p, reg, 0);
645} 645}
646 646
647static void __attribute__((unused)) 647static void __init __attribute__((unused))
648il_beqzl(u32 **p, struct reloc **r, unsigned int reg, enum label_id l) 648il_beqzl(u32 **p, struct reloc **r, unsigned int reg, enum label_id l)
649{ 649{
650 r_mips_pc16(r, *p, l); 650 r_mips_pc16(r, *p, l);
651 i_beqzl(p, reg, 0); 651 i_beqzl(p, reg, 0);
652} 652}
653 653
654static void il_bnez(u32 **p, struct reloc **r, unsigned int reg, 654static void __init il_bnez(u32 **p, struct reloc **r, unsigned int reg,
655 enum label_id l) 655 enum label_id l)
656{ 656{
657 r_mips_pc16(r, *p, l); 657 r_mips_pc16(r, *p, l);
658 i_bnez(p, reg, 0); 658 i_bnez(p, reg, 0);
659} 659}
660 660
661static void il_bgezl(u32 **p, struct reloc **r, unsigned int reg, 661static void __init il_bgezl(u32 **p, struct reloc **r, unsigned int reg,
662 enum label_id l) 662 enum label_id l)
663{ 663{
664 r_mips_pc16(r, *p, l); 664 r_mips_pc16(r, *p, l);
diff --git a/arch/mips/momentum/jaguar_atx/prom.c b/arch/mips/momentum/jaguar_atx/prom.c
index aae7a802767a..1cadaa92946a 100644
--- a/arch/mips/momentum/jaguar_atx/prom.c
+++ b/arch/mips/momentum/jaguar_atx/prom.c
@@ -21,10 +21,10 @@
21#include <linux/mm.h> 21#include <linux/mm.h>
22#include <linux/sched.h> 22#include <linux/sched.h>
23#include <linux/bootmem.h> 23#include <linux/bootmem.h>
24#include <linux/mv643xx.h>
24 25
25#include <asm/addrspace.h> 26#include <asm/addrspace.h>
26#include <asm/bootinfo.h> 27#include <asm/bootinfo.h>
27#include <asm/mv64340.h>
28#include <asm/pmon.h> 28#include <asm/pmon.h>
29 29
30#include "jaguar_atx_fpga.h" 30#include "jaguar_atx_fpga.h"
diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c
index 301d67226d72..2699917b640a 100644
--- a/arch/mips/momentum/jaguar_atx/setup.c
+++ b/arch/mips/momentum/jaguar_atx/setup.c
@@ -2,7 +2,7 @@
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * Momentum Computer Jaguar-ATX board dependent boot routines 3 * Momentum Computer Jaguar-ATX board dependent boot routines
4 * 4 *
5 * Copyright (C) 1996, 1997, 2001, 2004 Ralf Baechle (ralf@linux-mips.org) 5 * Copyright (C) 1996, 1997, 2001, 04, 06 Ralf Baechle (ralf@linux-mips.org)
6 * Copyright (C) 2000 RidgeRun, Inc. 6 * Copyright (C) 2000 RidgeRun, Inc.
7 * Copyright (C) 2001 Red Hat, Inc. 7 * Copyright (C) 2001 Red Hat, Inc.
8 * Copyright (C) 2002 Momentum Computer 8 * Copyright (C) 2002 Momentum Computer
@@ -55,6 +55,8 @@
55#include <linux/interrupt.h> 55#include <linux/interrupt.h>
56#include <linux/timex.h> 56#include <linux/timex.h>
57#include <linux/vmalloc.h> 57#include <linux/vmalloc.h>
58#include <linux/mv643xx.h>
59
58#include <asm/time.h> 60#include <asm/time.h>
59#include <asm/bootinfo.h> 61#include <asm/bootinfo.h>
60#include <asm/page.h> 62#include <asm/page.h>
@@ -64,7 +66,6 @@
64#include <asm/ptrace.h> 66#include <asm/ptrace.h>
65#include <asm/reboot.h> 67#include <asm/reboot.h>
66#include <asm/tlbflush.h> 68#include <asm/tlbflush.h>
67#include <asm/mv64340.h>
68 69
69#include "jaguar_atx_fpga.h" 70#include "jaguar_atx_fpga.h"
70 71
diff --git a/arch/mips/momentum/ocelot_c/irq.c b/arch/mips/momentum/ocelot_c/irq.c
index 300fe8e4fbe8..a5764bc20e36 100644
--- a/arch/mips/momentum/ocelot_c/irq.c
+++ b/arch/mips/momentum/ocelot_c/irq.c
@@ -41,11 +41,11 @@
41#include <linux/slab.h> 41#include <linux/slab.h>
42#include <linux/random.h> 42#include <linux/random.h>
43#include <linux/bitops.h> 43#include <linux/bitops.h>
44#include <linux/mv643xx.h>
44#include <asm/bootinfo.h> 45#include <asm/bootinfo.h>
45#include <asm/io.h> 46#include <asm/io.h>
46#include <asm/irq_cpu.h> 47#include <asm/irq_cpu.h>
47#include <asm/mipsregs.h> 48#include <asm/mipsregs.h>
48#include <asm/mv64340.h>
49#include <asm/system.h> 49#include <asm/system.h>
50 50
51extern asmlinkage void ocelot_handle_int(void); 51extern asmlinkage void ocelot_handle_int(void);
diff --git a/arch/mips/momentum/ocelot_c/prom.c b/arch/mips/momentum/ocelot_c/prom.c
index 5b6809724b15..e92364482c7b 100644
--- a/arch/mips/momentum/ocelot_c/prom.c
+++ b/arch/mips/momentum/ocelot_c/prom.c
@@ -19,10 +19,10 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/bootmem.h> 21#include <linux/bootmem.h>
22#include <linux/mv643xx.h>
22 23
23#include <asm/addrspace.h> 24#include <asm/addrspace.h>
24#include <asm/bootinfo.h> 25#include <asm/bootinfo.h>
25#include <asm/mv64340.h>
26#include <asm/pmon.h> 26#include <asm/pmon.h>
27 27
28#include "ocelot_c_fpga.h" 28#include "ocelot_c_fpga.h"
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c
index 15998d8a9341..bd02e60d037a 100644
--- a/arch/mips/momentum/ocelot_c/setup.c
+++ b/arch/mips/momentum/ocelot_c/setup.c
@@ -54,6 +54,7 @@
54#include <linux/pm.h> 54#include <linux/pm.h>
55#include <linux/timex.h> 55#include <linux/timex.h>
56#include <linux/vmalloc.h> 56#include <linux/vmalloc.h>
57#include <linux/mv643xx.h>
57 58
58#include <asm/time.h> 59#include <asm/time.h>
59#include <asm/bootinfo.h> 60#include <asm/bootinfo.h>
@@ -64,9 +65,9 @@
64#include <asm/processor.h> 65#include <asm/processor.h>
65#include <asm/ptrace.h> 66#include <asm/ptrace.h>
66#include <asm/reboot.h> 67#include <asm/reboot.h>
68#include <asm/marvell.h>
67#include <linux/bootmem.h> 69#include <linux/bootmem.h>
68#include <linux/blkdev.h> 70#include <linux/blkdev.h>
69#include <asm/mv64340.h>
70#include "ocelot_c_fpga.h" 71#include "ocelot_c_fpga.h"
71 72
72unsigned long marvell_base; 73unsigned long marvell_base;
@@ -252,22 +253,22 @@ void __init plat_setup(void)
252 /* shut down ethernet ports, just to be sure our memory doesn't get 253 /* shut down ethernet ports, just to be sure our memory doesn't get
253 * corrupted by random ethernet traffic. 254 * corrupted by random ethernet traffic.
254 */ 255 */
255 MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8); 256 MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8);
256 MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8); 257 MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8);
257 MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8); 258 MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8);
258 MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8); 259 MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8);
259 do {} 260 do {}
260 while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff); 261 while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff);
261 do {} 262 do {}
262 while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff); 263 while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff);
263 do {} 264 do {}
264 while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff); 265 while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff);
265 do {} 266 do {}
266 while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff); 267 while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff);
267 MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0), 268 MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0),
268 MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1); 269 MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1);
269 MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1), 270 MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1),
270 MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1); 271 MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1);
271 272
272 /* Turn off the Bit-Error LED */ 273 /* Turn off the Bit-Error LED */
273 OCELOT_FPGA_WRITE(0x80, CLR); 274 OCELOT_FPGA_WRITE(0x80, CLR);
diff --git a/arch/mips/pci/pci-ocelot-c.c b/arch/mips/pci/pci-ocelot-c.c
index 1d84d36e034d..027759f7c904 100644
--- a/arch/mips/pci/pci-ocelot-c.c
+++ b/arch/mips/pci/pci-ocelot-c.c
@@ -3,15 +3,17 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) 6 * Copyright (C) 2004, 06 by Ralf Baechle (ralf@linux-mips.org)
7 */ 7 */
8 8
9#include <linux/types.h> 9#include <linux/types.h>
10#include <linux/pci.h> 10#include <linux/pci.h>
11#include <asm/mv64340.h> 11#include <linux/mv643xx.h>
12 12
13#include <linux/init.h> 13#include <linux/init.h>
14 14
15#include <asm/marvell.h>
16
15/* 17/*
16 * We assume the address ranges have already been setup appropriately by 18 * We assume the address ranges have already been setup appropriately by
17 * the firmware. PMON in case of the Ocelot C does that. 19 * the firmware. PMON in case of the Ocelot C does that.
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c
index f17f575f58f0..c197311e15d3 100644
--- a/arch/mips/pmc-sierra/yosemite/smp.c
+++ b/arch/mips/pmc-sierra/yosemite/smp.c
@@ -50,37 +50,25 @@ void __init prom_grab_secondary(void)
50 * We don't want to start the secondary CPU yet nor do we have a nice probing 50 * We don't want to start the secondary CPU yet nor do we have a nice probing
51 * feature in PMON so we just assume presence of the secondary core. 51 * feature in PMON so we just assume presence of the secondary core.
52 */ 52 */
53static char maxcpus_string[] __initdata = 53void __init plat_smp_setup(void)
54 KERN_WARNING "max_cpus set to 0; using 1 instead\n";
55
56void __init prom_prepare_cpus(unsigned int max_cpus)
57{ 54{
58 int enabled = 0, i; 55 int i;
59
60 if (max_cpus == 0) {
61 printk(maxcpus_string);
62 max_cpus = 1;
63 }
64 56
65 cpus_clear(phys_cpu_present_map); 57 cpus_clear(phys_cpu_present_map);
66 58
67 for (i = 0; i < 2; i++) { 59 for (i = 0; i < 2; i++) {
68 if (i == max_cpus)
69 break;
70
71 /*
72 * The boot CPU
73 */
74 cpu_set(i, phys_cpu_present_map); 60 cpu_set(i, phys_cpu_present_map);
75 __cpu_number_map[i] = i; 61 __cpu_number_map[i] = i;
76 __cpu_logical_map[i] = i; 62 __cpu_logical_map[i] = i;
77 enabled++;
78 } 63 }
64}
79 65
66void __init plat_prepare_cpus(unsigned int max_cpus)
67{
80 /* 68 /*
81 * Be paranoid. Enable the IPI only if we're really about to go SMP. 69 * Be paranoid. Enable the IPI only if we're really about to go SMP.
82 */ 70 */
83 if (enabled > 1) 71 if (cpus_weight(cpu_possible_map))
84 set_c0_status(STATUSF_IP5); 72 set_c0_status(STATUSF_IP5);
85} 73}
86 74
@@ -94,7 +82,7 @@ void __init prom_prepare_cpus(unsigned int max_cpus)
94void prom_boot_secondary(int cpu, struct task_struct *idle) 82void prom_boot_secondary(int cpu, struct task_struct *idle)
95{ 83{
96 unsigned long gp = (unsigned long) task_thread_info(idle); 84 unsigned long gp = (unsigned long) task_thread_info(idle);
97 unsigned long sp = __KSTK_TOP(idle); 85 unsigned long sp = __KSTK_TOS(idle);
98 86
99 secondary_sp = sp; 87 secondary_sp = sp;
100 secondary_gp = gp; 88 secondary_gp = gp;
diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c
index dbef3f6b5650..09fa7f5216f0 100644
--- a/arch/mips/sgi-ip27/ip27-smp.c
+++ b/arch/mips/sgi-ip27/ip27-smp.c
@@ -140,7 +140,7 @@ static __init void intr_clear_all(nasid_t nasid)
140 REMOTE_HUB_CLR_INTR(nasid, i); 140 REMOTE_HUB_CLR_INTR(nasid, i);
141} 141}
142 142
143void __init prom_prepare_cpus(unsigned int max_cpus) 143void __init plat_smp_setup(void)
144{ 144{
145 cnodeid_t cnode; 145 cnodeid_t cnode;
146 146
@@ -161,6 +161,11 @@ void __init prom_prepare_cpus(unsigned int max_cpus)
161 alloc_cpupda(0, 0); 161 alloc_cpupda(0, 0);
162} 162}
163 163
164void __init plat_prepare_cpus(unsigned int max_cpus)
165{
166 /* We already did everything necessary earlier */
167}
168
164/* 169/*
165 * Launch a slave into smp_bootstrap(). It doesn't take an argument, and we 170 * Launch a slave into smp_bootstrap(). It doesn't take an argument, and we
166 * set sp to the kernel stack of the newly created idle process, gp to the proc 171 * set sp to the kernel stack of the newly created idle process, gp to the proc
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index de46f62ac462..816aee7fcd25 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -102,11 +102,11 @@ config SIMULATION
102 Build a kernel suitable for running under the GDB simulator. 102 Build a kernel suitable for running under the GDB simulator.
103 Primarily adjusts the kernel's notion of time. 103 Primarily adjusts the kernel's notion of time.
104 104
105config CONFIG_SB1_CEX_ALWAYS_FATAL 105config SB1_CEX_ALWAYS_FATAL
106 bool "All cache exceptions considered fatal (no recovery attempted)" 106 bool "All cache exceptions considered fatal (no recovery attempted)"
107 depends on SIBYTE_SB1xxx_SOC 107 depends on SIBYTE_SB1xxx_SOC
108 108
109config CONFIG_SB1_CERR_STALL 109config SB1_CERR_STALL
110 bool "Stall (rather than panic) on fatal cache error" 110 bool "Stall (rather than panic) on fatal cache error"
111 depends on SIBYTE_SB1xxx_SOC 111 depends on SIBYTE_SB1xxx_SOC
112 112
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index b2a1ba5d23df..9cf7d713b13c 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -139,7 +139,7 @@ void bcm1480_unmask_irq(int cpu, int irq)
139#ifdef CONFIG_SMP 139#ifdef CONFIG_SMP
140static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask) 140static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
141{ 141{
142 int i = 0, old_cpu, cpu, int_on; 142 int i = 0, old_cpu, cpu, int_on, k;
143 u64 cur_ints; 143 u64 cur_ints;
144 irq_desc_t *desc = irq_desc + irq; 144 irq_desc_t *desc = irq_desc + irq;
145 unsigned long flags; 145 unsigned long flags;
@@ -165,7 +165,6 @@ static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask)
165 irq_dirty -= BCM1480_NR_IRQS_HALF; 165 irq_dirty -= BCM1480_NR_IRQS_HALF;
166 } 166 }
167 167
168 int k;
169 for (k=0; k<2; k++) { /* Loop through high and low interrupt mask register */ 168 for (k=0; k<2; k++) { /* Loop through high and low interrupt mask register */
170 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); 169 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING)));
171 int_on = !(cur_ints & (((u64) 1) << irq_dirty)); 170 int_on = !(cur_ints & (((u64) 1) << irq_dirty));
@@ -216,6 +215,7 @@ static void ack_bcm1480_irq(unsigned int irq)
216{ 215{
217 u64 pending; 216 u64 pending;
218 unsigned int irq_dirty; 217 unsigned int irq_dirty;
218 int k;
219 219
220 /* 220 /*
221 * If the interrupt was an HT interrupt, now is the time to 221 * If the interrupt was an HT interrupt, now is the time to
@@ -227,7 +227,6 @@ static void ack_bcm1480_irq(unsigned int irq)
227 if ((irq_dirty >= BCM1480_NR_IRQS_HALF) && (irq_dirty <= BCM1480_NR_IRQS)) { 227 if ((irq_dirty >= BCM1480_NR_IRQS_HALF) && (irq_dirty <= BCM1480_NR_IRQS)) {
228 irq_dirty -= BCM1480_NR_IRQS_HALF; 228 irq_dirty -= BCM1480_NR_IRQS_HALF;
229 } 229 }
230 int k;
231 for (k=0; k<2; k++) { /* Loop through high and low LDT interrupts */ 230 for (k=0; k<2; k++) { /* Loop through high and low LDT interrupts */
232 pending = __raw_readq(IOADDR(A_BCM1480_IMR_REGISTER(bcm1480_irq_owner[irq], 231 pending = __raw_readq(IOADDR(A_BCM1480_IMR_REGISTER(bcm1480_irq_owner[irq],
233 R_BCM1480_IMR_LDT_INTERRUPT_H + (k*BCM1480_IMR_HL_SPACING)))); 232 R_BCM1480_IMR_LDT_INTERRUPT_H + (k*BCM1480_IMR_HL_SPACING))));
diff --git a/arch/mips/sibyte/cfe/smp.c b/arch/mips/sibyte/cfe/smp.c
index 4477af3d8074..eab20e2db323 100644
--- a/arch/mips/sibyte/cfe/smp.c
+++ b/arch/mips/sibyte/cfe/smp.c
@@ -31,7 +31,7 @@
31 * 31 *
32 * Common setup before any secondaries are started 32 * Common setup before any secondaries are started
33 */ 33 */
34void __init prom_prepare_cpus(unsigned int max_cpus) 34void __init plat_smp_setup(void)
35{ 35{
36 int i, num; 36 int i, num;
37 37
@@ -40,14 +40,18 @@ void __init prom_prepare_cpus(unsigned int max_cpus)
40 __cpu_number_map[0] = 0; 40 __cpu_number_map[0] = 0;
41 __cpu_logical_map[0] = 0; 41 __cpu_logical_map[0] = 0;
42 42
43 for (i=1, num=0; i<NR_CPUS; i++) { 43 for (i = 1, num = 0; i < NR_CPUS; i++) {
44 if (cfe_cpu_stop(i) == 0) { 44 if (cfe_cpu_stop(i) == 0) {
45 cpu_set(i, phys_cpu_present_map); 45 cpu_set(i, phys_cpu_present_map);
46 __cpu_number_map[i] = ++num; 46 __cpu_number_map[i] = ++num;
47 __cpu_logical_map[num] = i; 47 __cpu_logical_map[num] = i;
48 } 48 }
49 } 49 }
50 printk("Detected %i available secondary CPU(s)\n", num); 50 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
51}
52
53void __init plat_prepare_cpus(unsigned int max_cpus)
54{
51} 55}
52 56
53/* 57/*
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-05 05:09:05 -0400