diff options
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/Kconfig.debug | 10 | ||||
-rw-r--r-- | arch/mips/configs/mipssim_defconfig | 1 | ||||
-rw-r--r-- | arch/mips/configs/pnx8550-jbs_defconfig | 1 | ||||
-rw-r--r-- | arch/mips/configs/pnx8550-stb810_defconfig | 1 | ||||
-rw-r--r-- | arch/mips/mm/c-r4k.c | 19 | ||||
-rw-r--r-- | arch/mips/mm/cache.c | 31 | ||||
-rw-r--r-- | arch/mips/philips/pnx8550/jbs/board_setup.c | 4 | ||||
-rw-r--r-- | arch/mips/philips/pnx8550/stb810/board_setup.c | 4 |
8 files changed, 45 insertions, 26 deletions
diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index fd7124c1b75a..f18cf92650e3 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug | |||
@@ -73,14 +73,4 @@ config RUNTIME_DEBUG | |||
73 | include/asm-mips/debug.h for debuging macros. | 73 | include/asm-mips/debug.h for debuging macros. |
74 | If unsure, say N. | 74 | If unsure, say N. |
75 | 75 | ||
76 | config MIPS_UNCACHED | ||
77 | bool "Run uncached" | ||
78 | depends on DEBUG_KERNEL && !SMP && !SGI_IP27 | ||
79 | help | ||
80 | If you say Y here there kernel will disable all CPU caches. This will | ||
81 | reduce the system's performance dramatically but can help finding | ||
82 | otherwise hard to track bugs. It can also useful if you're doing | ||
83 | hardware debugging with a logic analyzer and need to see all traffic | ||
84 | on the bus. | ||
85 | |||
86 | endmenu | 76 | endmenu |
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig index 6db0bdaefb27..4f6bce99d5cf 100644 --- a/arch/mips/configs/mipssim_defconfig +++ b/arch/mips/configs/mipssim_defconfig | |||
@@ -641,7 +641,6 @@ CONFIG_CROSSCOMPILE=y | |||
641 | CONFIG_CMDLINE="nfsroot=192.168.192.169:/u1/mipsel,timeo=20 ip=dhcp" | 641 | CONFIG_CMDLINE="nfsroot=192.168.192.169:/u1/mipsel,timeo=20 ip=dhcp" |
642 | # CONFIG_DEBUG_STACK_USAGE is not set | 642 | # CONFIG_DEBUG_STACK_USAGE is not set |
643 | # CONFIG_RUNTIME_DEBUG is not set | 643 | # CONFIG_RUNTIME_DEBUG is not set |
644 | # CONFIG_MIPS_UNCACHED is not set | ||
645 | 644 | ||
646 | # | 645 | # |
647 | # Security options | 646 | # Security options |
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig index 518a60892b78..780c7fc24b82 100644 --- a/arch/mips/configs/pnx8550-jbs_defconfig +++ b/arch/mips/configs/pnx8550-jbs_defconfig | |||
@@ -1223,7 +1223,6 @@ CONFIG_CMDLINE="console=ttyS1,38400n8 kgdb=ttyS0 root=/dev/nfs ip=bootp" | |||
1223 | # CONFIG_KGDB is not set | 1223 | # CONFIG_KGDB is not set |
1224 | CONFIG_SYS_SUPPORTS_KGDB=y | 1224 | CONFIG_SYS_SUPPORTS_KGDB=y |
1225 | # CONFIG_RUNTIME_DEBUG is not set | 1225 | # CONFIG_RUNTIME_DEBUG is not set |
1226 | # CONFIG_MIPS_UNCACHED is not set | ||
1227 | 1226 | ||
1228 | # | 1227 | # |
1229 | # Security options | 1228 | # Security options |
diff --git a/arch/mips/configs/pnx8550-stb810_defconfig b/arch/mips/configs/pnx8550-stb810_defconfig index 68351eb81bc8..267f21ed1d0f 100644 --- a/arch/mips/configs/pnx8550-stb810_defconfig +++ b/arch/mips/configs/pnx8550-stb810_defconfig | |||
@@ -1213,7 +1213,6 @@ CONFIG_CMDLINE="console=ttyS1,38400n8 kgdb=ttyS0 root=/dev/nfs ip=bootp" | |||
1213 | # CONFIG_KGDB is not set | 1213 | # CONFIG_KGDB is not set |
1214 | CONFIG_SYS_SUPPORTS_KGDB=y | 1214 | CONFIG_SYS_SUPPORTS_KGDB=y |
1215 | # CONFIG_RUNTIME_DEBUG is not set | 1215 | # CONFIG_RUNTIME_DEBUG is not set |
1216 | # CONFIG_MIPS_UNCACHED is not set | ||
1217 | 1216 | ||
1218 | # | 1217 | # |
1219 | # Security options | 1218 | # Security options |
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 77aefb4ebedd..3d3e53651341 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/linkage.h> | 14 | #include <linux/linkage.h> |
15 | #include <linux/sched.h> | 15 | #include <linux/sched.h> |
16 | #include <linux/mm.h> | 16 | #include <linux/mm.h> |
17 | #include <linux/module.h> | ||
17 | #include <linux/bitops.h> | 18 | #include <linux/bitops.h> |
18 | 19 | ||
19 | #include <asm/bcache.h> | 20 | #include <asm/bcache.h> |
@@ -1216,9 +1217,25 @@ void au1x00_fixup_config_od(void) | |||
1216 | } | 1217 | } |
1217 | } | 1218 | } |
1218 | 1219 | ||
1220 | static int __cpuinitdata cca = -1; | ||
1221 | |||
1222 | static int __init cca_setup(char *str) | ||
1223 | { | ||
1224 | get_option(&str, &cca); | ||
1225 | |||
1226 | return 1; | ||
1227 | } | ||
1228 | |||
1229 | __setup("cca=", cca_setup); | ||
1230 | |||
1219 | static void __cpuinit coherency_setup(void) | 1231 | static void __cpuinit coherency_setup(void) |
1220 | { | 1232 | { |
1221 | change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT); | 1233 | if (cca < 0 || cca > 7) |
1234 | cca = read_c0_config() & CONF_CM_CMASK; | ||
1235 | _page_cachable_default = cca << _CACHE_SHIFT; | ||
1236 | |||
1237 | pr_debug("Using cache attribute %d\n", cca); | ||
1238 | change_c0_config(CONF_CM_CMASK, cca); | ||
1222 | 1239 | ||
1223 | /* | 1240 | /* |
1224 | * c0_status.cu=0 specifies that updates by the sc instruction use | 1241 | * c0_status.cu=0 specifies that updates by the sc instruction use |
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c index f5903679ee6a..034e8506f6ea 100644 --- a/arch/mips/mm/cache.c +++ b/arch/mips/mm/cache.c | |||
@@ -130,8 +130,28 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address, | |||
130 | } | 130 | } |
131 | } | 131 | } |
132 | 132 | ||
133 | static char cache_panic[] __cpuinitdata = | 133 | unsigned long _page_cachable_default; |
134 | "Yeee, unsupported cache architecture."; | 134 | EXPORT_SYMBOL_GPL(_page_cachable_default); |
135 | |||
136 | static inline void setup_protection_map(void) | ||
137 | { | ||
138 | protection_map[0] = PAGE_NONE; | ||
139 | protection_map[1] = PAGE_READONLY; | ||
140 | protection_map[2] = PAGE_COPY; | ||
141 | protection_map[3] = PAGE_COPY; | ||
142 | protection_map[4] = PAGE_READONLY; | ||
143 | protection_map[5] = PAGE_READONLY; | ||
144 | protection_map[6] = PAGE_COPY; | ||
145 | protection_map[7] = PAGE_COPY; | ||
146 | protection_map[8] = PAGE_NONE; | ||
147 | protection_map[9] = PAGE_READONLY; | ||
148 | protection_map[10] = PAGE_SHARED; | ||
149 | protection_map[11] = PAGE_SHARED; | ||
150 | protection_map[12] = PAGE_READONLY; | ||
151 | protection_map[13] = PAGE_READONLY; | ||
152 | protection_map[14] = PAGE_SHARED; | ||
153 | protection_map[15] = PAGE_SHARED; | ||
154 | } | ||
135 | 155 | ||
136 | void __devinit cpu_cache_init(void) | 156 | void __devinit cpu_cache_init(void) |
137 | { | 157 | { |
@@ -139,34 +159,29 @@ void __devinit cpu_cache_init(void) | |||
139 | extern void __weak r3k_cache_init(void); | 159 | extern void __weak r3k_cache_init(void); |
140 | 160 | ||
141 | r3k_cache_init(); | 161 | r3k_cache_init(); |
142 | return; | ||
143 | } | 162 | } |
144 | if (cpu_has_6k_cache) { | 163 | if (cpu_has_6k_cache) { |
145 | extern void __weak r6k_cache_init(void); | 164 | extern void __weak r6k_cache_init(void); |
146 | 165 | ||
147 | r6k_cache_init(); | 166 | r6k_cache_init(); |
148 | return; | ||
149 | } | 167 | } |
150 | if (cpu_has_4k_cache) { | 168 | if (cpu_has_4k_cache) { |
151 | extern void __weak r4k_cache_init(void); | 169 | extern void __weak r4k_cache_init(void); |
152 | 170 | ||
153 | r4k_cache_init(); | 171 | r4k_cache_init(); |
154 | return; | ||
155 | } | 172 | } |
156 | if (cpu_has_8k_cache) { | 173 | if (cpu_has_8k_cache) { |
157 | extern void __weak r8k_cache_init(void); | 174 | extern void __weak r8k_cache_init(void); |
158 | 175 | ||
159 | r8k_cache_init(); | 176 | r8k_cache_init(); |
160 | return; | ||
161 | } | 177 | } |
162 | if (cpu_has_tx39_cache) { | 178 | if (cpu_has_tx39_cache) { |
163 | extern void __weak tx39_cache_init(void); | 179 | extern void __weak tx39_cache_init(void); |
164 | 180 | ||
165 | tx39_cache_init(); | 181 | tx39_cache_init(); |
166 | return; | ||
167 | } | 182 | } |
168 | 183 | ||
169 | panic(cache_panic); | 184 | setup_protection_map(); |
170 | } | 185 | } |
171 | 186 | ||
172 | int __weak __uncached_access(struct file *file, unsigned long addr) | 187 | int __weak __uncached_access(struct file *file, unsigned long addr) |
diff --git a/arch/mips/philips/pnx8550/jbs/board_setup.c b/arch/mips/philips/pnx8550/jbs/board_setup.c index f92826e0096d..e550a3e12f65 100644 --- a/arch/mips/philips/pnx8550/jbs/board_setup.c +++ b/arch/mips/philips/pnx8550/jbs/board_setup.c | |||
@@ -53,8 +53,8 @@ void __init board_setup(void) | |||
53 | 53 | ||
54 | /* clear all three cache coherency fields */ | 54 | /* clear all three cache coherency fields */ |
55 | config0 &= ~(0x7 | (7<<25) | (7<<28)); | 55 | config0 &= ~(0x7 | (7<<25) | (7<<28)); |
56 | config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) | | 56 | config0 |= (_page_cachable_default >> _CACHE_SHIFT) | |
57 | (CONF_CM_DEFAULT<<28)); | 57 | (CONF_CM_DEFAULT << 25) | (CONF_CM_DEFAULT << 28); |
58 | write_c0_config(config0); | 58 | write_c0_config(config0); |
59 | BARRIER; | 59 | BARRIER; |
60 | 60 | ||
diff --git a/arch/mips/philips/pnx8550/stb810/board_setup.c b/arch/mips/philips/pnx8550/stb810/board_setup.c index 345d71e53cf2..d461d7a62365 100644 --- a/arch/mips/philips/pnx8550/stb810/board_setup.c +++ b/arch/mips/philips/pnx8550/stb810/board_setup.c | |||
@@ -39,8 +39,8 @@ void __init board_setup(void) | |||
39 | 39 | ||
40 | /* clear all three cache coherency fields */ | 40 | /* clear all three cache coherency fields */ |
41 | config0 &= ~(0x7 | (7<<25) | (7<<28)); | 41 | config0 &= ~(0x7 | (7<<25) | (7<<28)); |
42 | config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) | | 42 | config0 |= (_page_cachable_default >> _CACHE_SHIFT) | |
43 | (CONF_CM_DEFAULT<<28)); | 43 | (CONF_CM_DEFAULT << 25) | (CONF_CM_DEFAULT << 28); |
44 | write_c0_config(config0); | 44 | write_c0_config(config0); |
45 | 45 | ||
46 | configpr = read_c0_config7(); | 46 | configpr = read_c0_config7(); |