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-rw-r--r--arch/mips/kernel/i8259.c5
-rw-r--r--arch/mips/kernel/irq-msc01.c10
-rw-r--r--arch/mips/kernel/irq.c10
-rw-r--r--arch/mips/kernel/scall64-o32.S2
-rw-r--r--arch/mips/kernel/smtc.c5
-rw-r--r--arch/mips/kernel/vmlinux.lds.S2
-rw-r--r--arch/mips/sgi-ip32/ip32-platform.c4
-rw-r--r--arch/mips/sibyte/bcm1480/setup.c2
8 files changed, 15 insertions, 25 deletions
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index b6c30800c667..3a2d255361bc 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -177,10 +177,7 @@ handle_real_irq:
177 outb(cached_master_mask, PIC_MASTER_IMR); 177 outb(cached_master_mask, PIC_MASTER_IMR);
178 outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */ 178 outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */
179 } 179 }
180#ifdef CONFIG_MIPS_MT_SMTC 180 smtc_im_ack_irq(irq);
181 if (irq_hwmask[irq] & ST0_IM)
182 set_c0_status(irq_hwmask[irq] & ST0_IM);
183#endif /* CONFIG_MIPS_MT_SMTC */
184 spin_unlock_irqrestore(&i8259A_lock, flags); 181 spin_unlock_irqrestore(&i8259A_lock, flags);
185 return; 182 return;
186 183
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 410868b5ea5f..1ecdd50bfc60 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -52,11 +52,8 @@ static void level_mask_and_ack_msc_irq(unsigned int irq)
52 mask_msc_irq(irq); 52 mask_msc_irq(irq);
53 if (!cpu_has_veic) 53 if (!cpu_has_veic)
54 MSCIC_WRITE(MSC01_IC_EOI, 0); 54 MSCIC_WRITE(MSC01_IC_EOI, 0);
55#ifdef CONFIG_MIPS_MT_SMTC
56 /* This actually needs to be a call into platform code */ 55 /* This actually needs to be a call into platform code */
57 if (irq_hwmask[irq] & ST0_IM) 56 smtc_im_ack_irq(irq);
58 set_c0_status(irq_hwmask[irq] & ST0_IM);
59#endif /* CONFIG_MIPS_MT_SMTC */
60} 57}
61 58
62/* 59/*
@@ -73,10 +70,7 @@ static void edge_mask_and_ack_msc_irq(unsigned int irq)
73 MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT); 70 MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT);
74 MSCIC_WRITE(MSC01_IC_SUP+irq*8, r); 71 MSCIC_WRITE(MSC01_IC_SUP+irq*8, r);
75 } 72 }
76#ifdef CONFIG_MIPS_MT_SMTC 73 smtc_im_ack_irq(irq);
77 if (irq_hwmask[irq] & ST0_IM)
78 set_c0_status(irq_hwmask[irq] & ST0_IM);
79#endif /* CONFIG_MIPS_MT_SMTC */
80} 74}
81 75
82/* 76/*
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index aeded6c17de5..a990aad2f049 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -74,20 +74,12 @@ EXPORT_SYMBOL_GPL(free_irqno);
74 */ 74 */
75void ack_bad_irq(unsigned int irq) 75void ack_bad_irq(unsigned int irq)
76{ 76{
77 smtc_im_ack_irq(irq);
77 printk("unexpected IRQ # %d\n", irq); 78 printk("unexpected IRQ # %d\n", irq);
78} 79}
79 80
80atomic_t irq_err_count; 81atomic_t irq_err_count;
81 82
82#ifdef CONFIG_MIPS_MT_SMTC
83/*
84 * SMTC Kernel needs to manipulate low-level CPU interrupt mask
85 * in do_IRQ. These are passed in setup_irq_smtc() and stored
86 * in this table.
87 */
88unsigned long irq_hwmask[NR_IRQS];
89#endif /* CONFIG_MIPS_MT_SMTC */
90
91/* 83/*
92 * Generic, controller-independent functions: 84 * Generic, controller-independent functions:
93 */ 85 */
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index b3ed731a24c6..dd68afce7da5 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -525,5 +525,5 @@ sys_call_table:
525 PTR compat_sys_signalfd 525 PTR compat_sys_signalfd
526 PTR compat_sys_timerfd 526 PTR compat_sys_timerfd
527 PTR sys_eventfd 527 PTR sys_eventfd
528 PTR sys_fallocate /* 4320 */ 528 PTR sys32_fallocate /* 4320 */
529 .size sys_call_table,.-sys_call_table 529 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 43826c16101d..f09404377ef1 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -25,8 +25,11 @@
25#include <asm/smtc_proc.h> 25#include <asm/smtc_proc.h>
26 26
27/* 27/*
28 * This file should be built into the kernel only if CONFIG_MIPS_MT_SMTC is set. 28 * SMTC Kernel needs to manipulate low-level CPU interrupt mask
29 * in do_IRQ. These are passed in setup_irq_smtc() and stored
30 * in this table.
29 */ 31 */
32unsigned long irq_hwmask[NR_IRQS];
30 33
31#define LOCK_MT_PRA() \ 34#define LOCK_MT_PRA() \
32 local_irq_save(flags); \ 35 local_irq_save(flags); \
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index 60bbaecde187..087ab997487d 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -45,6 +45,8 @@ SECTIONS
45 __dbe_table : { *(__dbe_table) } 45 __dbe_table : { *(__dbe_table) }
46 __stop___dbe_table = .; 46 __stop___dbe_table = .;
47 47
48 NOTES
49
48 RODATA 50 RODATA
49 51
50 /* writeable */ 52 /* writeable */
diff --git a/arch/mips/sgi-ip32/ip32-platform.c b/arch/mips/sgi-ip32/ip32-platform.c
index ba3697ee7ff6..7309e48d163d 100644
--- a/arch/mips/sgi-ip32/ip32-platform.c
+++ b/arch/mips/sgi-ip32/ip32-platform.c
@@ -41,8 +41,8 @@ static struct platform_device uart8250_device = {
41 41
42static int __init uart8250_init(void) 42static int __init uart8250_init(void)
43{ 43{
44 uart8250_data[0].iobase = (unsigned long) &mace->isa.serial1; 44 uart8250_data[0].membase = (void __iomem *) &mace->isa.serial1;
45 uart8250_data[1].iobase = (unsigned long) &mace->isa.serial1; 45 uart8250_data[1].membase = (void __iomem *) &mace->isa.serial1;
46 46
47 return platform_device_register(&uart8250_device); 47 return platform_device_register(&uart8250_device);
48} 48}
diff --git a/arch/mips/sibyte/bcm1480/setup.c b/arch/mips/sibyte/bcm1480/setup.c
index bb28f28e8042..7e1aa348b8e0 100644
--- a/arch/mips/sibyte/bcm1480/setup.c
+++ b/arch/mips/sibyte/bcm1480/setup.c
@@ -15,6 +15,7 @@
15 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 17 */
18#include <linux/init.h>
18#include <linux/kernel.h> 19#include <linux/kernel.h>
19#include <linux/module.h> 20#include <linux/module.h>
20#include <linux/reboot.h> 21#include <linux/reboot.h>
@@ -35,6 +36,7 @@ unsigned int soc_type;
35EXPORT_SYMBOL(soc_type); 36EXPORT_SYMBOL(soc_type);
36unsigned int periph_rev; 37unsigned int periph_rev;
37unsigned int zbbus_mhz; 38unsigned int zbbus_mhz;
39EXPORT_SYMBOL(zbbus_mhz);
38 40
39static unsigned int part_type; 41static unsigned int part_type;
40 42
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-03 15:01:32 -0500