diff options
Diffstat (limited to 'arch/mips')
39 files changed, 164 insertions, 126 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 177cdaf83564..b122adc8bdbb 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -24,6 +24,7 @@ config MIPS | |||
24 | select GENERIC_IRQ_PROBE | 24 | select GENERIC_IRQ_PROBE |
25 | select GENERIC_IRQ_SHOW | 25 | select GENERIC_IRQ_SHOW |
26 | select HAVE_ARCH_JUMP_LABEL | 26 | select HAVE_ARCH_JUMP_LABEL |
27 | select IRQ_FORCED_THREADING | ||
27 | 28 | ||
28 | menu "Machine selection" | 29 | menu "Machine selection" |
29 | 30 | ||
@@ -722,6 +723,7 @@ config CAVIUM_OCTEON_SIMULATOR | |||
722 | select SYS_SUPPORTS_HIGHMEM | 723 | select SYS_SUPPORTS_HIGHMEM |
723 | select SYS_SUPPORTS_HOTPLUG_CPU | 724 | select SYS_SUPPORTS_HOTPLUG_CPU |
724 | select SYS_HAS_CPU_CAVIUM_OCTEON | 725 | select SYS_HAS_CPU_CAVIUM_OCTEON |
726 | select HOLES_IN_ZONE | ||
725 | help | 727 | help |
726 | The Octeon simulator is software performance model of the Cavium | 728 | The Octeon simulator is software performance model of the Cavium |
727 | Octeon Processor. It supports simulating Octeon processors on x86 | 729 | Octeon Processor. It supports simulating Octeon processors on x86 |
@@ -744,6 +746,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD | |||
744 | select ZONE_DMA32 | 746 | select ZONE_DMA32 |
745 | select USB_ARCH_HAS_OHCI | 747 | select USB_ARCH_HAS_OHCI |
746 | select USB_ARCH_HAS_EHCI | 748 | select USB_ARCH_HAS_EHCI |
749 | select HOLES_IN_ZONE | ||
747 | help | 750 | help |
748 | This option supports all of the Octeon reference boards from Cavium | 751 | This option supports all of the Octeon reference boards from Cavium |
749 | Networks. It builds a kernel that dynamically determines the Octeon | 752 | Networks. It builds a kernel that dynamically determines the Octeon |
@@ -973,6 +976,9 @@ config ISA_DMA_API | |||
973 | config GENERIC_GPIO | 976 | config GENERIC_GPIO |
974 | bool | 977 | bool |
975 | 978 | ||
979 | config HOLES_IN_ZONE | ||
980 | bool | ||
981 | |||
976 | # | 982 | # |
977 | # Endianess selection. Sufficiently obscure so many users don't know what to | 983 | # Endianess selection. Sufficiently obscure so many users don't know what to |
978 | # answer,so we try hard to limit the available choices. Also the use of a | 984 | # answer,so we try hard to limit the available choices. Also the use of a |
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c index 3b2c18b14341..f72c48d4804c 100644 --- a/arch/mips/alchemy/common/platform.c +++ b/arch/mips/alchemy/common/platform.c | |||
@@ -492,7 +492,7 @@ static void __init alchemy_setup_macs(int ctype) | |||
492 | memcpy(au1xxx_eth0_platform_data.mac, ethaddr, 6); | 492 | memcpy(au1xxx_eth0_platform_data.mac, ethaddr, 6); |
493 | 493 | ||
494 | ret = platform_device_register(&au1xxx_eth0_device); | 494 | ret = platform_device_register(&au1xxx_eth0_device); |
495 | if (!ret) | 495 | if (ret) |
496 | printk(KERN_INFO "Alchemy: failed to register MAC0\n"); | 496 | printk(KERN_INFO "Alchemy: failed to register MAC0\n"); |
497 | 497 | ||
498 | 498 | ||
diff --git a/arch/mips/alchemy/common/power.c b/arch/mips/alchemy/common/power.c index 647e518c90bc..b86324a42601 100644 --- a/arch/mips/alchemy/common/power.c +++ b/arch/mips/alchemy/common/power.c | |||
@@ -158,15 +158,21 @@ static void restore_core_regs(void) | |||
158 | 158 | ||
159 | void au_sleep(void) | 159 | void au_sleep(void) |
160 | { | 160 | { |
161 | int cpuid = alchemy_get_cputype(); | 161 | save_core_regs(); |
162 | if (cpuid != ALCHEMY_CPU_UNKNOWN) { | 162 | |
163 | save_core_regs(); | 163 | switch (alchemy_get_cputype()) { |
164 | if (cpuid <= ALCHEMY_CPU_AU1500) | 164 | case ALCHEMY_CPU_AU1000: |
165 | alchemy_sleep_au1000(); | 165 | case ALCHEMY_CPU_AU1500: |
166 | else if (cpuid <= ALCHEMY_CPU_AU1200) | 166 | case ALCHEMY_CPU_AU1100: |
167 | alchemy_sleep_au1550(); | 167 | alchemy_sleep_au1000(); |
168 | restore_core_regs(); | 168 | break; |
169 | case ALCHEMY_CPU_AU1550: | ||
170 | case ALCHEMY_CPU_AU1200: | ||
171 | alchemy_sleep_au1550(); | ||
172 | break; | ||
169 | } | 173 | } |
174 | |||
175 | restore_core_regs(); | ||
170 | } | 176 | } |
171 | 177 | ||
172 | #endif /* CONFIG_PM */ | 178 | #endif /* CONFIG_PM */ |
diff --git a/arch/mips/alchemy/devboards/bcsr.c b/arch/mips/alchemy/devboards/bcsr.c index 596ad00e7f05..463d2c4d9441 100644 --- a/arch/mips/alchemy/devboards/bcsr.c +++ b/arch/mips/alchemy/devboards/bcsr.c | |||
@@ -89,8 +89,12 @@ static void bcsr_csc_handler(unsigned int irq, struct irq_desc *d) | |||
89 | { | 89 | { |
90 | unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT); | 90 | unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT); |
91 | 91 | ||
92 | disable_irq_nosync(irq); | ||
93 | |||
92 | for ( ; bisr; bisr &= bisr - 1) | 94 | for ( ; bisr; bisr &= bisr - 1) |
93 | generic_handle_irq(bcsr_csc_base + __ffs(bisr)); | 95 | generic_handle_irq(bcsr_csc_base + __ffs(bisr)); |
96 | |||
97 | enable_irq(irq); | ||
94 | } | 98 | } |
95 | 99 | ||
96 | /* NOTE: both the enable and mask bits must be cleared, otherwise the | 100 | /* NOTE: both the enable and mask bits must be cleared, otherwise the |
diff --git a/arch/mips/alchemy/devboards/db1200/setup.c b/arch/mips/alchemy/devboards/db1200/setup.c index 1dac4f27d334..4a8980027ecf 100644 --- a/arch/mips/alchemy/devboards/db1200/setup.c +++ b/arch/mips/alchemy/devboards/db1200/setup.c | |||
@@ -23,13 +23,6 @@ void __init board_setup(void) | |||
23 | unsigned long freq0, clksrc, div, pfc; | 23 | unsigned long freq0, clksrc, div, pfc; |
24 | unsigned short whoami; | 24 | unsigned short whoami; |
25 | 25 | ||
26 | /* Set Config[OD] (disable overlapping bus transaction): | ||
27 | * This gets rid of a _lot_ of spurious interrupts (especially | ||
28 | * wrt. IDE); but incurs ~10% performance hit in some | ||
29 | * cpu-bound applications. | ||
30 | */ | ||
31 | set_c0_config(1 << 19); | ||
32 | |||
33 | bcsr_init(DB1200_BCSR_PHYS_ADDR, | 26 | bcsr_init(DB1200_BCSR_PHYS_ADDR, |
34 | DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS); | 27 | DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS); |
35 | 28 | ||
diff --git a/arch/mips/ar7/irq.c b/arch/mips/ar7/irq.c index 03db3daadbd8..88c4babfdb5d 100644 --- a/arch/mips/ar7/irq.c +++ b/arch/mips/ar7/irq.c | |||
@@ -98,7 +98,8 @@ static struct irq_chip ar7_sec_irq_type = { | |||
98 | 98 | ||
99 | static struct irqaction ar7_cascade_action = { | 99 | static struct irqaction ar7_cascade_action = { |
100 | .handler = no_action, | 100 | .handler = no_action, |
101 | .name = "AR7 cascade interrupt" | 101 | .name = "AR7 cascade interrupt", |
102 | .flags = IRQF_NO_THREAD, | ||
102 | }; | 103 | }; |
103 | 104 | ||
104 | static void __init ar7_irq_init(int base) | 105 | static void __init ar7_irq_init(int base) |
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c index cea6021cb8d7..162e11b4ed75 100644 --- a/arch/mips/bcm63xx/irq.c +++ b/arch/mips/bcm63xx/irq.c | |||
@@ -222,6 +222,7 @@ static struct irq_chip bcm63xx_external_irq_chip = { | |||
222 | static struct irqaction cpu_ip2_cascade_action = { | 222 | static struct irqaction cpu_ip2_cascade_action = { |
223 | .handler = no_action, | 223 | .handler = no_action, |
224 | .name = "cascade_ip2", | 224 | .name = "cascade_ip2", |
225 | .flags = IRQF_NO_THREAD, | ||
225 | }; | 226 | }; |
226 | 227 | ||
227 | void __init arch_init_irq(void) | 228 | void __init arch_init_irq(void) |
diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c index cb9bf820fe53..965c777d3561 100644 --- a/arch/mips/cobalt/irq.c +++ b/arch/mips/cobalt/irq.c | |||
@@ -48,6 +48,7 @@ asmlinkage void plat_irq_dispatch(void) | |||
48 | static struct irqaction cascade = { | 48 | static struct irqaction cascade = { |
49 | .handler = no_action, | 49 | .handler = no_action, |
50 | .name = "cascade", | 50 | .name = "cascade", |
51 | .flags = IRQF_NO_THREAD, | ||
51 | }; | 52 | }; |
52 | 53 | ||
53 | void __init arch_init_irq(void) | 54 | void __init arch_init_irq(void) |
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index fa45e924be05..f7b7ba6d5c45 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c | |||
@@ -101,20 +101,24 @@ int cpu_fpu_mask = DEC_CPU_IRQ_MASK(DEC_CPU_INR_FPU); | |||
101 | static struct irqaction ioirq = { | 101 | static struct irqaction ioirq = { |
102 | .handler = no_action, | 102 | .handler = no_action, |
103 | .name = "cascade", | 103 | .name = "cascade", |
104 | .flags = IRQF_NO_THREAD, | ||
104 | }; | 105 | }; |
105 | static struct irqaction fpuirq = { | 106 | static struct irqaction fpuirq = { |
106 | .handler = no_action, | 107 | .handler = no_action, |
107 | .name = "fpu", | 108 | .name = "fpu", |
109 | .flags = IRQF_NO_THREAD, | ||
108 | }; | 110 | }; |
109 | 111 | ||
110 | static struct irqaction busirq = { | 112 | static struct irqaction busirq = { |
111 | .flags = IRQF_DISABLED, | 113 | .flags = IRQF_DISABLED, |
112 | .name = "bus error", | 114 | .name = "bus error", |
115 | .flags = IRQF_NO_THREAD, | ||
113 | }; | 116 | }; |
114 | 117 | ||
115 | static struct irqaction haltirq = { | 118 | static struct irqaction haltirq = { |
116 | .handler = dec_intr_halt, | 119 | .handler = dec_intr_halt, |
117 | .name = "halt", | 120 | .name = "halt", |
121 | .flags = IRQF_NO_THREAD, | ||
118 | }; | 122 | }; |
119 | 123 | ||
120 | 124 | ||
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index 3dbd7a5a6ad3..7798887a1288 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c | |||
@@ -169,7 +169,7 @@ void emma2rh_gpio_irq_init(void) | |||
169 | 169 | ||
170 | static struct irqaction irq_cascade = { | 170 | static struct irqaction irq_cascade = { |
171 | .handler = no_action, | 171 | .handler = no_action, |
172 | .flags = 0, | 172 | .flags = IRQF_NO_THREAD, |
173 | .name = "cascade", | 173 | .name = "cascade", |
174 | .dev_id = NULL, | 174 | .dev_id = NULL, |
175 | .next = NULL, | 175 | .next = NULL, |
diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h index 0d5a42b5f47a..a58addb98cfd 100644 --- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h | |||
@@ -54,7 +54,6 @@ | |||
54 | #define cpu_has_mips_r2_exec_hazard 0 | 54 | #define cpu_has_mips_r2_exec_hazard 0 |
55 | #define cpu_has_dsp 0 | 55 | #define cpu_has_dsp 0 |
56 | #define cpu_has_mipsmt 0 | 56 | #define cpu_has_mipsmt 0 |
57 | #define cpu_has_userlocal 0 | ||
58 | #define cpu_has_vint 0 | 57 | #define cpu_has_vint 0 |
59 | #define cpu_has_veic 0 | 58 | #define cpu_has_veic 0 |
60 | #define cpu_hwrena_impl_bits 0xc0000000 | 59 | #define cpu_hwrena_impl_bits 0xc0000000 |
diff --git a/arch/mips/include/asm/mach-powertv/dma-coherence.h b/arch/mips/include/asm/mach-powertv/dma-coherence.h index 62c094085947..35371641575d 100644 --- a/arch/mips/include/asm/mach-powertv/dma-coherence.h +++ b/arch/mips/include/asm/mach-powertv/dma-coherence.h | |||
@@ -13,7 +13,6 @@ | |||
13 | #define __ASM_MACH_POWERTV_DMA_COHERENCE_H | 13 | #define __ASM_MACH_POWERTV_DMA_COHERENCE_H |
14 | 14 | ||
15 | #include <linux/sched.h> | 15 | #include <linux/sched.h> |
16 | #include <linux/version.h> | ||
17 | #include <linux/device.h> | 16 | #include <linux/device.h> |
18 | #include <asm/mach-powertv/asic.h> | 17 | #include <asm/mach-powertv/asic.h> |
19 | 18 | ||
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h index b4ba2449444b..cb41af5f3406 100644 --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h | |||
@@ -195,9 +195,9 @@ | |||
195 | * to cover the pipeline delay. | 195 | * to cover the pipeline delay. |
196 | */ | 196 | */ |
197 | .set mips32 | 197 | .set mips32 |
198 | mfc0 v1, CP0_TCSTATUS | 198 | mfc0 k0, CP0_TCSTATUS |
199 | .set mips0 | 199 | .set mips0 |
200 | LONG_S v1, PT_TCSTATUS(sp) | 200 | LONG_S k0, PT_TCSTATUS(sp) |
201 | #endif /* CONFIG_MIPS_MT_SMTC */ | 201 | #endif /* CONFIG_MIPS_MT_SMTC */ |
202 | LONG_S $4, PT_R4(sp) | 202 | LONG_S $4, PT_R4(sp) |
203 | LONG_S $5, PT_R5(sp) | 203 | LONG_S $5, PT_R5(sp) |
diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c index 73031f7fc827..4397972949fa 100644 --- a/arch/mips/jz4740/gpio.c +++ b/arch/mips/jz4740/gpio.c | |||
@@ -18,7 +18,7 @@ | |||
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | 19 | ||
20 | #include <linux/spinlock.h> | 20 | #include <linux/spinlock.h> |
21 | #include <linux/sysdev.h> | 21 | #include <linux/syscore_ops.h> |
22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
23 | #include <linux/gpio.h> | 23 | #include <linux/gpio.h> |
24 | #include <linux/delay.h> | 24 | #include <linux/delay.h> |
@@ -86,7 +86,6 @@ struct jz_gpio_chip { | |||
86 | spinlock_t lock; | 86 | spinlock_t lock; |
87 | 87 | ||
88 | struct gpio_chip gpio_chip; | 88 | struct gpio_chip gpio_chip; |
89 | struct sys_device sysdev; | ||
90 | }; | 89 | }; |
91 | 90 | ||
92 | static struct jz_gpio_chip jz4740_gpio_chips[]; | 91 | static struct jz_gpio_chip jz4740_gpio_chips[]; |
@@ -459,49 +458,47 @@ static struct jz_gpio_chip jz4740_gpio_chips[] = { | |||
459 | JZ4740_GPIO_CHIP(D), | 458 | JZ4740_GPIO_CHIP(D), |
460 | }; | 459 | }; |
461 | 460 | ||
462 | static inline struct jz_gpio_chip *sysdev_to_chip(struct sys_device *dev) | 461 | static void jz4740_gpio_suspend_chip(struct jz_gpio_chip *chip) |
463 | { | 462 | { |
464 | return container_of(dev, struct jz_gpio_chip, sysdev); | 463 | chip->suspend_mask = readl(chip->base + JZ_REG_GPIO_MASK); |
464 | writel(~(chip->wakeup), chip->base + JZ_REG_GPIO_MASK_SET); | ||
465 | writel(chip->wakeup, chip->base + JZ_REG_GPIO_MASK_CLEAR); | ||
465 | } | 466 | } |
466 | 467 | ||
467 | static int jz4740_gpio_suspend(struct sys_device *dev, pm_message_t state) | 468 | static int jz4740_gpio_suspend(void) |
468 | { | 469 | { |
469 | struct jz_gpio_chip *chip = sysdev_to_chip(dev); | 470 | int i; |
470 | 471 | ||
471 | chip->suspend_mask = readl(chip->base + JZ_REG_GPIO_MASK); | 472 | for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); i++) |
472 | writel(~(chip->wakeup), chip->base + JZ_REG_GPIO_MASK_SET); | 473 | jz4740_gpio_suspend_chip(&jz4740_gpio_chips[i]); |
473 | writel(chip->wakeup, chip->base + JZ_REG_GPIO_MASK_CLEAR); | ||
474 | 474 | ||
475 | return 0; | 475 | return 0; |
476 | } | 476 | } |
477 | 477 | ||
478 | static int jz4740_gpio_resume(struct sys_device *dev) | 478 | static void jz4740_gpio_resume_chip(struct jz_gpio_chip *chip) |
479 | { | 479 | { |
480 | struct jz_gpio_chip *chip = sysdev_to_chip(dev); | ||
481 | uint32_t mask = chip->suspend_mask; | 480 | uint32_t mask = chip->suspend_mask; |
482 | 481 | ||
483 | writel(~mask, chip->base + JZ_REG_GPIO_MASK_CLEAR); | 482 | writel(~mask, chip->base + JZ_REG_GPIO_MASK_CLEAR); |
484 | writel(mask, chip->base + JZ_REG_GPIO_MASK_SET); | 483 | writel(mask, chip->base + JZ_REG_GPIO_MASK_SET); |
484 | } | ||
485 | 485 | ||
486 | return 0; | 486 | static void jz4740_gpio_resume(void) |
487 | { | ||
488 | int i; | ||
489 | |||
490 | for (i = ARRAY_SIZE(jz4740_gpio_chips) - 1; i >= 0 ; i--) | ||
491 | jz4740_gpio_resume_chip(&jz4740_gpio_chips[i]); | ||
487 | } | 492 | } |
488 | 493 | ||
489 | static struct sysdev_class jz4740_gpio_sysdev_class = { | 494 | static struct syscore_ops jz4740_gpio_syscore_ops = { |
490 | .name = "gpio", | ||
491 | .suspend = jz4740_gpio_suspend, | 495 | .suspend = jz4740_gpio_suspend, |
492 | .resume = jz4740_gpio_resume, | 496 | .resume = jz4740_gpio_resume, |
493 | }; | 497 | }; |
494 | 498 | ||
495 | static int jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) | 499 | static void jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) |
496 | { | 500 | { |
497 | int ret, irq; | 501 | int irq; |
498 | |||
499 | chip->sysdev.id = id; | ||
500 | chip->sysdev.cls = &jz4740_gpio_sysdev_class; | ||
501 | ret = sysdev_register(&chip->sysdev); | ||
502 | |||
503 | if (ret) | ||
504 | return ret; | ||
505 | 502 | ||
506 | spin_lock_init(&chip->lock); | 503 | spin_lock_init(&chip->lock); |
507 | 504 | ||
@@ -519,22 +516,17 @@ static int jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) | |||
519 | irq_set_chip_and_handler(irq, &jz_gpio_irq_chip, | 516 | irq_set_chip_and_handler(irq, &jz_gpio_irq_chip, |
520 | handle_level_irq); | 517 | handle_level_irq); |
521 | } | 518 | } |
522 | |||
523 | return 0; | ||
524 | } | 519 | } |
525 | 520 | ||
526 | static int __init jz4740_gpio_init(void) | 521 | static int __init jz4740_gpio_init(void) |
527 | { | 522 | { |
528 | unsigned int i; | 523 | unsigned int i; |
529 | int ret; | ||
530 | |||
531 | ret = sysdev_class_register(&jz4740_gpio_sysdev_class); | ||
532 | if (ret) | ||
533 | return ret; | ||
534 | 524 | ||
535 | for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i) | 525 | for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i) |
536 | jz4740_gpio_chip_init(&jz4740_gpio_chips[i], i); | 526 | jz4740_gpio_chip_init(&jz4740_gpio_chips[i], i); |
537 | 527 | ||
528 | register_syscore_ops(&jz4740_gpio_syscore_ops); | ||
529 | |||
538 | printk(KERN_INFO "JZ4740 GPIO initialized\n"); | 530 | printk(KERN_INFO "JZ4740 GPIO initialized\n"); |
539 | 531 | ||
540 | return 0; | 532 | return 0; |
diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c index feb8021a305f..6a2d758dd8e9 100644 --- a/arch/mips/kernel/ftrace.c +++ b/arch/mips/kernel/ftrace.c | |||
@@ -19,6 +19,26 @@ | |||
19 | 19 | ||
20 | #include <asm-generic/sections.h> | 20 | #include <asm-generic/sections.h> |
21 | 21 | ||
22 | #if defined(KBUILD_MCOUNT_RA_ADDRESS) && defined(CONFIG_32BIT) | ||
23 | #define MCOUNT_OFFSET_INSNS 5 | ||
24 | #else | ||
25 | #define MCOUNT_OFFSET_INSNS 4 | ||
26 | #endif | ||
27 | |||
28 | /* | ||
29 | * Check if the address is in kernel space | ||
30 | * | ||
31 | * Clone core_kernel_text() from kernel/extable.c, but doesn't call | ||
32 | * init_kernel_text() for Ftrace doesn't trace functions in init sections. | ||
33 | */ | ||
34 | static inline int in_kernel_space(unsigned long ip) | ||
35 | { | ||
36 | if (ip >= (unsigned long)_stext && | ||
37 | ip <= (unsigned long)_etext) | ||
38 | return 1; | ||
39 | return 0; | ||
40 | } | ||
41 | |||
22 | #ifdef CONFIG_DYNAMIC_FTRACE | 42 | #ifdef CONFIG_DYNAMIC_FTRACE |
23 | 43 | ||
24 | #define JAL 0x0c000000 /* jump & link: ip --> ra, jump to target */ | 44 | #define JAL 0x0c000000 /* jump & link: ip --> ra, jump to target */ |
@@ -54,20 +74,6 @@ static inline void ftrace_dyn_arch_init_insns(void) | |||
54 | #endif | 74 | #endif |
55 | } | 75 | } |
56 | 76 | ||
57 | /* | ||
58 | * Check if the address is in kernel space | ||
59 | * | ||
60 | * Clone core_kernel_text() from kernel/extable.c, but doesn't call | ||
61 | * init_kernel_text() for Ftrace doesn't trace functions in init sections. | ||
62 | */ | ||
63 | static inline int in_kernel_space(unsigned long ip) | ||
64 | { | ||
65 | if (ip >= (unsigned long)_stext && | ||
66 | ip <= (unsigned long)_etext) | ||
67 | return 1; | ||
68 | return 0; | ||
69 | } | ||
70 | |||
71 | static int ftrace_modify_code(unsigned long ip, unsigned int new_code) | 77 | static int ftrace_modify_code(unsigned long ip, unsigned int new_code) |
72 | { | 78 | { |
73 | int faulted; | 79 | int faulted; |
@@ -112,11 +118,6 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code) | |||
112 | * 1: offset = 4 instructions | 118 | * 1: offset = 4 instructions |
113 | */ | 119 | */ |
114 | 120 | ||
115 | #if defined(KBUILD_MCOUNT_RA_ADDRESS) && defined(CONFIG_32BIT) | ||
116 | #define MCOUNT_OFFSET_INSNS 5 | ||
117 | #else | ||
118 | #define MCOUNT_OFFSET_INSNS 4 | ||
119 | #endif | ||
120 | #define INSN_B_1F (0x10000000 | MCOUNT_OFFSET_INSNS) | 121 | #define INSN_B_1F (0x10000000 | MCOUNT_OFFSET_INSNS) |
121 | 122 | ||
122 | int ftrace_make_nop(struct module *mod, | 123 | int ftrace_make_nop(struct module *mod, |
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c index 5c74eb797f08..32b397b646ee 100644 --- a/arch/mips/kernel/i8259.c +++ b/arch/mips/kernel/i8259.c | |||
@@ -229,7 +229,7 @@ static void i8259A_shutdown(void) | |||
229 | */ | 229 | */ |
230 | if (i8259A_auto_eoi >= 0) { | 230 | if (i8259A_auto_eoi >= 0) { |
231 | outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ | 231 | outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ |
232 | outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-1 */ | 232 | outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */ |
233 | } | 233 | } |
234 | } | 234 | } |
235 | 235 | ||
@@ -295,6 +295,7 @@ static void init_8259A(int auto_eoi) | |||
295 | static struct irqaction irq2 = { | 295 | static struct irqaction irq2 = { |
296 | .handler = no_action, | 296 | .handler = no_action, |
297 | .name = "cascade", | 297 | .name = "cascade", |
298 | .flags = IRQF_NO_THREAD, | ||
298 | }; | 299 | }; |
299 | 300 | ||
300 | static struct resource pic1_io_resource = { | 301 | static struct resource pic1_io_resource = { |
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index 876a75cc376f..922a554cd108 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c | |||
@@ -349,3 +349,10 @@ SYSCALL_DEFINE6(32_fanotify_mark, int, fanotify_fd, unsigned int, flags, | |||
349 | return sys_fanotify_mark(fanotify_fd, flags, merge_64(a3, a4), | 349 | return sys_fanotify_mark(fanotify_fd, flags, merge_64(a3, a4), |
350 | dfd, pathname); | 350 | dfd, pathname); |
351 | } | 351 | } |
352 | |||
353 | SYSCALL_DEFINE6(32_futex, u32 __user *, uaddr, int, op, u32, val, | ||
354 | struct compat_timespec __user *, utime, u32 __user *, uaddr2, | ||
355 | u32, val3) | ||
356 | { | ||
357 | return compat_sys_futex(uaddr, op, val, utime, uaddr2, val3); | ||
358 | } | ||
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index f9296e894e46..6de1f598346e 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S | |||
@@ -315,7 +315,7 @@ EXPORT(sysn32_call_table) | |||
315 | PTR sys_fremovexattr | 315 | PTR sys_fremovexattr |
316 | PTR sys_tkill | 316 | PTR sys_tkill |
317 | PTR sys_ni_syscall | 317 | PTR sys_ni_syscall |
318 | PTR compat_sys_futex | 318 | PTR sys_32_futex |
319 | PTR compat_sys_sched_setaffinity /* 6195 */ | 319 | PTR compat_sys_sched_setaffinity /* 6195 */ |
320 | PTR compat_sys_sched_getaffinity | 320 | PTR compat_sys_sched_getaffinity |
321 | PTR sys_cacheflush | 321 | PTR sys_cacheflush |
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index 4d7c9827706f..1d813169e453 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S | |||
@@ -441,7 +441,7 @@ sys_call_table: | |||
441 | PTR sys_fremovexattr /* 4235 */ | 441 | PTR sys_fremovexattr /* 4235 */ |
442 | PTR sys_tkill | 442 | PTR sys_tkill |
443 | PTR sys_sendfile64 | 443 | PTR sys_sendfile64 |
444 | PTR compat_sys_futex | 444 | PTR sys_32_futex |
445 | PTR compat_sys_sched_setaffinity | 445 | PTR compat_sys_sched_setaffinity |
446 | PTR compat_sys_sched_getaffinity /* 4240 */ | 446 | PTR compat_sys_sched_getaffinity /* 4240 */ |
447 | PTR compat_sys_io_setup | 447 | PTR compat_sys_io_setup |
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c index dbbe0ce48d89..f8524003676a 100644 --- a/arch/mips/kernel/signal.c +++ b/arch/mips/kernel/signal.c | |||
@@ -8,6 +8,7 @@ | |||
8 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | 8 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. |
9 | */ | 9 | */ |
10 | #include <linux/cache.h> | 10 | #include <linux/cache.h> |
11 | #include <linux/irqflags.h> | ||
11 | #include <linux/sched.h> | 12 | #include <linux/sched.h> |
12 | #include <linux/mm.h> | 13 | #include <linux/mm.h> |
13 | #include <linux/personality.h> | 14 | #include <linux/personality.h> |
@@ -658,6 +659,8 @@ static void do_signal(struct pt_regs *regs) | |||
658 | asmlinkage void do_notify_resume(struct pt_regs *regs, void *unused, | 659 | asmlinkage void do_notify_resume(struct pt_regs *regs, void *unused, |
659 | __u32 thread_info_flags) | 660 | __u32 thread_info_flags) |
660 | { | 661 | { |
662 | local_irq_enable(); | ||
663 | |||
661 | /* deal with pending signal delivery */ | 664 | /* deal with pending signal delivery */ |
662 | if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)) | 665 | if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)) |
663 | do_signal(regs); | 666 | do_signal(regs); |
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index b7517e3abc85..cbea618af0b4 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/bug.h> | 14 | #include <linux/bug.h> |
15 | #include <linux/compiler.h> | 15 | #include <linux/compiler.h> |
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | #include <linux/kernel.h> | ||
17 | #include <linux/mm.h> | 18 | #include <linux/mm.h> |
18 | #include <linux/module.h> | 19 | #include <linux/module.h> |
19 | #include <linux/sched.h> | 20 | #include <linux/sched.h> |
@@ -364,21 +365,26 @@ static int regs_to_trapnr(struct pt_regs *regs) | |||
364 | return (regs->cp0_cause >> 2) & 0x1f; | 365 | return (regs->cp0_cause >> 2) & 0x1f; |
365 | } | 366 | } |
366 | 367 | ||
367 | static DEFINE_SPINLOCK(die_lock); | 368 | static DEFINE_RAW_SPINLOCK(die_lock); |
368 | 369 | ||
369 | void __noreturn die(const char *str, struct pt_regs *regs) | 370 | void __noreturn die(const char *str, struct pt_regs *regs) |
370 | { | 371 | { |
371 | static int die_counter; | 372 | static int die_counter; |
372 | int sig = SIGSEGV; | 373 | int sig = SIGSEGV; |
373 | #ifdef CONFIG_MIPS_MT_SMTC | 374 | #ifdef CONFIG_MIPS_MT_SMTC |
374 | unsigned long dvpret = dvpe(); | 375 | unsigned long dvpret; |
375 | #endif /* CONFIG_MIPS_MT_SMTC */ | 376 | #endif /* CONFIG_MIPS_MT_SMTC */ |
376 | 377 | ||
378 | oops_enter(); | ||
379 | |||
377 | if (notify_die(DIE_OOPS, str, regs, 0, regs_to_trapnr(regs), SIGSEGV) == NOTIFY_STOP) | 380 | if (notify_die(DIE_OOPS, str, regs, 0, regs_to_trapnr(regs), SIGSEGV) == NOTIFY_STOP) |
378 | sig = 0; | 381 | sig = 0; |
379 | 382 | ||
380 | console_verbose(); | 383 | console_verbose(); |
381 | spin_lock_irq(&die_lock); | 384 | raw_spin_lock_irq(&die_lock); |
385 | #ifdef CONFIG_MIPS_MT_SMTC | ||
386 | dvpret = dvpe(); | ||
387 | #endif /* CONFIG_MIPS_MT_SMTC */ | ||
382 | bust_spinlocks(1); | 388 | bust_spinlocks(1); |
383 | #ifdef CONFIG_MIPS_MT_SMTC | 389 | #ifdef CONFIG_MIPS_MT_SMTC |
384 | mips_mt_regdump(dvpret); | 390 | mips_mt_regdump(dvpret); |
@@ -387,7 +393,9 @@ void __noreturn die(const char *str, struct pt_regs *regs) | |||
387 | printk("%s[#%d]:\n", str, ++die_counter); | 393 | printk("%s[#%d]:\n", str, ++die_counter); |
388 | show_registers(regs); | 394 | show_registers(regs); |
389 | add_taint(TAINT_DIE); | 395 | add_taint(TAINT_DIE); |
390 | spin_unlock_irq(&die_lock); | 396 | raw_spin_unlock_irq(&die_lock); |
397 | |||
398 | oops_exit(); | ||
391 | 399 | ||
392 | if (in_interrupt()) | 400 | if (in_interrupt()) |
393 | panic("Fatal exception in interrupt"); | 401 | panic("Fatal exception in interrupt"); |
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 2cd50ad0d5c6..3efcb065f78a 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c | |||
@@ -192,7 +192,7 @@ static struct tc *get_tc(int index) | |||
192 | } | 192 | } |
193 | spin_unlock(&vpecontrol.tc_list_lock); | 193 | spin_unlock(&vpecontrol.tc_list_lock); |
194 | 194 | ||
195 | return NULL; | 195 | return res; |
196 | } | 196 | } |
197 | 197 | ||
198 | /* allocate a vpe and associate it with this minor (or index) */ | 198 | /* allocate a vpe and associate it with this minor (or index) */ |
diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c index fc89795cafdb..f9737bb3c5ab 100644 --- a/arch/mips/lantiq/irq.c +++ b/arch/mips/lantiq/irq.c | |||
@@ -123,11 +123,10 @@ void ltq_enable_irq(struct irq_data *d) | |||
123 | static unsigned int ltq_startup_eiu_irq(struct irq_data *d) | 123 | static unsigned int ltq_startup_eiu_irq(struct irq_data *d) |
124 | { | 124 | { |
125 | int i; | 125 | int i; |
126 | int irq_nr = d->irq - INT_NUM_IRQ0; | ||
127 | 126 | ||
128 | ltq_enable_irq(d); | 127 | ltq_enable_irq(d); |
129 | for (i = 0; i < MAX_EIU; i++) { | 128 | for (i = 0; i < MAX_EIU; i++) { |
130 | if (irq_nr == ltq_eiu_irq[i]) { | 129 | if (d->irq == ltq_eiu_irq[i]) { |
131 | /* low level - we should really handle set_type */ | 130 | /* low level - we should really handle set_type */ |
132 | ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_C) | | 131 | ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_C) | |
133 | (0x6 << (i * 4)), LTQ_EIU_EXIN_C); | 132 | (0x6 << (i * 4)), LTQ_EIU_EXIN_C); |
@@ -147,11 +146,10 @@ static unsigned int ltq_startup_eiu_irq(struct irq_data *d) | |||
147 | static void ltq_shutdown_eiu_irq(struct irq_data *d) | 146 | static void ltq_shutdown_eiu_irq(struct irq_data *d) |
148 | { | 147 | { |
149 | int i; | 148 | int i; |
150 | int irq_nr = d->irq - INT_NUM_IRQ0; | ||
151 | 149 | ||
152 | ltq_disable_irq(d); | 150 | ltq_disable_irq(d); |
153 | for (i = 0; i < MAX_EIU; i++) { | 151 | for (i = 0; i < MAX_EIU; i++) { |
154 | if (irq_nr == ltq_eiu_irq[i]) { | 152 | if (d->irq == ltq_eiu_irq[i]) { |
155 | /* disable */ | 153 | /* disable */ |
156 | ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_INEN) & ~(1 << i), | 154 | ltq_eiu_w32(ltq_eiu_r32(LTQ_EIU_EXIN_INEN) & ~(1 << i), |
157 | LTQ_EIU_EXIN_INEN); | 155 | LTQ_EIU_EXIN_INEN); |
diff --git a/arch/mips/lantiq/xway/ebu.c b/arch/mips/lantiq/xway/ebu.c index 66eb52fa50a1..033b3184c7a7 100644 --- a/arch/mips/lantiq/xway/ebu.c +++ b/arch/mips/lantiq/xway/ebu.c | |||
@@ -10,7 +10,6 @@ | |||
10 | 10 | ||
11 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/version.h> | ||
14 | #include <linux/ioport.h> | 13 | #include <linux/ioport.h> |
15 | 14 | ||
16 | #include <lantiq_soc.h> | 15 | #include <lantiq_soc.h> |
diff --git a/arch/mips/lantiq/xway/pmu.c b/arch/mips/lantiq/xway/pmu.c index 9d69f01e352b..39f0d2641cbf 100644 --- a/arch/mips/lantiq/xway/pmu.c +++ b/arch/mips/lantiq/xway/pmu.c | |||
@@ -8,7 +8,6 @@ | |||
8 | 8 | ||
9 | #include <linux/kernel.h> | 9 | #include <linux/kernel.h> |
10 | #include <linux/module.h> | 10 | #include <linux/module.h> |
11 | #include <linux/version.h> | ||
12 | #include <linux/ioport.h> | 11 | #include <linux/ioport.h> |
13 | 12 | ||
14 | #include <lantiq_soc.h> | 13 | #include <lantiq_soc.h> |
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c index de4c165515d7..d608b6ef0edd 100644 --- a/arch/mips/lasat/interrupt.c +++ b/arch/mips/lasat/interrupt.c | |||
@@ -105,6 +105,7 @@ asmlinkage void plat_irq_dispatch(void) | |||
105 | static struct irqaction cascade = { | 105 | static struct irqaction cascade = { |
106 | .handler = no_action, | 106 | .handler = no_action, |
107 | .name = "cascade", | 107 | .name = "cascade", |
108 | .flags = IRQF_NO_THREAD, | ||
108 | }; | 109 | }; |
109 | 110 | ||
110 | void __init arch_init_irq(void) | 111 | void __init arch_init_irq(void) |
diff --git a/arch/mips/loongson/fuloong-2e/irq.c b/arch/mips/loongson/fuloong-2e/irq.c index d61a04222b87..3cf1fef29f0e 100644 --- a/arch/mips/loongson/fuloong-2e/irq.c +++ b/arch/mips/loongson/fuloong-2e/irq.c | |||
@@ -42,6 +42,7 @@ asmlinkage void mach_irq_dispatch(unsigned int pending) | |||
42 | static struct irqaction cascade_irqaction = { | 42 | static struct irqaction cascade_irqaction = { |
43 | .handler = no_action, | 43 | .handler = no_action, |
44 | .name = "cascade", | 44 | .name = "cascade", |
45 | .flags = IRQF_NO_THREAD, | ||
45 | }; | 46 | }; |
46 | 47 | ||
47 | void __init mach_init_irq(void) | 48 | void __init mach_init_irq(void) |
diff --git a/arch/mips/loongson/lemote-2f/irq.c b/arch/mips/loongson/lemote-2f/irq.c index 081db102bb98..14b081841b6b 100644 --- a/arch/mips/loongson/lemote-2f/irq.c +++ b/arch/mips/loongson/lemote-2f/irq.c | |||
@@ -96,12 +96,13 @@ static irqreturn_t ip6_action(int cpl, void *dev_id) | |||
96 | struct irqaction ip6_irqaction = { | 96 | struct irqaction ip6_irqaction = { |
97 | .handler = ip6_action, | 97 | .handler = ip6_action, |
98 | .name = "cascade", | 98 | .name = "cascade", |
99 | .flags = IRQF_SHARED, | 99 | .flags = IRQF_SHARED | IRQF_NO_THREAD, |
100 | }; | 100 | }; |
101 | 101 | ||
102 | struct irqaction cascade_irqaction = { | 102 | struct irqaction cascade_irqaction = { |
103 | .handler = no_action, | 103 | .handler = no_action, |
104 | .name = "cascade", | 104 | .name = "cascade", |
105 | .flags = IRQF_NO_THREAD, | ||
105 | }; | 106 | }; |
106 | 107 | ||
107 | void __init mach_init_irq(void) | 108 | void __init mach_init_irq(void) |
diff --git a/arch/mips/mm/mmap.c b/arch/mips/mm/mmap.c index 9ff5d0fac556..302d779d5b0d 100644 --- a/arch/mips/mm/mmap.c +++ b/arch/mips/mm/mmap.c | |||
@@ -6,6 +6,7 @@ | |||
6 | * Copyright (C) 2011 Wind River Systems, | 6 | * Copyright (C) 2011 Wind River Systems, |
7 | * written by Ralf Baechle <ralf@linux-mips.org> | 7 | * written by Ralf Baechle <ralf@linux-mips.org> |
8 | */ | 8 | */ |
9 | #include <linux/compiler.h> | ||
9 | #include <linux/errno.h> | 10 | #include <linux/errno.h> |
10 | #include <linux/mm.h> | 11 | #include <linux/mm.h> |
11 | #include <linux/mman.h> | 12 | #include <linux/mman.h> |
@@ -15,12 +16,11 @@ | |||
15 | #include <linux/sched.h> | 16 | #include <linux/sched.h> |
16 | 17 | ||
17 | unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */ | 18 | unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */ |
18 | |||
19 | EXPORT_SYMBOL(shm_align_mask); | 19 | EXPORT_SYMBOL(shm_align_mask); |
20 | 20 | ||
21 | /* gap between mmap and stack */ | 21 | /* gap between mmap and stack */ |
22 | #define MIN_GAP (128*1024*1024UL) | 22 | #define MIN_GAP (128*1024*1024UL) |
23 | #define MAX_GAP ((TASK_SIZE)/6*5) | 23 | #define MAX_GAP ((TASK_SIZE)/6*5) |
24 | 24 | ||
25 | static int mmap_is_legacy(void) | 25 | static int mmap_is_legacy(void) |
26 | { | 26 | { |
@@ -57,13 +57,13 @@ static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr, | |||
57 | return base - off; | 57 | return base - off; |
58 | } | 58 | } |
59 | 59 | ||
60 | #define COLOUR_ALIGN(addr,pgoff) \ | 60 | #define COLOUR_ALIGN(addr, pgoff) \ |
61 | ((((addr) + shm_align_mask) & ~shm_align_mask) + \ | 61 | ((((addr) + shm_align_mask) & ~shm_align_mask) + \ |
62 | (((pgoff) << PAGE_SHIFT) & shm_align_mask)) | 62 | (((pgoff) << PAGE_SHIFT) & shm_align_mask)) |
63 | 63 | ||
64 | enum mmap_allocation_direction {UP, DOWN}; | 64 | enum mmap_allocation_direction {UP, DOWN}; |
65 | 65 | ||
66 | static unsigned long arch_get_unmapped_area_foo(struct file *filp, | 66 | static unsigned long arch_get_unmapped_area_common(struct file *filp, |
67 | unsigned long addr0, unsigned long len, unsigned long pgoff, | 67 | unsigned long addr0, unsigned long len, unsigned long pgoff, |
68 | unsigned long flags, enum mmap_allocation_direction dir) | 68 | unsigned long flags, enum mmap_allocation_direction dir) |
69 | { | 69 | { |
@@ -103,16 +103,16 @@ static unsigned long arch_get_unmapped_area_foo(struct file *filp, | |||
103 | 103 | ||
104 | vma = find_vma(mm, addr); | 104 | vma = find_vma(mm, addr); |
105 | if (TASK_SIZE - len >= addr && | 105 | if (TASK_SIZE - len >= addr && |
106 | (!vma || addr + len <= vma->vm_start)) | 106 | (!vma || addr + len <= vma->vm_start)) |
107 | return addr; | 107 | return addr; |
108 | } | 108 | } |
109 | 109 | ||
110 | if (dir == UP) { | 110 | if (dir == UP) { |
111 | addr = mm->mmap_base; | 111 | addr = mm->mmap_base; |
112 | if (do_color_align) | 112 | if (do_color_align) |
113 | addr = COLOUR_ALIGN(addr, pgoff); | 113 | addr = COLOUR_ALIGN(addr, pgoff); |
114 | else | 114 | else |
115 | addr = PAGE_ALIGN(addr); | 115 | addr = PAGE_ALIGN(addr); |
116 | 116 | ||
117 | for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) { | 117 | for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) { |
118 | /* At this point: (!vma || addr < vma->vm_end). */ | 118 | /* At this point: (!vma || addr < vma->vm_end). */ |
@@ -131,28 +131,30 @@ static unsigned long arch_get_unmapped_area_foo(struct file *filp, | |||
131 | mm->free_area_cache = mm->mmap_base; | 131 | mm->free_area_cache = mm->mmap_base; |
132 | } | 132 | } |
133 | 133 | ||
134 | /* either no address requested or can't fit in requested address hole */ | 134 | /* |
135 | * either no address requested, or the mapping can't fit into | ||
136 | * the requested address hole | ||
137 | */ | ||
135 | addr = mm->free_area_cache; | 138 | addr = mm->free_area_cache; |
136 | if (do_color_align) { | 139 | if (do_color_align) { |
137 | unsigned long base = | 140 | unsigned long base = |
138 | COLOUR_ALIGN_DOWN(addr - len, pgoff); | 141 | COLOUR_ALIGN_DOWN(addr - len, pgoff); |
139 | |||
140 | addr = base + len; | 142 | addr = base + len; |
141 | } | 143 | } |
142 | 144 | ||
143 | /* make sure it can fit in the remaining address space */ | 145 | /* make sure it can fit in the remaining address space */ |
144 | if (likely(addr > len)) { | 146 | if (likely(addr > len)) { |
145 | vma = find_vma(mm, addr - len); | 147 | vma = find_vma(mm, addr - len); |
146 | if (!vma || addr <= vma->vm_start) { | 148 | if (!vma || addr <= vma->vm_start) { |
147 | /* remember the address as a hint for next time */ | 149 | /* cache the address as a hint for next time */ |
148 | return mm->free_area_cache = addr-len; | 150 | return mm->free_area_cache = addr - len; |
149 | } | 151 | } |
150 | } | 152 | } |
151 | 153 | ||
152 | if (unlikely(mm->mmap_base < len)) | 154 | if (unlikely(mm->mmap_base < len)) |
153 | goto bottomup; | 155 | goto bottomup; |
154 | 156 | ||
155 | addr = mm->mmap_base-len; | 157 | addr = mm->mmap_base - len; |
156 | if (do_color_align) | 158 | if (do_color_align) |
157 | addr = COLOUR_ALIGN_DOWN(addr, pgoff); | 159 | addr = COLOUR_ALIGN_DOWN(addr, pgoff); |
158 | 160 | ||
@@ -163,8 +165,8 @@ static unsigned long arch_get_unmapped_area_foo(struct file *filp, | |||
163 | * return with success: | 165 | * return with success: |
164 | */ | 166 | */ |
165 | vma = find_vma(mm, addr); | 167 | vma = find_vma(mm, addr); |
166 | if (likely(!vma || addr+len <= vma->vm_start)) { | 168 | if (likely(!vma || addr + len <= vma->vm_start)) { |
167 | /* remember the address as a hint for next time */ | 169 | /* cache the address as a hint for next time */ |
168 | return mm->free_area_cache = addr; | 170 | return mm->free_area_cache = addr; |
169 | } | 171 | } |
170 | 172 | ||
@@ -173,7 +175,7 @@ static unsigned long arch_get_unmapped_area_foo(struct file *filp, | |||
173 | mm->cached_hole_size = vma->vm_start - addr; | 175 | mm->cached_hole_size = vma->vm_start - addr; |
174 | 176 | ||
175 | /* try just below the current vma->vm_start */ | 177 | /* try just below the current vma->vm_start */ |
176 | addr = vma->vm_start-len; | 178 | addr = vma->vm_start - len; |
177 | if (do_color_align) | 179 | if (do_color_align) |
178 | addr = COLOUR_ALIGN_DOWN(addr, pgoff); | 180 | addr = COLOUR_ALIGN_DOWN(addr, pgoff); |
179 | } while (likely(len < vma->vm_start)); | 181 | } while (likely(len < vma->vm_start)); |
@@ -201,7 +203,7 @@ bottomup: | |||
201 | unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr0, | 203 | unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr0, |
202 | unsigned long len, unsigned long pgoff, unsigned long flags) | 204 | unsigned long len, unsigned long pgoff, unsigned long flags) |
203 | { | 205 | { |
204 | return arch_get_unmapped_area_foo(filp, | 206 | return arch_get_unmapped_area_common(filp, |
205 | addr0, len, pgoff, flags, UP); | 207 | addr0, len, pgoff, flags, UP); |
206 | } | 208 | } |
207 | 209 | ||
@@ -213,7 +215,7 @@ unsigned long arch_get_unmapped_area_topdown(struct file *filp, | |||
213 | unsigned long addr0, unsigned long len, unsigned long pgoff, | 215 | unsigned long addr0, unsigned long len, unsigned long pgoff, |
214 | unsigned long flags) | 216 | unsigned long flags) |
215 | { | 217 | { |
216 | return arch_get_unmapped_area_foo(filp, | 218 | return arch_get_unmapped_area_common(filp, |
217 | addr0, len, pgoff, flags, DOWN); | 219 | addr0, len, pgoff, flags, DOWN); |
218 | } | 220 | } |
219 | 221 | ||
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index b6e1cff50667..e06370f58ef3 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c | |||
@@ -1759,14 +1759,13 @@ static void __cpuinit build_r3000_tlb_modify_handler(void) | |||
1759 | u32 *p = handle_tlbm; | 1759 | u32 *p = handle_tlbm; |
1760 | struct uasm_label *l = labels; | 1760 | struct uasm_label *l = labels; |
1761 | struct uasm_reloc *r = relocs; | 1761 | struct uasm_reloc *r = relocs; |
1762 | struct work_registers wr; | ||
1763 | 1762 | ||
1764 | memset(handle_tlbm, 0, sizeof(handle_tlbm)); | 1763 | memset(handle_tlbm, 0, sizeof(handle_tlbm)); |
1765 | memset(labels, 0, sizeof(labels)); | 1764 | memset(labels, 0, sizeof(labels)); |
1766 | memset(relocs, 0, sizeof(relocs)); | 1765 | memset(relocs, 0, sizeof(relocs)); |
1767 | 1766 | ||
1768 | build_r3000_tlbchange_handler_head(&p, K0, K1); | 1767 | build_r3000_tlbchange_handler_head(&p, K0, K1); |
1769 | build_pte_modifiable(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbm); | 1768 | build_pte_modifiable(&p, &r, K0, K1, -1, label_nopage_tlbm); |
1770 | uasm_i_nop(&p); /* load delay */ | 1769 | uasm_i_nop(&p); /* load delay */ |
1771 | build_make_write(&p, &r, K0, K1); | 1770 | build_make_write(&p, &r, K0, K1); |
1772 | build_r3000_pte_reload_tlbwi(&p, K0, K1); | 1771 | build_r3000_pte_reload_tlbwi(&p, K0, K1); |
@@ -1963,7 +1962,8 @@ static void __cpuinit build_r4000_tlb_load_handler(void) | |||
1963 | uasm_i_andi(&p, wr.r3, wr.r3, 2); | 1962 | uasm_i_andi(&p, wr.r3, wr.r3, 2); |
1964 | uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround2); | 1963 | uasm_il_beqz(&p, &r, wr.r3, label_tlbl_goaround2); |
1965 | } | 1964 | } |
1966 | 1965 | if (PM_DEFAULT_MASK == 0) | |
1966 | uasm_i_nop(&p); | ||
1967 | /* | 1967 | /* |
1968 | * We clobbered C0_PAGEMASK, restore it. On the other branch | 1968 | * We clobbered C0_PAGEMASK, restore it. On the other branch |
1969 | * it is restored in build_huge_tlb_write_entry. | 1969 | * it is restored in build_huge_tlb_write_entry. |
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index 1d36c511a7a5..d53ff91b277c 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c | |||
@@ -350,12 +350,14 @@ unsigned int plat_ipi_resched_int_xlate(unsigned int cpu) | |||
350 | 350 | ||
351 | static struct irqaction i8259irq = { | 351 | static struct irqaction i8259irq = { |
352 | .handler = no_action, | 352 | .handler = no_action, |
353 | .name = "XT-PIC cascade" | 353 | .name = "XT-PIC cascade", |
354 | .flags = IRQF_NO_THREAD, | ||
354 | }; | 355 | }; |
355 | 356 | ||
356 | static struct irqaction corehi_irqaction = { | 357 | static struct irqaction corehi_irqaction = { |
357 | .handler = no_action, | 358 | .handler = no_action, |
358 | .name = "CoreHi" | 359 | .name = "CoreHi", |
360 | .flags = IRQF_NO_THREAD, | ||
359 | }; | 361 | }; |
360 | 362 | ||
361 | static msc_irqmap_t __initdata msc_irqmap[] = { | 363 | static msc_irqmap_t __initdata msc_irqmap[] = { |
diff --git a/arch/mips/netlogic/xlr/Makefile b/arch/mips/netlogic/xlr/Makefile index 9bd3f731f62e..2dca585dd2f7 100644 --- a/arch/mips/netlogic/xlr/Makefile +++ b/arch/mips/netlogic/xlr/Makefile | |||
@@ -2,4 +2,4 @@ obj-y += setup.o platform.o irq.o setup.o time.o | |||
2 | obj-$(CONFIG_SMP) += smp.o smpboot.o | 2 | obj-$(CONFIG_SMP) += smp.o smpboot.o |
3 | obj-$(CONFIG_EARLY_PRINTK) += xlr_console.o | 3 | obj-$(CONFIG_EARLY_PRINTK) += xlr_console.o |
4 | 4 | ||
5 | EXTRA_CFLAGS += -Werror | 5 | ccflags-y += -Werror |
diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c index 603d7493e966..8656388b34bd 100644 --- a/arch/mips/pci/pci-lantiq.c +++ b/arch/mips/pci/pci-lantiq.c | |||
@@ -171,8 +171,13 @@ static int __devinit ltq_pci_startup(struct ltq_pci_data *conf) | |||
171 | u32 temp_buffer; | 171 | u32 temp_buffer; |
172 | 172 | ||
173 | /* set clock to 33Mhz */ | 173 | /* set clock to 33Mhz */ |
174 | ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0xf00000, LTQ_CGU_IFCCR); | 174 | if (ltq_is_ar9()) { |
175 | ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0x800000, LTQ_CGU_IFCCR); | 175 | ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0x1f00000, LTQ_CGU_IFCCR); |
176 | ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0xe00000, LTQ_CGU_IFCCR); | ||
177 | } else { | ||
178 | ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0xf00000, LTQ_CGU_IFCCR); | ||
179 | ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0x800000, LTQ_CGU_IFCCR); | ||
180 | } | ||
176 | 181 | ||
177 | /* external or internal clock ? */ | 182 | /* external or internal clock ? */ |
178 | if (conf->clock) { | 183 | if (conf->clock) { |
diff --git a/arch/mips/pci/pci-rc32434.c b/arch/mips/pci/pci-rc32434.c index 764362ce5e40..5f3a69cebad1 100644 --- a/arch/mips/pci/pci-rc32434.c +++ b/arch/mips/pci/pci-rc32434.c | |||
@@ -215,7 +215,7 @@ static int __init rc32434_pci_init(void) | |||
215 | rc32434_pcibridge_init(); | 215 | rc32434_pcibridge_init(); |
216 | 216 | ||
217 | io_map_base = ioremap(rc32434_res_pci_io1.start, | 217 | io_map_base = ioremap(rc32434_res_pci_io1.start, |
218 | resource_size(&rcrc32434_res_pci_io1)); | 218 | resource_size(&rc32434_res_pci_io1)); |
219 | 219 | ||
220 | if (!io_map_base) | 220 | if (!io_map_base) |
221 | return -ENOMEM; | 221 | return -ENOMEM; |
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq.c b/arch/mips/pmc-sierra/msp71xx/msp_irq.c index 4531c4a514bc..d3c3d81757a5 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_irq.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_irq.c | |||
@@ -108,12 +108,14 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | |||
108 | 108 | ||
109 | static struct irqaction cic_cascade_msp = { | 109 | static struct irqaction cic_cascade_msp = { |
110 | .handler = no_action, | 110 | .handler = no_action, |
111 | .name = "MSP CIC cascade" | 111 | .name = "MSP CIC cascade", |
112 | .flags = IRQF_NO_THREAD, | ||
112 | }; | 113 | }; |
113 | 114 | ||
114 | static struct irqaction per_cascade_msp = { | 115 | static struct irqaction per_cascade_msp = { |
115 | .handler = no_action, | 116 | .handler = no_action, |
116 | .name = "MSP PER cascade" | 117 | .name = "MSP PER cascade", |
118 | .flags = IRQF_NO_THREAD, | ||
117 | }; | 119 | }; |
118 | 120 | ||
119 | void __init arch_init_irq(void) | 121 | void __init arch_init_irq(void) |
diff --git a/arch/mips/pnx8550/common/int.c b/arch/mips/pnx8550/common/int.c index 6b93c81779c1..1ebe22bdadc8 100644 --- a/arch/mips/pnx8550/common/int.c +++ b/arch/mips/pnx8550/common/int.c | |||
@@ -167,7 +167,7 @@ static struct irq_chip level_irq_type = { | |||
167 | 167 | ||
168 | static struct irqaction gic_action = { | 168 | static struct irqaction gic_action = { |
169 | .handler = no_action, | 169 | .handler = no_action, |
170 | .flags = IRQF_DISABLED, | 170 | .flags = IRQF_DISABLED | IRQF_NO_THREAD, |
171 | .name = "GIC", | 171 | .name = "GIC", |
172 | }; | 172 | }; |
173 | 173 | ||
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c index b4d08e4d2ea9..f72c336ea27b 100644 --- a/arch/mips/sgi-ip22/ip22-int.c +++ b/arch/mips/sgi-ip22/ip22-int.c | |||
@@ -155,32 +155,32 @@ static void __irq_entry indy_buserror_irq(void) | |||
155 | 155 | ||
156 | static struct irqaction local0_cascade = { | 156 | static struct irqaction local0_cascade = { |
157 | .handler = no_action, | 157 | .handler = no_action, |
158 | .flags = IRQF_DISABLED, | 158 | .flags = IRQF_DISABLED | IRQF_NO_THREAD, |
159 | .name = "local0 cascade", | 159 | .name = "local0 cascade", |
160 | }; | 160 | }; |
161 | 161 | ||
162 | static struct irqaction local1_cascade = { | 162 | static struct irqaction local1_cascade = { |
163 | .handler = no_action, | 163 | .handler = no_action, |
164 | .flags = IRQF_DISABLED, | 164 | .flags = IRQF_DISABLED | IRQF_NO_THREAD, |
165 | .name = "local1 cascade", | 165 | .name = "local1 cascade", |
166 | }; | 166 | }; |
167 | 167 | ||
168 | static struct irqaction buserr = { | 168 | static struct irqaction buserr = { |
169 | .handler = no_action, | 169 | .handler = no_action, |
170 | .flags = IRQF_DISABLED, | 170 | .flags = IRQF_DISABLED | IRQF_NO_THREAD, |
171 | .name = "Bus Error", | 171 | .name = "Bus Error", |
172 | }; | 172 | }; |
173 | 173 | ||
174 | static struct irqaction map0_cascade = { | 174 | static struct irqaction map0_cascade = { |
175 | .handler = no_action, | 175 | .handler = no_action, |
176 | .flags = IRQF_DISABLED, | 176 | .flags = IRQF_DISABLED | IRQF_NO_THREAD, |
177 | .name = "mapable0 cascade", | 177 | .name = "mapable0 cascade", |
178 | }; | 178 | }; |
179 | 179 | ||
180 | #ifdef USE_LIO3_IRQ | 180 | #ifdef USE_LIO3_IRQ |
181 | static struct irqaction map1_cascade = { | 181 | static struct irqaction map1_cascade = { |
182 | .handler = no_action, | 182 | .handler = no_action, |
183 | .flags = IRQF_DISABLED, | 183 | .flags = IRQF_DISABLED | IRQF_NO_THREAD, |
184 | .name = "mapable1 cascade", | 184 | .name = "mapable1 cascade", |
185 | }; | 185 | }; |
186 | #define SGI_INTERRUPTS SGINT_END | 186 | #define SGI_INTERRUPTS SGINT_END |
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c index a7e5a6d917b1..3ab5b5d25b0a 100644 --- a/arch/mips/sni/rm200.c +++ b/arch/mips/sni/rm200.c | |||
@@ -359,6 +359,7 @@ void sni_rm200_init_8259A(void) | |||
359 | static struct irqaction sni_rm200_irq2 = { | 359 | static struct irqaction sni_rm200_irq2 = { |
360 | .handler = no_action, | 360 | .handler = no_action, |
361 | .name = "cascade", | 361 | .name = "cascade", |
362 | .flags = IRQF_NO_THREAD, | ||
362 | }; | 363 | }; |
363 | 364 | ||
364 | static struct resource sni_rm200_pic1_resource = { | 365 | static struct resource sni_rm200_pic1_resource = { |
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 70a3b85f3757..fad2bef432cd 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c | |||
@@ -34,6 +34,7 @@ static irq_cascade_t irq_cascade[NR_IRQS] __cacheline_aligned; | |||
34 | static struct irqaction cascade_irqaction = { | 34 | static struct irqaction cascade_irqaction = { |
35 | .handler = no_action, | 35 | .handler = no_action, |
36 | .name = "cascade", | 36 | .name = "cascade", |
37 | .flags = IRQF_NO_THREAD, | ||
37 | }; | 38 | }; |
38 | 39 | ||
39 | int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int)) | 40 | int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int)) |