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-rw-r--r--arch/mips/Kconfig6
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c27
-rw-r--r--arch/mips/vr41xx/Kconfig5
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/irq.c9
4 files changed, 9 insertions, 38 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7078bf4b6bc3..e58928a9104d 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -165,6 +165,7 @@ config MIPS_COBALT
165 select SYS_SUPPORTS_32BIT_KERNEL 165 select SYS_SUPPORTS_32BIT_KERNEL
166 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 166 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
167 select SYS_SUPPORTS_LITTLE_ENDIAN 167 select SYS_SUPPORTS_LITTLE_ENDIAN
168 select GENERIC_HARDIRQS_NO__DO_IRQ
168 169
169config MACH_DECSTATION 170config MACH_DECSTATION
170 bool "DECstations" 171 bool "DECstations"
@@ -225,6 +226,7 @@ config MACH_JAZZ
225 select SYS_SUPPORTS_32BIT_KERNEL 226 select SYS_SUPPORTS_32BIT_KERNEL
226 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 227 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
227 select SYS_SUPPORTS_100HZ 228 select SYS_SUPPORTS_100HZ
229 select GENERIC_HARDIRQS_NO__DO_IRQ
228 help 230 help
229 This a family of machines based on the MIPS R4030 chipset which was 231 This a family of machines based on the MIPS R4030 chipset which was
230 used by several vendors to build RISC/os and Windows NT workstations. 232 used by several vendors to build RISC/os and Windows NT workstations.
@@ -482,6 +484,7 @@ config MACH_VR41XX
482 select SYS_HAS_CPU_VR41XX 484 select SYS_HAS_CPU_VR41XX
483 select SYS_SUPPORTS_32BIT_KERNEL 485 select SYS_SUPPORTS_32BIT_KERNEL
484 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 486 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
487 select GENERIC_HARDIRQS_NO__DO_IRQ
485 488
486config PMC_YOSEMITE 489config PMC_YOSEMITE
487 bool "PMC-Sierra Yosemite eval board" 490 bool "PMC-Sierra Yosemite eval board"
@@ -515,6 +518,7 @@ config QEMU
515 select SYS_SUPPORTS_BIG_ENDIAN 518 select SYS_SUPPORTS_BIG_ENDIAN
516 select SYS_SUPPORTS_LITTLE_ENDIAN 519 select SYS_SUPPORTS_LITTLE_ENDIAN
517 select ARCH_SPARSEMEM_ENABLE 520 select ARCH_SPARSEMEM_ENABLE
521 select GENERIC_HARDIRQS_NO__DO_IRQ
518 help 522 help
519 Qemu is a software emulator which among other architectures also 523 Qemu is a software emulator which among other architectures also
520 can simulate a MIPS32 4Kc system. This patch adds support for the 524 can simulate a MIPS32 4Kc system. This patch adds support for the
@@ -754,6 +758,7 @@ config TOSHIBA_RBTX4927
754 select SYS_SUPPORTS_64BIT_KERNEL 758 select SYS_SUPPORTS_64BIT_KERNEL
755 select SYS_SUPPORTS_BIG_ENDIAN 759 select SYS_SUPPORTS_BIG_ENDIAN
756 select TOSHIBA_BOARDS 760 select TOSHIBA_BOARDS
761 select GENERIC_HARDIRQS_NO__DO_IRQ
757 help 762 help
758 This Toshiba board is based on the TX4927 processor. Say Y here to 763 This Toshiba board is based on the TX4927 processor. Say Y here to
759 support this machine type 764 support this machine type
@@ -773,6 +778,7 @@ config TOSHIBA_RBTX4938
773 select SYS_SUPPORTS_LITTLE_ENDIAN 778 select SYS_SUPPORTS_LITTLE_ENDIAN
774 select SYS_SUPPORTS_BIG_ENDIAN 779 select SYS_SUPPORTS_BIG_ENDIAN
775 select TOSHIBA_BOARDS 780 select TOSHIBA_BOARDS
781 select GENERIC_HARDIRQS_NO__DO_IRQ
776 help 782 help
777 This Toshiba board is based on the TX4938 processor. Say Y here to 783 This Toshiba board is based on the TX4938 processor. Say Y here to
778 support this machine type 784 support this machine type
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index 5a5ea6c0b9f6..b54b529a29f9 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -158,7 +158,6 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB
158#define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE ( 1 << 23 ) 158#define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE ( 1 << 23 )
159#define TOSHIBA_RBTX4927_IRQ_ISA_DISABLE ( 1 << 24 ) 159#define TOSHIBA_RBTX4927_IRQ_ISA_DISABLE ( 1 << 24 )
160#define TOSHIBA_RBTX4927_IRQ_ISA_MASK ( 1 << 25 ) 160#define TOSHIBA_RBTX4927_IRQ_ISA_MASK ( 1 << 25 )
161#define TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ ( 1 << 26 )
162 161
163#define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff 162#define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff
164#endif 163#endif
@@ -175,7 +174,6 @@ static const u32 toshiba_rbtx4927_irq_debug_flag =
175// | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE 174// | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE
176// | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE 175// | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE
177// | TOSHIBA_RBTX4927_IRQ_ISA_MASK 176// | TOSHIBA_RBTX4927_IRQ_ISA_MASK
178// | TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ
179 ); 177 );
180#endif 178#endif
181 179
@@ -226,7 +224,6 @@ static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
226static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq); 224static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq);
227static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq); 225static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq);
228static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq); 226static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq);
229static void toshiba_rbtx4927_irq_isa_end(unsigned int irq);
230#endif 227#endif
231 228
232#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC" 229#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
@@ -249,7 +246,6 @@ static struct irq_chip toshiba_rbtx4927_irq_isa_type = {
249 .mask = toshiba_rbtx4927_irq_isa_disable, 246 .mask = toshiba_rbtx4927_irq_isa_disable,
250 .mask_ack = toshiba_rbtx4927_irq_isa_mask_and_ack, 247 .mask_ack = toshiba_rbtx4927_irq_isa_mask_and_ack,
251 .unmask = toshiba_rbtx4927_irq_isa_enable, 248 .unmask = toshiba_rbtx4927_irq_isa_enable,
252 .end = toshiba_rbtx4927_irq_isa_end,
253}; 249};
254#endif 250#endif
255 251
@@ -402,7 +398,8 @@ static void __init toshiba_rbtx4927_irq_isa_init(void)
402 398
403 for (i = TOSHIBA_RBTX4927_IRQ_ISA_BEG; 399 for (i = TOSHIBA_RBTX4927_IRQ_ISA_BEG;
404 i <= TOSHIBA_RBTX4927_IRQ_ISA_END; i++) 400 i <= TOSHIBA_RBTX4927_IRQ_ISA_END; i++)
405 set_irq_chip(i, &toshiba_rbtx4927_irq_isa_type); 401 set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_isa_type,
402 handle_level_irq);
406 403
407 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC, 404 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC,
408 &toshiba_rbtx4927_irq_isa_master); 405 &toshiba_rbtx4927_irq_isa_master);
@@ -470,26 +467,6 @@ static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq)
470#endif 467#endif
471 468
472 469
473#ifdef CONFIG_TOSHIBA_FPCIB0
474static void toshiba_rbtx4927_irq_isa_end(unsigned int irq)
475{
476 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ,
477 "irq=%d\n", irq);
478
479 if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
480 || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
481 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
482 "bad irq=%d\n", irq);
483 panic("\n");
484 }
485
486 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
487 toshiba_rbtx4927_irq_isa_enable(irq);
488 }
489}
490#endif
491
492
493void __init arch_init_irq(void) 470void __init arch_init_irq(void)
494{ 471{
495 extern void tx4927_irq_init(void); 472 extern void tx4927_irq_init(void);
diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig
index c8dfd8092cab..92f41f6f934a 100644
--- a/arch/mips/vr41xx/Kconfig
+++ b/arch/mips/vr41xx/Kconfig
@@ -6,7 +6,6 @@ config CASIO_E55
6 select ISA 6 select ISA
7 select SYS_SUPPORTS_32BIT_KERNEL 7 select SYS_SUPPORTS_32BIT_KERNEL
8 select SYS_SUPPORTS_LITTLE_ENDIAN 8 select SYS_SUPPORTS_LITTLE_ENDIAN
9 select GENERIC_HARDIRQS_NO__DO_IRQ
10 9
11config IBM_WORKPAD 10config IBM_WORKPAD
12 bool "Support for IBM WorkPad z50" 11 bool "Support for IBM WorkPad z50"
@@ -16,7 +15,6 @@ config IBM_WORKPAD
16 select ISA 15 select ISA
17 select SYS_SUPPORTS_32BIT_KERNEL 16 select SYS_SUPPORTS_32BIT_KERNEL
18 select SYS_SUPPORTS_LITTLE_ENDIAN 17 select SYS_SUPPORTS_LITTLE_ENDIAN
19 select GENERIC_HARDIRQS_NO__DO_IRQ
20 18
21config NEC_CMBVR4133 19config NEC_CMBVR4133
22 bool "Support for NEC CMB-VR4133" 20 bool "Support for NEC CMB-VR4133"
@@ -41,7 +39,6 @@ config TANBAC_TB022X
41 select IRQ_CPU 39 select IRQ_CPU
42 select SYS_SUPPORTS_32BIT_KERNEL 40 select SYS_SUPPORTS_32BIT_KERNEL
43 select SYS_SUPPORTS_LITTLE_ENDIAN 41 select SYS_SUPPORTS_LITTLE_ENDIAN
44 select GENERIC_HARDIRQS_NO__DO_IRQ
45 help 42 help
46 The TANBAC VR4131 multichip module(TB0225) and 43 The TANBAC VR4131 multichip module(TB0225) and
47 the TANBAC VR4131DIMM(TB0229) are MIPS-based platforms 44 the TANBAC VR4131DIMM(TB0229) are MIPS-based platforms
@@ -74,7 +71,6 @@ config VICTOR_MPC30X
74 select IRQ_CPU 71 select IRQ_CPU
75 select SYS_SUPPORTS_32BIT_KERNEL 72 select SYS_SUPPORTS_32BIT_KERNEL
76 select SYS_SUPPORTS_LITTLE_ENDIAN 73 select SYS_SUPPORTS_LITTLE_ENDIAN
77 select GENERIC_HARDIRQS_NO__DO_IRQ
78 74
79config ZAO_CAPCELLA 75config ZAO_CAPCELLA
80 bool "Support for ZAO Networks Capcella" 76 bool "Support for ZAO Networks Capcella"
@@ -84,7 +80,6 @@ config ZAO_CAPCELLA
84 select IRQ_CPU 80 select IRQ_CPU
85 select SYS_SUPPORTS_32BIT_KERNEL 81 select SYS_SUPPORTS_32BIT_KERNEL
86 select SYS_SUPPORTS_LITTLE_ENDIAN 82 select SYS_SUPPORTS_LITTLE_ENDIAN
87 select GENERIC_HARDIRQS_NO__DO_IRQ
88 83
89config PCI_VR41XX 84config PCI_VR41XX
90 bool "Add PCI control unit support of NEC VR4100 series" 85 bool "Add PCI control unit support of NEC VR4100 series"
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c
index a039bb7251ff..128ed8d6f111 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/irq.c
@@ -45,19 +45,12 @@ static void ack_i8259_irq(unsigned int irq)
45 mask_and_ack_8259A(irq - I8259_IRQ_BASE); 45 mask_and_ack_8259A(irq - I8259_IRQ_BASE);
46} 46}
47 47
48static void end_i8259_irq(unsigned int irq)
49{
50 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
51 enable_8259A_irq(irq - I8259_IRQ_BASE);
52}
53
54static struct irq_chip i8259_irq_type = { 48static struct irq_chip i8259_irq_type = {
55 .typename = "XT-PIC", 49 .typename = "XT-PIC",
56 .ack = ack_i8259_irq, 50 .ack = ack_i8259_irq,
57 .mask = disable_i8259_irq, 51 .mask = disable_i8259_irq,
58 .mask_ack = ack_i8259_irq, 52 .mask_ack = ack_i8259_irq,
59 .unmask = enable_i8259_irq, 53 .unmask = enable_i8259_irq,
60 .end = end_i8259_irq,
61}; 54};
62 55
63static int i8259_get_irq_number(int irq) 56static int i8259_get_irq_number(int irq)
@@ -92,7 +85,7 @@ void __init rockhopper_init_irq(void)
92 } 85 }
93 86
94 for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) 87 for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++)
95 set_irq_chip(i, &i8259_irq_type); 88 set_irq_chip_and_handler(i, &i8259_irq_type, handle_level_irq);
96 89
97 setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); 90 setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade);
98 91