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-rw-r--r--arch/mips/include/asm/irqflags.h53
-rw-r--r--arch/mips/kernel/smtc.c4
2 files changed, 31 insertions, 26 deletions
diff --git a/arch/mips/include/asm/irqflags.h b/arch/mips/include/asm/irqflags.h
index 701ec0ba8fa9..9ef3b0d17896 100644
--- a/arch/mips/include/asm/irqflags.h
+++ b/arch/mips/include/asm/irqflags.h
@@ -17,7 +17,7 @@
17#include <asm/hazards.h> 17#include <asm/hazards.h>
18 18
19__asm__( 19__asm__(
20 " .macro raw_local_irq_enable \n" 20 " .macro arch_local_irq_enable \n"
21 " .set push \n" 21 " .set push \n"
22 " .set reorder \n" 22 " .set reorder \n"
23 " .set noat \n" 23 " .set noat \n"
@@ -40,7 +40,7 @@ __asm__(
40 40
41extern void smtc_ipi_replay(void); 41extern void smtc_ipi_replay(void);
42 42
43static inline void raw_local_irq_enable(void) 43static inline void arch_local_irq_enable(void)
44{ 44{
45#ifdef CONFIG_MIPS_MT_SMTC 45#ifdef CONFIG_MIPS_MT_SMTC
46 /* 46 /*
@@ -50,7 +50,7 @@ static inline void raw_local_irq_enable(void)
50 smtc_ipi_replay(); 50 smtc_ipi_replay();
51#endif 51#endif
52 __asm__ __volatile__( 52 __asm__ __volatile__(
53 "raw_local_irq_enable" 53 "arch_local_irq_enable"
54 : /* no outputs */ 54 : /* no outputs */
55 : /* no inputs */ 55 : /* no inputs */
56 : "memory"); 56 : "memory");
@@ -76,7 +76,7 @@ static inline void raw_local_irq_enable(void)
76 * Workaround: mask EXL bit of the result or place a nop before mfc0. 76 * Workaround: mask EXL bit of the result or place a nop before mfc0.
77 */ 77 */
78__asm__( 78__asm__(
79 " .macro raw_local_irq_disable\n" 79 " .macro arch_local_irq_disable\n"
80 " .set push \n" 80 " .set push \n"
81 " .set noat \n" 81 " .set noat \n"
82#ifdef CONFIG_MIPS_MT_SMTC 82#ifdef CONFIG_MIPS_MT_SMTC
@@ -97,17 +97,17 @@ __asm__(
97 " .set pop \n" 97 " .set pop \n"
98 " .endm \n"); 98 " .endm \n");
99 99
100static inline void raw_local_irq_disable(void) 100static inline void arch_local_irq_disable(void)
101{ 101{
102 __asm__ __volatile__( 102 __asm__ __volatile__(
103 "raw_local_irq_disable" 103 "arch_local_irq_disable"
104 : /* no outputs */ 104 : /* no outputs */
105 : /* no inputs */ 105 : /* no inputs */
106 : "memory"); 106 : "memory");
107} 107}
108 108
109__asm__( 109__asm__(
110 " .macro raw_local_save_flags flags \n" 110 " .macro arch_local_save_flags flags \n"
111 " .set push \n" 111 " .set push \n"
112 " .set reorder \n" 112 " .set reorder \n"
113#ifdef CONFIG_MIPS_MT_SMTC 113#ifdef CONFIG_MIPS_MT_SMTC
@@ -118,13 +118,15 @@ __asm__(
118 " .set pop \n" 118 " .set pop \n"
119 " .endm \n"); 119 " .endm \n");
120 120
121#define raw_local_save_flags(x) \ 121static inline unsigned long arch_local_save_flags(void)
122__asm__ __volatile__( \ 122{
123 "raw_local_save_flags %0" \ 123 unsigned long flags;
124 : "=r" (x)) 124 asm volatile("arch_local_save_flags %0" : "=r" (flags));
125 return flags;
126}
125 127
126__asm__( 128__asm__(
127 " .macro raw_local_irq_save result \n" 129 " .macro arch_local_irq_save result \n"
128 " .set push \n" 130 " .set push \n"
129 " .set reorder \n" 131 " .set reorder \n"
130 " .set noat \n" 132 " .set noat \n"
@@ -148,15 +150,18 @@ __asm__(
148 " .set pop \n" 150 " .set pop \n"
149 " .endm \n"); 151 " .endm \n");
150 152
151#define raw_local_irq_save(x) \ 153static inline unsigned long arch_local_irq_save(void)
152__asm__ __volatile__( \ 154{
153 "raw_local_irq_save\t%0" \ 155 unsigned long flags;
154 : "=r" (x) \ 156 asm volatile("arch_local_irq_save\t%0"
155 : /* no inputs */ \ 157 : "=r" (flags)
156 : "memory") 158 : /* no inputs */
159 : "memory");
160 return flags;
161}
157 162
158__asm__( 163__asm__(
159 " .macro raw_local_irq_restore flags \n" 164 " .macro arch_local_irq_restore flags \n"
160 " .set push \n" 165 " .set push \n"
161 " .set noreorder \n" 166 " .set noreorder \n"
162 " .set noat \n" 167 " .set noat \n"
@@ -196,7 +201,7 @@ __asm__(
196 " .endm \n"); 201 " .endm \n");
197 202
198 203
199static inline void raw_local_irq_restore(unsigned long flags) 204static inline void arch_local_irq_restore(unsigned long flags)
200{ 205{
201 unsigned long __tmp1; 206 unsigned long __tmp1;
202 207
@@ -211,24 +216,24 @@ static inline void raw_local_irq_restore(unsigned long flags)
211#endif 216#endif
212 217
213 __asm__ __volatile__( 218 __asm__ __volatile__(
214 "raw_local_irq_restore\t%0" 219 "arch_local_irq_restore\t%0"
215 : "=r" (__tmp1) 220 : "=r" (__tmp1)
216 : "0" (flags) 221 : "0" (flags)
217 : "memory"); 222 : "memory");
218} 223}
219 224
220static inline void __raw_local_irq_restore(unsigned long flags) 225static inline void __arch_local_irq_restore(unsigned long flags)
221{ 226{
222 unsigned long __tmp1; 227 unsigned long __tmp1;
223 228
224 __asm__ __volatile__( 229 __asm__ __volatile__(
225 "raw_local_irq_restore\t%0" 230 "arch_local_irq_restore\t%0"
226 : "=r" (__tmp1) 231 : "=r" (__tmp1)
227 : "0" (flags) 232 : "0" (flags)
228 : "memory"); 233 : "memory");
229} 234}
230 235
231static inline int raw_irqs_disabled_flags(unsigned long flags) 236static inline int arch_irqs_disabled_flags(unsigned long flags)
232{ 237{
233#ifdef CONFIG_MIPS_MT_SMTC 238#ifdef CONFIG_MIPS_MT_SMTC
234 /* 239 /*
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index cfeb2c155896..39c08254b0f1 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -1038,7 +1038,7 @@ void deferred_smtc_ipi(void)
1038 * but it's more efficient, given that we're already 1038 * but it's more efficient, given that we're already
1039 * running down the IPI queue. 1039 * running down the IPI queue.
1040 */ 1040 */
1041 __raw_local_irq_restore(flags); 1041 __arch_local_irq_restore(flags);
1042 } 1042 }
1043} 1043}
1044 1044
@@ -1190,7 +1190,7 @@ void smtc_ipi_replay(void)
1190 /* 1190 /*
1191 ** But use a raw restore here to avoid recursion. 1191 ** But use a raw restore here to avoid recursion.
1192 */ 1192 */
1193 __raw_local_irq_restore(flags); 1193 __arch_local_irq_restore(flags);
1194 1194
1195 if (pipi) { 1195 if (pipi) {
1196 self_ipi(pipi); 1196 self_ipi(pipi);