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-rw-r--r--arch/mips/vr41xx/common/Makefile2
-rw-r--r--arch/mips/vr41xx/common/giu.c122
2 files changed, 123 insertions, 1 deletions
diff --git a/arch/mips/vr41xx/common/Makefile b/arch/mips/vr41xx/common/Makefile
index fcf94d7b1478..22b074e72121 100644
--- a/arch/mips/vr41xx/common/Makefile
+++ b/arch/mips/vr41xx/common/Makefile
@@ -2,4 +2,4 @@
2# Makefile for common code of the NEC VR4100 series. 2# Makefile for common code of the NEC VR4100 series.
3# 3#
4 4
5obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o siu.o type.o 5obj-y += bcu.o cmu.o giu.o icu.o init.o irq.o pmu.o siu.o type.o
diff --git a/arch/mips/vr41xx/common/giu.c b/arch/mips/vr41xx/common/giu.c
new file mode 100644
index 000000000000..d21f6f2d22a3
--- /dev/null
+++ b/arch/mips/vr41xx/common/giu.c
@@ -0,0 +1,122 @@
1/*
2 * NEC VR4100 series GIU platform device.
3 *
4 * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/ioport.h>
23#include <linux/platform_device.h>
24
25#include <asm/cpu.h>
26#include <asm/vr41xx/giu.h>
27#include <asm/vr41xx/irq.h>
28
29static struct resource giu_50pins_pullupdown_resource[] __initdata = {
30 {
31 .start = 0x0b000100,
32 .end = 0x0b00011f,
33 .flags = IORESOURCE_MEM,
34 },
35 {
36 .start = 0x0b0002e0,
37 .end = 0x0b0002e3,
38 .flags = IORESOURCE_MEM,
39 },
40 {
41 .start = GIUINT_IRQ,
42 .end = GIUINT_IRQ,
43 .flags = IORESOURCE_IRQ,
44 },
45};
46
47static struct resource giu_36pins_resource[] __initdata = {
48 {
49 .start = 0x0f000140,
50 .end = 0x0f00015f,
51 .flags = IORESOURCE_MEM,
52 },
53 {
54 .start = GIUINT_IRQ,
55 .end = GIUINT_IRQ,
56 .flags = IORESOURCE_IRQ,
57 },
58};
59
60static struct resource giu_48pins_resource[] __initdata = {
61 {
62 .start = 0x0f000140,
63 .end = 0x0f000167,
64 .flags = IORESOURCE_MEM,
65 },
66 {
67 .start = GIUINT_IRQ,
68 .end = GIUINT_IRQ,
69 .flags = IORESOURCE_IRQ,
70 },
71};
72
73static int __init vr41xx_giu_add(void)
74{
75 struct platform_device *pdev;
76 struct resource *res;
77 unsigned int num;
78 int retval;
79
80 pdev = platform_device_alloc("GIU", -1);
81 if (!pdev)
82 return -ENOMEM;
83
84 switch (current_cpu_data.cputype) {
85 case CPU_VR4111:
86 case CPU_VR4121:
87 pdev->id = GPIO_50PINS_PULLUPDOWN;
88 res = giu_50pins_pullupdown_resource;
89 num = ARRAY_SIZE(giu_50pins_pullupdown_resource);
90 break;
91 case CPU_VR4122:
92 case CPU_VR4131:
93 pdev->id = GPIO_36PINS;
94 res = giu_36pins_resource;
95 num = ARRAY_SIZE(giu_36pins_resource);
96 break;
97 case CPU_VR4133:
98 pdev->id = GPIO_48PINS_EDGE_SELECT;
99 res = giu_48pins_resource;
100 num = ARRAY_SIZE(giu_48pins_resource);
101 break;
102 default:
103 retval = -ENODEV;
104 goto err_free_device;
105 }
106
107 retval = platform_device_add_resources(pdev, res, num);
108 if (retval)
109 goto err_free_device;
110
111 retval = platform_device_add(pdev);
112 if (retval)
113 goto err_free_device;
114
115 return 0;
116
117err_free_device:
118 platform_device_put(pdev);
119
120 return retval;
121}
122device_initcall(vr41xx_giu_add);