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-rw-r--r--arch/mips/vr41xx/common/icu.c62
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/irq.c27
2 files changed, 18 insertions, 71 deletions
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c
index c215c0d39fae..c075261976c5 100644
--- a/arch/mips/vr41xx/common/icu.c
+++ b/arch/mips/vr41xx/common/icu.c
@@ -417,14 +417,7 @@ void vr41xx_disable_bcuint(void)
417 417
418EXPORT_SYMBOL(vr41xx_disable_bcuint); 418EXPORT_SYMBOL(vr41xx_disable_bcuint);
419 419
420static unsigned int startup_sysint1_irq(unsigned int irq) 420static void disable_sysint1_irq(unsigned int irq)
421{
422 icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
423
424 return 0; /* never anything pending */
425}
426
427static void shutdown_sysint1_irq(unsigned int irq)
428{ 421{
429 icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); 422 icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
430} 423}
@@ -434,33 +427,15 @@ static void enable_sysint1_irq(unsigned int irq)
434 icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); 427 icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
435} 428}
436 429
437#define disable_sysint1_irq shutdown_sysint1_irq
438#define ack_sysint1_irq shutdown_sysint1_irq
439
440static void end_sysint1_irq(unsigned int irq)
441{
442 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
443 icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
444}
445
446static struct irq_chip sysint1_irq_type = { 430static struct irq_chip sysint1_irq_type = {
447 .typename = "SYSINT1", 431 .typename = "SYSINT1",
448 .startup = startup_sysint1_irq, 432 .ack = disable_sysint1_irq,
449 .shutdown = shutdown_sysint1_irq, 433 .mask = disable_sysint1_irq,
450 .enable = enable_sysint1_irq, 434 .mask_ack = disable_sysint1_irq,
451 .disable = disable_sysint1_irq, 435 .unmask = enable_sysint1_irq,
452 .ack = ack_sysint1_irq,
453 .end = end_sysint1_irq,
454}; 436};
455 437
456static unsigned int startup_sysint2_irq(unsigned int irq) 438static void disable_sysint2_irq(unsigned int irq)
457{
458 icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
459
460 return 0; /* never anything pending */
461}
462
463static void shutdown_sysint2_irq(unsigned int irq)
464{ 439{
465 icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); 440 icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
466} 441}
@@ -470,23 +445,12 @@ static void enable_sysint2_irq(unsigned int irq)
470 icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); 445 icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
471} 446}
472 447
473#define disable_sysint2_irq shutdown_sysint2_irq
474#define ack_sysint2_irq shutdown_sysint2_irq
475
476static void end_sysint2_irq(unsigned int irq)
477{
478 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
479 icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
480}
481
482static struct irq_chip sysint2_irq_type = { 448static struct irq_chip sysint2_irq_type = {
483 .typename = "SYSINT2", 449 .typename = "SYSINT2",
484 .startup = startup_sysint2_irq, 450 .ack = disable_sysint2_irq,
485 .shutdown = shutdown_sysint2_irq, 451 .mask = disable_sysint2_irq,
486 .enable = enable_sysint2_irq, 452 .mask_ack = disable_sysint2_irq,
487 .disable = disable_sysint2_irq, 453 .unmask = enable_sysint2_irq,
488 .ack = ack_sysint2_irq,
489 .end = end_sysint2_irq,
490}; 454};
491 455
492static inline int set_sysint1_assign(unsigned int irq, unsigned char assign) 456static inline int set_sysint1_assign(unsigned int irq, unsigned char assign)
@@ -723,10 +687,12 @@ static int __init vr41xx_icu_init(void)
723 icu2_write(MGIUINTHREG, 0xffff); 687 icu2_write(MGIUINTHREG, 0xffff);
724 688
725 for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) 689 for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++)
726 irq_desc[i].chip = &sysint1_irq_type; 690 set_irq_chip_and_handler(i, &sysint1_irq_type,
691 handle_level_irq);
727 692
728 for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) 693 for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++)
729 irq_desc[i].chip = &sysint2_irq_type; 694 set_irq_chip_and_handler(i, &sysint2_irq_type,
695 handle_level_irq);
730 696
731 cascade_irq(INT0_IRQ, icu_get_irq); 697 cascade_irq(INT0_IRQ, icu_get_irq);
732 cascade_irq(INT1_IRQ, icu_get_irq); 698 cascade_irq(INT1_IRQ, icu_get_irq);
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c
index 2483487344c2..128ed8d6f111 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/irq.c
@@ -30,17 +30,6 @@ extern void init_8259A(int hoge);
30 30
31extern int vr4133_rockhopper; 31extern int vr4133_rockhopper;
32 32
33static unsigned int startup_i8259_irq(unsigned int irq)
34{
35 enable_8259A_irq(irq - I8259_IRQ_BASE);
36 return 0;
37}
38
39static void shutdown_i8259_irq(unsigned int irq)
40{
41 disable_8259A_irq(irq - I8259_IRQ_BASE);
42}
43
44static void enable_i8259_irq(unsigned int irq) 33static void enable_i8259_irq(unsigned int irq)
45{ 34{
46 enable_8259A_irq(irq - I8259_IRQ_BASE); 35 enable_8259A_irq(irq - I8259_IRQ_BASE);
@@ -56,20 +45,12 @@ static void ack_i8259_irq(unsigned int irq)
56 mask_and_ack_8259A(irq - I8259_IRQ_BASE); 45 mask_and_ack_8259A(irq - I8259_IRQ_BASE);
57} 46}
58 47
59static void end_i8259_irq(unsigned int irq)
60{
61 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
62 enable_8259A_irq(irq - I8259_IRQ_BASE);
63}
64
65static struct irq_chip i8259_irq_type = { 48static struct irq_chip i8259_irq_type = {
66 .typename = "XT-PIC", 49 .typename = "XT-PIC",
67 .startup = startup_i8259_irq,
68 .shutdown = shutdown_i8259_irq,
69 .enable = enable_i8259_irq,
70 .disable = disable_i8259_irq,
71 .ack = ack_i8259_irq, 50 .ack = ack_i8259_irq,
72 .end = end_i8259_irq, 51 .mask = disable_i8259_irq,
52 .mask_ack = ack_i8259_irq,
53 .unmask = enable_i8259_irq,
73}; 54};
74 55
75static int i8259_get_irq_number(int irq) 56static int i8259_get_irq_number(int irq)
@@ -104,7 +85,7 @@ void __init rockhopper_init_irq(void)
104 } 85 }
105 86
106 for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) 87 for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++)
107 irq_desc[i].chip = &i8259_irq_type; 88 set_irq_chip_and_handler(i, &i8259_irq_type, handle_level_irq);
108 89
109 setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); 90 setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade);
110 91