diff options
Diffstat (limited to 'arch/mips/vr41xx')
-rw-r--r-- | arch/mips/vr41xx/Kconfig | 6 | ||||
-rw-r--r-- | arch/mips/vr41xx/casio-e55/setup.c | 15 | ||||
-rw-r--r-- | arch/mips/vr41xx/common/Makefile | 3 | ||||
-rw-r--r-- | arch/mips/vr41xx/common/icu.c | 45 | ||||
-rw-r--r-- | arch/mips/vr41xx/common/init.c | 4 | ||||
-rw-r--r-- | arch/mips/vr41xx/common/irq.c | 4 | ||||
-rw-r--r-- | arch/mips/vr41xx/common/vrc4173.c | 581 | ||||
-rw-r--r-- | arch/mips/vr41xx/ibm-workpad/setup.c | 15 | ||||
-rw-r--r-- | arch/mips/vr41xx/nec-cmbvr4133/irq.c | 2 |
9 files changed, 49 insertions, 626 deletions
diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig index 6046ef23b2bf..92f41f6f934a 100644 --- a/arch/mips/vr41xx/Kconfig +++ b/arch/mips/vr41xx/Kconfig | |||
@@ -86,9 +86,3 @@ config PCI_VR41XX | |||
86 | depends on MACH_VR41XX && HW_HAS_PCI | 86 | depends on MACH_VR41XX && HW_HAS_PCI |
87 | default y | 87 | default y |
88 | select PCI | 88 | select PCI |
89 | |||
90 | config VRC4173 | ||
91 | tristate "Add NEC VRC4173 companion chip support" | ||
92 | depends on MACH_VR41XX && PCI_VR41XX | ||
93 | help | ||
94 | The NEC VRC4173 is a companion chip for NEC VR4122/VR4131. | ||
diff --git a/arch/mips/vr41xx/casio-e55/setup.c b/arch/mips/vr41xx/casio-e55/setup.c index 814900915c28..6d9bab890587 100644 --- a/arch/mips/vr41xx/casio-e55/setup.c +++ b/arch/mips/vr41xx/casio-e55/setup.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65. | 2 | * setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65. |
3 | * | 3 | * |
4 | * Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2002-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
@@ -21,13 +21,18 @@ | |||
21 | #include <linux/ioport.h> | 21 | #include <linux/ioport.h> |
22 | 22 | ||
23 | #include <asm/io.h> | 23 | #include <asm/io.h> |
24 | #include <asm/vr41xx/e55.h> | 24 | |
25 | #define E55_ISA_IO_BASE 0x1400c000 | ||
26 | #define E55_ISA_IO_SIZE 0x03ff4000 | ||
27 | #define E55_ISA_IO_START 0 | ||
28 | #define E55_ISA_IO_END (E55_ISA_IO_SIZE - 1) | ||
29 | #define E55_IO_PORT_BASE KSEG1ADDR(E55_ISA_IO_BASE) | ||
25 | 30 | ||
26 | static int __init casio_e55_setup(void) | 31 | static int __init casio_e55_setup(void) |
27 | { | 32 | { |
28 | set_io_port_base(IO_PORT_BASE); | 33 | set_io_port_base(E55_IO_PORT_BASE); |
29 | ioport_resource.start = IO_PORT_RESOURCE_START; | 34 | ioport_resource.start = E55_ISA_IO_START; |
30 | ioport_resource.end = IO_PORT_RESOURCE_END; | 35 | ioport_resource.end = E55_ISA_IO_END; |
31 | 36 | ||
32 | return 0; | 37 | return 0; |
33 | } | 38 | } |
diff --git a/arch/mips/vr41xx/common/Makefile b/arch/mips/vr41xx/common/Makefile index aa373974c80f..975d5caf9d1b 100644 --- a/arch/mips/vr41xx/common/Makefile +++ b/arch/mips/vr41xx/common/Makefile | |||
@@ -2,7 +2,6 @@ | |||
2 | # Makefile for common code of the NEC VR4100 series. | 2 | # Makefile for common code of the NEC VR4100 series. |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o type.o | 5 | obj-y += bcu.o cmu.o icu.o init.o irq.o pmu.o type.o |
6 | obj-$(CONFIG_VRC4173) += vrc4173.o | ||
7 | 6 | ||
8 | EXTRA_AFLAGS := $(CFLAGS) | 7 | EXTRA_AFLAGS := $(CFLAGS) |
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index b9323302cc4e..7a5c31d58378 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c | |||
@@ -38,6 +38,7 @@ | |||
38 | 38 | ||
39 | #include <asm/cpu.h> | 39 | #include <asm/cpu.h> |
40 | #include <asm/io.h> | 40 | #include <asm/io.h> |
41 | #include <asm/vr41xx/irq.h> | ||
41 | #include <asm/vr41xx/vr41xx.h> | 42 | #include <asm/vr41xx/vr41xx.h> |
42 | 43 | ||
43 | static void __iomem *icu1_base; | 44 | static void __iomem *icu1_base; |
@@ -152,7 +153,7 @@ static inline uint16_t icu2_clear(uint8_t offset, uint16_t clear) | |||
152 | 153 | ||
153 | void vr41xx_enable_piuint(uint16_t mask) | 154 | void vr41xx_enable_piuint(uint16_t mask) |
154 | { | 155 | { |
155 | irq_desc_t *desc = irq_desc + PIU_IRQ; | 156 | struct irq_desc *desc = irq_desc + PIU_IRQ; |
156 | unsigned long flags; | 157 | unsigned long flags; |
157 | 158 | ||
158 | if (current_cpu_data.cputype == CPU_VR4111 || | 159 | if (current_cpu_data.cputype == CPU_VR4111 || |
@@ -167,7 +168,7 @@ EXPORT_SYMBOL(vr41xx_enable_piuint); | |||
167 | 168 | ||
168 | void vr41xx_disable_piuint(uint16_t mask) | 169 | void vr41xx_disable_piuint(uint16_t mask) |
169 | { | 170 | { |
170 | irq_desc_t *desc = irq_desc + PIU_IRQ; | 171 | struct irq_desc *desc = irq_desc + PIU_IRQ; |
171 | unsigned long flags; | 172 | unsigned long flags; |
172 | 173 | ||
173 | if (current_cpu_data.cputype == CPU_VR4111 || | 174 | if (current_cpu_data.cputype == CPU_VR4111 || |
@@ -182,7 +183,7 @@ EXPORT_SYMBOL(vr41xx_disable_piuint); | |||
182 | 183 | ||
183 | void vr41xx_enable_aiuint(uint16_t mask) | 184 | void vr41xx_enable_aiuint(uint16_t mask) |
184 | { | 185 | { |
185 | irq_desc_t *desc = irq_desc + AIU_IRQ; | 186 | struct irq_desc *desc = irq_desc + AIU_IRQ; |
186 | unsigned long flags; | 187 | unsigned long flags; |
187 | 188 | ||
188 | if (current_cpu_data.cputype == CPU_VR4111 || | 189 | if (current_cpu_data.cputype == CPU_VR4111 || |
@@ -197,7 +198,7 @@ EXPORT_SYMBOL(vr41xx_enable_aiuint); | |||
197 | 198 | ||
198 | void vr41xx_disable_aiuint(uint16_t mask) | 199 | void vr41xx_disable_aiuint(uint16_t mask) |
199 | { | 200 | { |
200 | irq_desc_t *desc = irq_desc + AIU_IRQ; | 201 | struct irq_desc *desc = irq_desc + AIU_IRQ; |
201 | unsigned long flags; | 202 | unsigned long flags; |
202 | 203 | ||
203 | if (current_cpu_data.cputype == CPU_VR4111 || | 204 | if (current_cpu_data.cputype == CPU_VR4111 || |
@@ -212,7 +213,7 @@ EXPORT_SYMBOL(vr41xx_disable_aiuint); | |||
212 | 213 | ||
213 | void vr41xx_enable_kiuint(uint16_t mask) | 214 | void vr41xx_enable_kiuint(uint16_t mask) |
214 | { | 215 | { |
215 | irq_desc_t *desc = irq_desc + KIU_IRQ; | 216 | struct irq_desc *desc = irq_desc + KIU_IRQ; |
216 | unsigned long flags; | 217 | unsigned long flags; |
217 | 218 | ||
218 | if (current_cpu_data.cputype == CPU_VR4111 || | 219 | if (current_cpu_data.cputype == CPU_VR4111 || |
@@ -227,7 +228,7 @@ EXPORT_SYMBOL(vr41xx_enable_kiuint); | |||
227 | 228 | ||
228 | void vr41xx_disable_kiuint(uint16_t mask) | 229 | void vr41xx_disable_kiuint(uint16_t mask) |
229 | { | 230 | { |
230 | irq_desc_t *desc = irq_desc + KIU_IRQ; | 231 | struct irq_desc *desc = irq_desc + KIU_IRQ; |
231 | unsigned long flags; | 232 | unsigned long flags; |
232 | 233 | ||
233 | if (current_cpu_data.cputype == CPU_VR4111 || | 234 | if (current_cpu_data.cputype == CPU_VR4111 || |
@@ -242,7 +243,7 @@ EXPORT_SYMBOL(vr41xx_disable_kiuint); | |||
242 | 243 | ||
243 | void vr41xx_enable_dsiuint(uint16_t mask) | 244 | void vr41xx_enable_dsiuint(uint16_t mask) |
244 | { | 245 | { |
245 | irq_desc_t *desc = irq_desc + DSIU_IRQ; | 246 | struct irq_desc *desc = irq_desc + DSIU_IRQ; |
246 | unsigned long flags; | 247 | unsigned long flags; |
247 | 248 | ||
248 | spin_lock_irqsave(&desc->lock, flags); | 249 | spin_lock_irqsave(&desc->lock, flags); |
@@ -254,7 +255,7 @@ EXPORT_SYMBOL(vr41xx_enable_dsiuint); | |||
254 | 255 | ||
255 | void vr41xx_disable_dsiuint(uint16_t mask) | 256 | void vr41xx_disable_dsiuint(uint16_t mask) |
256 | { | 257 | { |
257 | irq_desc_t *desc = irq_desc + DSIU_IRQ; | 258 | struct irq_desc *desc = irq_desc + DSIU_IRQ; |
258 | unsigned long flags; | 259 | unsigned long flags; |
259 | 260 | ||
260 | spin_lock_irqsave(&desc->lock, flags); | 261 | spin_lock_irqsave(&desc->lock, flags); |
@@ -266,7 +267,7 @@ EXPORT_SYMBOL(vr41xx_disable_dsiuint); | |||
266 | 267 | ||
267 | void vr41xx_enable_firint(uint16_t mask) | 268 | void vr41xx_enable_firint(uint16_t mask) |
268 | { | 269 | { |
269 | irq_desc_t *desc = irq_desc + FIR_IRQ; | 270 | struct irq_desc *desc = irq_desc + FIR_IRQ; |
270 | unsigned long flags; | 271 | unsigned long flags; |
271 | 272 | ||
272 | spin_lock_irqsave(&desc->lock, flags); | 273 | spin_lock_irqsave(&desc->lock, flags); |
@@ -278,7 +279,7 @@ EXPORT_SYMBOL(vr41xx_enable_firint); | |||
278 | 279 | ||
279 | void vr41xx_disable_firint(uint16_t mask) | 280 | void vr41xx_disable_firint(uint16_t mask) |
280 | { | 281 | { |
281 | irq_desc_t *desc = irq_desc + FIR_IRQ; | 282 | struct irq_desc *desc = irq_desc + FIR_IRQ; |
282 | unsigned long flags; | 283 | unsigned long flags; |
283 | 284 | ||
284 | spin_lock_irqsave(&desc->lock, flags); | 285 | spin_lock_irqsave(&desc->lock, flags); |
@@ -290,7 +291,7 @@ EXPORT_SYMBOL(vr41xx_disable_firint); | |||
290 | 291 | ||
291 | void vr41xx_enable_pciint(void) | 292 | void vr41xx_enable_pciint(void) |
292 | { | 293 | { |
293 | irq_desc_t *desc = irq_desc + PCI_IRQ; | 294 | struct irq_desc *desc = irq_desc + PCI_IRQ; |
294 | unsigned long flags; | 295 | unsigned long flags; |
295 | 296 | ||
296 | if (current_cpu_data.cputype == CPU_VR4122 || | 297 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -306,7 +307,7 @@ EXPORT_SYMBOL(vr41xx_enable_pciint); | |||
306 | 307 | ||
307 | void vr41xx_disable_pciint(void) | 308 | void vr41xx_disable_pciint(void) |
308 | { | 309 | { |
309 | irq_desc_t *desc = irq_desc + PCI_IRQ; | 310 | struct irq_desc *desc = irq_desc + PCI_IRQ; |
310 | unsigned long flags; | 311 | unsigned long flags; |
311 | 312 | ||
312 | if (current_cpu_data.cputype == CPU_VR4122 || | 313 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -322,7 +323,7 @@ EXPORT_SYMBOL(vr41xx_disable_pciint); | |||
322 | 323 | ||
323 | void vr41xx_enable_scuint(void) | 324 | void vr41xx_enable_scuint(void) |
324 | { | 325 | { |
325 | irq_desc_t *desc = irq_desc + SCU_IRQ; | 326 | struct irq_desc *desc = irq_desc + SCU_IRQ; |
326 | unsigned long flags; | 327 | unsigned long flags; |
327 | 328 | ||
328 | if (current_cpu_data.cputype == CPU_VR4122 || | 329 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -338,7 +339,7 @@ EXPORT_SYMBOL(vr41xx_enable_scuint); | |||
338 | 339 | ||
339 | void vr41xx_disable_scuint(void) | 340 | void vr41xx_disable_scuint(void) |
340 | { | 341 | { |
341 | irq_desc_t *desc = irq_desc + SCU_IRQ; | 342 | struct irq_desc *desc = irq_desc + SCU_IRQ; |
342 | unsigned long flags; | 343 | unsigned long flags; |
343 | 344 | ||
344 | if (current_cpu_data.cputype == CPU_VR4122 || | 345 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -354,7 +355,7 @@ EXPORT_SYMBOL(vr41xx_disable_scuint); | |||
354 | 355 | ||
355 | void vr41xx_enable_csiint(uint16_t mask) | 356 | void vr41xx_enable_csiint(uint16_t mask) |
356 | { | 357 | { |
357 | irq_desc_t *desc = irq_desc + CSI_IRQ; | 358 | struct irq_desc *desc = irq_desc + CSI_IRQ; |
358 | unsigned long flags; | 359 | unsigned long flags; |
359 | 360 | ||
360 | if (current_cpu_data.cputype == CPU_VR4122 || | 361 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -370,7 +371,7 @@ EXPORT_SYMBOL(vr41xx_enable_csiint); | |||
370 | 371 | ||
371 | void vr41xx_disable_csiint(uint16_t mask) | 372 | void vr41xx_disable_csiint(uint16_t mask) |
372 | { | 373 | { |
373 | irq_desc_t *desc = irq_desc + CSI_IRQ; | 374 | struct irq_desc *desc = irq_desc + CSI_IRQ; |
374 | unsigned long flags; | 375 | unsigned long flags; |
375 | 376 | ||
376 | if (current_cpu_data.cputype == CPU_VR4122 || | 377 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -386,7 +387,7 @@ EXPORT_SYMBOL(vr41xx_disable_csiint); | |||
386 | 387 | ||
387 | void vr41xx_enable_bcuint(void) | 388 | void vr41xx_enable_bcuint(void) |
388 | { | 389 | { |
389 | irq_desc_t *desc = irq_desc + BCU_IRQ; | 390 | struct irq_desc *desc = irq_desc + BCU_IRQ; |
390 | unsigned long flags; | 391 | unsigned long flags; |
391 | 392 | ||
392 | if (current_cpu_data.cputype == CPU_VR4122 || | 393 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -402,7 +403,7 @@ EXPORT_SYMBOL(vr41xx_enable_bcuint); | |||
402 | 403 | ||
403 | void vr41xx_disable_bcuint(void) | 404 | void vr41xx_disable_bcuint(void) |
404 | { | 405 | { |
405 | irq_desc_t *desc = irq_desc + BCU_IRQ; | 406 | struct irq_desc *desc = irq_desc + BCU_IRQ; |
406 | unsigned long flags; | 407 | unsigned long flags; |
407 | 408 | ||
408 | if (current_cpu_data.cputype == CPU_VR4122 || | 409 | if (current_cpu_data.cputype == CPU_VR4122 || |
@@ -442,7 +443,7 @@ static void end_sysint1_irq(unsigned int irq) | |||
442 | icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); | 443 | icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); |
443 | } | 444 | } |
444 | 445 | ||
445 | static struct hw_interrupt_type sysint1_irq_type = { | 446 | static struct irq_chip sysint1_irq_type = { |
446 | .typename = "SYSINT1", | 447 | .typename = "SYSINT1", |
447 | .startup = startup_sysint1_irq, | 448 | .startup = startup_sysint1_irq, |
448 | .shutdown = shutdown_sysint1_irq, | 449 | .shutdown = shutdown_sysint1_irq, |
@@ -478,7 +479,7 @@ static void end_sysint2_irq(unsigned int irq) | |||
478 | icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); | 479 | icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); |
479 | } | 480 | } |
480 | 481 | ||
481 | static struct hw_interrupt_type sysint2_irq_type = { | 482 | static struct irq_chip sysint2_irq_type = { |
482 | .typename = "SYSINT2", | 483 | .typename = "SYSINT2", |
483 | .startup = startup_sysint2_irq, | 484 | .startup = startup_sysint2_irq, |
484 | .shutdown = shutdown_sysint2_irq, | 485 | .shutdown = shutdown_sysint2_irq, |
@@ -490,7 +491,7 @@ static struct hw_interrupt_type sysint2_irq_type = { | |||
490 | 491 | ||
491 | static inline int set_sysint1_assign(unsigned int irq, unsigned char assign) | 492 | static inline int set_sysint1_assign(unsigned int irq, unsigned char assign) |
492 | { | 493 | { |
493 | irq_desc_t *desc = irq_desc + irq; | 494 | struct irq_desc *desc = irq_desc + irq; |
494 | uint16_t intassign0, intassign1; | 495 | uint16_t intassign0, intassign1; |
495 | unsigned int pin; | 496 | unsigned int pin; |
496 | 497 | ||
@@ -549,7 +550,7 @@ static inline int set_sysint1_assign(unsigned int irq, unsigned char assign) | |||
549 | 550 | ||
550 | static inline int set_sysint2_assign(unsigned int irq, unsigned char assign) | 551 | static inline int set_sysint2_assign(unsigned int irq, unsigned char assign) |
551 | { | 552 | { |
552 | irq_desc_t *desc = irq_desc + irq; | 553 | struct irq_desc *desc = irq_desc + irq; |
553 | uint16_t intassign2, intassign3; | 554 | uint16_t intassign2, intassign3; |
554 | unsigned int pin; | 555 | unsigned int pin; |
555 | 556 | ||
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c index 915bfa5c0719..a2e285c1d4d5 100644 --- a/arch/mips/vr41xx/common/init.c +++ b/arch/mips/vr41xx/common/init.c | |||
@@ -24,6 +24,7 @@ | |||
24 | 24 | ||
25 | #include <asm/bootinfo.h> | 25 | #include <asm/bootinfo.h> |
26 | #include <asm/time.h> | 26 | #include <asm/time.h> |
27 | #include <asm/vr41xx/irq.h> | ||
27 | #include <asm/vr41xx/vr41xx.h> | 28 | #include <asm/vr41xx/vr41xx.h> |
28 | 29 | ||
29 | #define IO_MEM_RESOURCE_START 0UL | 30 | #define IO_MEM_RESOURCE_START 0UL |
@@ -47,7 +48,7 @@ static void __init setup_timer_frequency(void) | |||
47 | mips_hpt_frequency = tclock / 4; | 48 | mips_hpt_frequency = tclock / 4; |
48 | } | 49 | } |
49 | 50 | ||
50 | static void __init setup_timer_irq(struct irqaction *irq) | 51 | void __init plat_timer_setup(struct irqaction *irq) |
51 | { | 52 | { |
52 | setup_irq(TIMER_IRQ, irq); | 53 | setup_irq(TIMER_IRQ, irq); |
53 | } | 54 | } |
@@ -55,7 +56,6 @@ static void __init setup_timer_irq(struct irqaction *irq) | |||
55 | static void __init timer_init(void) | 56 | static void __init timer_init(void) |
56 | { | 57 | { |
57 | board_time_init = setup_timer_frequency; | 58 | board_time_init = setup_timer_frequency; |
58 | board_timer_setup = setup_timer_irq; | ||
59 | } | 59 | } |
60 | 60 | ||
61 | void __init plat_mem_setup(void) | 61 | void __init plat_mem_setup(void) |
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 66aa50802deb..4733c5344467 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c | |||
@@ -22,7 +22,7 @@ | |||
22 | 22 | ||
23 | #include <asm/irq_cpu.h> | 23 | #include <asm/irq_cpu.h> |
24 | #include <asm/system.h> | 24 | #include <asm/system.h> |
25 | #include <asm/vr41xx/vr41xx.h> | 25 | #include <asm/vr41xx/irq.h> |
26 | 26 | ||
27 | typedef struct irq_cascade { | 27 | typedef struct irq_cascade { |
28 | int (*get_irq)(unsigned int, struct pt_regs *); | 28 | int (*get_irq)(unsigned int, struct pt_regs *); |
@@ -62,7 +62,7 @@ EXPORT_SYMBOL_GPL(cascade_irq); | |||
62 | static void irq_dispatch(unsigned int irq, struct pt_regs *regs) | 62 | static void irq_dispatch(unsigned int irq, struct pt_regs *regs) |
63 | { | 63 | { |
64 | irq_cascade_t *cascade; | 64 | irq_cascade_t *cascade; |
65 | irq_desc_t *desc; | 65 | struct irq_desc *desc; |
66 | 66 | ||
67 | if (irq >= NR_IRQS) { | 67 | if (irq >= NR_IRQS) { |
68 | atomic_inc(&irq_err_count); | 68 | atomic_inc(&irq_err_count); |
diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c deleted file mode 100644 index 2d287b8893d9..000000000000 --- a/arch/mips/vr41xx/common/vrc4173.c +++ /dev/null | |||
@@ -1,581 +0,0 @@ | |||
1 | /* | ||
2 | * vrc4173.c, NEC VRC4173 base driver for NEC VR4122/VR4131. | ||
3 | * | ||
4 | * Copyright (C) 2001-2003 MontaVista Software Inc. | ||
5 | * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> | ||
6 | * Copyright (C) 2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | ||
7 | * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | */ | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/interrupt.h> | ||
26 | #include <linux/irq.h> | ||
27 | #include <linux/pci.h> | ||
28 | #include <linux/spinlock.h> | ||
29 | #include <linux/types.h> | ||
30 | |||
31 | #include <asm/vr41xx/vr41xx.h> | ||
32 | #include <asm/vr41xx/vrc4173.h> | ||
33 | |||
34 | MODULE_DESCRIPTION("NEC VRC4173 base driver for NEC VR4122/4131"); | ||
35 | MODULE_AUTHOR("Yoichi Yuasa <yyuasa@mvista.com>"); | ||
36 | MODULE_LICENSE("GPL"); | ||
37 | |||
38 | #define VRC4173_CMUCLKMSK 0x040 | ||
39 | #define MSKPIU 0x0001 | ||
40 | #define MSKKIU 0x0002 | ||
41 | #define MSKAIU 0x0004 | ||
42 | #define MSKPS2CH1 0x0008 | ||
43 | #define MSKPS2CH2 0x0010 | ||
44 | #define MSKUSB 0x0020 | ||
45 | #define MSKCARD1 0x0040 | ||
46 | #define MSKCARD2 0x0080 | ||
47 | #define MSKAC97 0x0100 | ||
48 | #define MSK48MUSB 0x0400 | ||
49 | #define MSK48MPIN 0x0800 | ||
50 | #define MSK48MOSC 0x1000 | ||
51 | #define VRC4173_CMUSRST 0x042 | ||
52 | #define USBRST 0x0001 | ||
53 | #define CARD1RST 0x0002 | ||
54 | #define CARD2RST 0x0004 | ||
55 | #define AC97RST 0x0008 | ||
56 | |||
57 | #define VRC4173_SYSINT1REG 0x060 | ||
58 | #define VRC4173_MSYSINT1REG 0x06c | ||
59 | #define VRC4173_MPIUINTREG 0x06e | ||
60 | #define VRC4173_MAIUINTREG 0x070 | ||
61 | #define VRC4173_MKIUINTREG 0x072 | ||
62 | |||
63 | #define VRC4173_SELECTREG 0x09e | ||
64 | #define SEL3 0x0008 | ||
65 | #define SEL2 0x0004 | ||
66 | #define SEL1 0x0002 | ||
67 | #define SEL0 0x0001 | ||
68 | |||
69 | static struct pci_device_id vrc4173_id_table[] __devinitdata = { | ||
70 | { .vendor = PCI_VENDOR_ID_NEC, | ||
71 | .device = PCI_DEVICE_ID_NEC_VRC4173, | ||
72 | .subvendor = PCI_ANY_ID, | ||
73 | .subdevice = PCI_ANY_ID, }, | ||
74 | { .vendor = 0, }, | ||
75 | }; | ||
76 | |||
77 | unsigned long vrc4173_io_offset = 0; | ||
78 | |||
79 | EXPORT_SYMBOL(vrc4173_io_offset); | ||
80 | |||
81 | static int vrc4173_initialized; | ||
82 | static uint16_t vrc4173_cmuclkmsk; | ||
83 | static uint16_t vrc4173_selectreg; | ||
84 | static DEFINE_SPINLOCK(vrc4173_cmu_lock); | ||
85 | static DEFINE_SPINLOCK(vrc4173_giu_lock); | ||
86 | |||
87 | static inline void set_cmusrst(uint16_t val) | ||
88 | { | ||
89 | uint16_t cmusrst; | ||
90 | |||
91 | cmusrst = vrc4173_inw(VRC4173_CMUSRST); | ||
92 | cmusrst |= val; | ||
93 | vrc4173_outw(cmusrst, VRC4173_CMUSRST); | ||
94 | } | ||
95 | |||
96 | static inline void clear_cmusrst(uint16_t val) | ||
97 | { | ||
98 | uint16_t cmusrst; | ||
99 | |||
100 | cmusrst = vrc4173_inw(VRC4173_CMUSRST); | ||
101 | cmusrst &= ~val; | ||
102 | vrc4173_outw(cmusrst, VRC4173_CMUSRST); | ||
103 | } | ||
104 | |||
105 | void vrc4173_supply_clock(vrc4173_clock_t clock) | ||
106 | { | ||
107 | if (vrc4173_initialized) { | ||
108 | spin_lock_irq(&vrc4173_cmu_lock); | ||
109 | |||
110 | switch (clock) { | ||
111 | case VRC4173_PIU_CLOCK: | ||
112 | vrc4173_cmuclkmsk |= MSKPIU; | ||
113 | break; | ||
114 | case VRC4173_KIU_CLOCK: | ||
115 | vrc4173_cmuclkmsk |= MSKKIU; | ||
116 | break; | ||
117 | case VRC4173_AIU_CLOCK: | ||
118 | vrc4173_cmuclkmsk |= MSKAIU; | ||
119 | break; | ||
120 | case VRC4173_PS2_CH1_CLOCK: | ||
121 | vrc4173_cmuclkmsk |= MSKPS2CH1; | ||
122 | break; | ||
123 | case VRC4173_PS2_CH2_CLOCK: | ||
124 | vrc4173_cmuclkmsk |= MSKPS2CH2; | ||
125 | break; | ||
126 | case VRC4173_USBU_PCI_CLOCK: | ||
127 | set_cmusrst(USBRST); | ||
128 | vrc4173_cmuclkmsk |= MSKUSB; | ||
129 | break; | ||
130 | case VRC4173_CARDU1_PCI_CLOCK: | ||
131 | set_cmusrst(CARD1RST); | ||
132 | vrc4173_cmuclkmsk |= MSKCARD1; | ||
133 | break; | ||
134 | case VRC4173_CARDU2_PCI_CLOCK: | ||
135 | set_cmusrst(CARD2RST); | ||
136 | vrc4173_cmuclkmsk |= MSKCARD2; | ||
137 | break; | ||
138 | case VRC4173_AC97U_PCI_CLOCK: | ||
139 | set_cmusrst(AC97RST); | ||
140 | vrc4173_cmuclkmsk |= MSKAC97; | ||
141 | break; | ||
142 | case VRC4173_USBU_48MHz_CLOCK: | ||
143 | set_cmusrst(USBRST); | ||
144 | vrc4173_cmuclkmsk |= MSK48MUSB; | ||
145 | break; | ||
146 | case VRC4173_EXT_48MHz_CLOCK: | ||
147 | if (vrc4173_cmuclkmsk & MSK48MOSC) | ||
148 | vrc4173_cmuclkmsk |= MSK48MPIN; | ||
149 | else | ||
150 | printk(KERN_WARNING | ||
151 | "vrc4173_supply_clock: " | ||
152 | "Please supply VRC4173_48MHz_CLOCK first " | ||
153 | "rather than VRC4173_EXT_48MHz_CLOCK.\n"); | ||
154 | break; | ||
155 | case VRC4173_48MHz_CLOCK: | ||
156 | vrc4173_cmuclkmsk |= MSK48MOSC; | ||
157 | break; | ||
158 | default: | ||
159 | printk(KERN_WARNING | ||
160 | "vrc4173_supply_clock: Invalid CLOCK value %u\n", clock); | ||
161 | break; | ||
162 | } | ||
163 | |||
164 | vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK); | ||
165 | |||
166 | switch (clock) { | ||
167 | case VRC4173_USBU_PCI_CLOCK: | ||
168 | case VRC4173_USBU_48MHz_CLOCK: | ||
169 | clear_cmusrst(USBRST); | ||
170 | break; | ||
171 | case VRC4173_CARDU1_PCI_CLOCK: | ||
172 | clear_cmusrst(CARD1RST); | ||
173 | break; | ||
174 | case VRC4173_CARDU2_PCI_CLOCK: | ||
175 | clear_cmusrst(CARD2RST); | ||
176 | break; | ||
177 | case VRC4173_AC97U_PCI_CLOCK: | ||
178 | clear_cmusrst(AC97RST); | ||
179 | break; | ||
180 | default: | ||
181 | break; | ||
182 | } | ||
183 | |||
184 | spin_unlock_irq(&vrc4173_cmu_lock); | ||
185 | } | ||
186 | } | ||
187 | |||
188 | EXPORT_SYMBOL(vrc4173_supply_clock); | ||
189 | |||
190 | void vrc4173_mask_clock(vrc4173_clock_t clock) | ||
191 | { | ||
192 | if (vrc4173_initialized) { | ||
193 | spin_lock_irq(&vrc4173_cmu_lock); | ||
194 | |||
195 | switch (clock) { | ||
196 | case VRC4173_PIU_CLOCK: | ||
197 | vrc4173_cmuclkmsk &= ~MSKPIU; | ||
198 | break; | ||
199 | case VRC4173_KIU_CLOCK: | ||
200 | vrc4173_cmuclkmsk &= ~MSKKIU; | ||
201 | break; | ||
202 | case VRC4173_AIU_CLOCK: | ||
203 | vrc4173_cmuclkmsk &= ~MSKAIU; | ||
204 | break; | ||
205 | case VRC4173_PS2_CH1_CLOCK: | ||
206 | vrc4173_cmuclkmsk &= ~MSKPS2CH1; | ||
207 | break; | ||
208 | case VRC4173_PS2_CH2_CLOCK: | ||
209 | vrc4173_cmuclkmsk &= ~MSKPS2CH2; | ||
210 | break; | ||
211 | case VRC4173_USBU_PCI_CLOCK: | ||
212 | set_cmusrst(USBRST); | ||
213 | vrc4173_cmuclkmsk &= ~MSKUSB; | ||
214 | break; | ||
215 | case VRC4173_CARDU1_PCI_CLOCK: | ||
216 | set_cmusrst(CARD1RST); | ||
217 | vrc4173_cmuclkmsk &= ~MSKCARD1; | ||
218 | break; | ||
219 | case VRC4173_CARDU2_PCI_CLOCK: | ||
220 | set_cmusrst(CARD2RST); | ||
221 | vrc4173_cmuclkmsk &= ~MSKCARD2; | ||
222 | break; | ||
223 | case VRC4173_AC97U_PCI_CLOCK: | ||
224 | set_cmusrst(AC97RST); | ||
225 | vrc4173_cmuclkmsk &= ~MSKAC97; | ||
226 | break; | ||
227 | case VRC4173_USBU_48MHz_CLOCK: | ||
228 | set_cmusrst(USBRST); | ||
229 | vrc4173_cmuclkmsk &= ~MSK48MUSB; | ||
230 | break; | ||
231 | case VRC4173_EXT_48MHz_CLOCK: | ||
232 | vrc4173_cmuclkmsk &= ~MSK48MPIN; | ||
233 | break; | ||
234 | case VRC4173_48MHz_CLOCK: | ||
235 | vrc4173_cmuclkmsk &= ~MSK48MOSC; | ||
236 | break; | ||
237 | default: | ||
238 | printk(KERN_WARNING "vrc4173_mask_clock: Invalid CLOCK value %u\n", clock); | ||
239 | break; | ||
240 | } | ||
241 | |||
242 | vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK); | ||
243 | |||
244 | switch (clock) { | ||
245 | case VRC4173_USBU_PCI_CLOCK: | ||
246 | case VRC4173_USBU_48MHz_CLOCK: | ||
247 | clear_cmusrst(USBRST); | ||
248 | break; | ||
249 | case VRC4173_CARDU1_PCI_CLOCK: | ||
250 | clear_cmusrst(CARD1RST); | ||
251 | break; | ||
252 | case VRC4173_CARDU2_PCI_CLOCK: | ||
253 | clear_cmusrst(CARD2RST); | ||
254 | break; | ||
255 | case VRC4173_AC97U_PCI_CLOCK: | ||
256 | clear_cmusrst(AC97RST); | ||
257 | break; | ||
258 | default: | ||
259 | break; | ||
260 | } | ||
261 | |||
262 | spin_unlock_irq(&vrc4173_cmu_lock); | ||
263 | } | ||
264 | } | ||
265 | |||
266 | EXPORT_SYMBOL(vrc4173_mask_clock); | ||
267 | |||
268 | static inline void vrc4173_cmu_init(void) | ||
269 | { | ||
270 | vrc4173_cmuclkmsk = vrc4173_inw(VRC4173_CMUCLKMSK); | ||
271 | |||
272 | spin_lock_init(&vrc4173_cmu_lock); | ||
273 | } | ||
274 | |||
275 | void vrc4173_select_function(vrc4173_function_t function) | ||
276 | { | ||
277 | if (vrc4173_initialized) { | ||
278 | spin_lock_irq(&vrc4173_giu_lock); | ||
279 | |||
280 | switch(function) { | ||
281 | case PS2_CHANNEL1: | ||
282 | vrc4173_selectreg |= SEL2; | ||
283 | break; | ||
284 | case PS2_CHANNEL2: | ||
285 | vrc4173_selectreg |= SEL1; | ||
286 | break; | ||
287 | case TOUCHPANEL: | ||
288 | vrc4173_selectreg &= SEL2 | SEL1 | SEL0; | ||
289 | break; | ||
290 | case KEYBOARD_8SCANLINES: | ||
291 | vrc4173_selectreg &= SEL3 | SEL2 | SEL1; | ||
292 | break; | ||
293 | case KEYBOARD_10SCANLINES: | ||
294 | vrc4173_selectreg &= SEL3 | SEL2; | ||
295 | break; | ||
296 | case KEYBOARD_12SCANLINES: | ||
297 | vrc4173_selectreg &= SEL3; | ||
298 | break; | ||
299 | case GPIO_0_15PINS: | ||
300 | vrc4173_selectreg |= SEL0; | ||
301 | break; | ||
302 | case GPIO_16_20PINS: | ||
303 | vrc4173_selectreg |= SEL3; | ||
304 | break; | ||
305 | } | ||
306 | |||
307 | vrc4173_outw(vrc4173_selectreg, VRC4173_SELECTREG); | ||
308 | |||
309 | spin_unlock_irq(&vrc4173_giu_lock); | ||
310 | } | ||
311 | } | ||
312 | |||
313 | EXPORT_SYMBOL(vrc4173_select_function); | ||
314 | |||
315 | static inline void vrc4173_giu_init(void) | ||
316 | { | ||
317 | vrc4173_selectreg = vrc4173_inw(VRC4173_SELECTREG); | ||
318 | |||
319 | spin_lock_init(&vrc4173_giu_lock); | ||
320 | } | ||
321 | |||
322 | void vrc4173_enable_piuint(uint16_t mask) | ||
323 | { | ||
324 | irq_desc_t *desc = irq_desc + VRC4173_PIU_IRQ; | ||
325 | unsigned long flags; | ||
326 | uint16_t val; | ||
327 | |||
328 | spin_lock_irqsave(&desc->lock, flags); | ||
329 | val = vrc4173_inw(VRC4173_MPIUINTREG); | ||
330 | val |= mask; | ||
331 | vrc4173_outw(val, VRC4173_MPIUINTREG); | ||
332 | spin_unlock_irqrestore(&desc->lock, flags); | ||
333 | } | ||
334 | |||
335 | EXPORT_SYMBOL(vrc4173_enable_piuint); | ||
336 | |||
337 | void vrc4173_disable_piuint(uint16_t mask) | ||
338 | { | ||
339 | irq_desc_t *desc = irq_desc + VRC4173_PIU_IRQ; | ||
340 | unsigned long flags; | ||
341 | uint16_t val; | ||
342 | |||
343 | spin_lock_irqsave(&desc->lock, flags); | ||
344 | val = vrc4173_inw(VRC4173_MPIUINTREG); | ||
345 | val &= ~mask; | ||
346 | vrc4173_outw(val, VRC4173_MPIUINTREG); | ||
347 | spin_unlock_irqrestore(&desc->lock, flags); | ||
348 | } | ||
349 | |||
350 | EXPORT_SYMBOL(vrc4173_disable_piuint); | ||
351 | |||
352 | void vrc4173_enable_aiuint(uint16_t mask) | ||
353 | { | ||
354 | irq_desc_t *desc = irq_desc + VRC4173_AIU_IRQ; | ||
355 | unsigned long flags; | ||
356 | uint16_t val; | ||
357 | |||
358 | spin_lock_irqsave(&desc->lock, flags); | ||
359 | val = vrc4173_inw(VRC4173_MAIUINTREG); | ||
360 | val |= mask; | ||
361 | vrc4173_outw(val, VRC4173_MAIUINTREG); | ||
362 | spin_unlock_irqrestore(&desc->lock, flags); | ||
363 | } | ||
364 | |||
365 | EXPORT_SYMBOL(vrc4173_enable_aiuint); | ||
366 | |||
367 | void vrc4173_disable_aiuint(uint16_t mask) | ||
368 | { | ||
369 | irq_desc_t *desc = irq_desc + VRC4173_AIU_IRQ; | ||
370 | unsigned long flags; | ||
371 | uint16_t val; | ||
372 | |||
373 | spin_lock_irqsave(&desc->lock, flags); | ||
374 | val = vrc4173_inw(VRC4173_MAIUINTREG); | ||
375 | val &= ~mask; | ||
376 | vrc4173_outw(val, VRC4173_MAIUINTREG); | ||
377 | spin_unlock_irqrestore(&desc->lock, flags); | ||
378 | } | ||
379 | |||
380 | EXPORT_SYMBOL(vrc4173_disable_aiuint); | ||
381 | |||
382 | void vrc4173_enable_kiuint(uint16_t mask) | ||
383 | { | ||
384 | irq_desc_t *desc = irq_desc + VRC4173_KIU_IRQ; | ||
385 | unsigned long flags; | ||
386 | uint16_t val; | ||
387 | |||
388 | spin_lock_irqsave(&desc->lock, flags); | ||
389 | val = vrc4173_inw(VRC4173_MKIUINTREG); | ||
390 | val |= mask; | ||
391 | vrc4173_outw(val, VRC4173_MKIUINTREG); | ||
392 | spin_unlock_irqrestore(&desc->lock, flags); | ||
393 | } | ||
394 | |||
395 | EXPORT_SYMBOL(vrc4173_enable_kiuint); | ||
396 | |||
397 | void vrc4173_disable_kiuint(uint16_t mask) | ||
398 | { | ||
399 | irq_desc_t *desc = irq_desc + VRC4173_KIU_IRQ; | ||
400 | unsigned long flags; | ||
401 | uint16_t val; | ||
402 | |||
403 | spin_lock_irqsave(&desc->lock, flags); | ||
404 | val = vrc4173_inw(VRC4173_MKIUINTREG); | ||
405 | val &= ~mask; | ||
406 | vrc4173_outw(val, VRC4173_MKIUINTREG); | ||
407 | spin_unlock_irqrestore(&desc->lock, flags); | ||
408 | } | ||
409 | |||
410 | EXPORT_SYMBOL(vrc4173_disable_kiuint); | ||
411 | |||
412 | static void enable_vrc4173_irq(unsigned int irq) | ||
413 | { | ||
414 | uint16_t val; | ||
415 | |||
416 | val = vrc4173_inw(VRC4173_MSYSINT1REG); | ||
417 | val |= (uint16_t)1 << (irq - VRC4173_IRQ_BASE); | ||
418 | vrc4173_outw(val, VRC4173_MSYSINT1REG); | ||
419 | } | ||
420 | |||
421 | static void disable_vrc4173_irq(unsigned int irq) | ||
422 | { | ||
423 | uint16_t val; | ||
424 | |||
425 | val = vrc4173_inw(VRC4173_MSYSINT1REG); | ||
426 | val &= ~((uint16_t)1 << (irq - VRC4173_IRQ_BASE)); | ||
427 | vrc4173_outw(val, VRC4173_MSYSINT1REG); | ||
428 | } | ||
429 | |||
430 | static unsigned int startup_vrc4173_irq(unsigned int irq) | ||
431 | { | ||
432 | enable_vrc4173_irq(irq); | ||
433 | return 0; /* never anything pending */ | ||
434 | } | ||
435 | |||
436 | #define shutdown_vrc4173_irq disable_vrc4173_irq | ||
437 | #define ack_vrc4173_irq disable_vrc4173_irq | ||
438 | |||
439 | static void end_vrc4173_irq(unsigned int irq) | ||
440 | { | ||
441 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | ||
442 | enable_vrc4173_irq(irq); | ||
443 | } | ||
444 | |||
445 | static struct hw_interrupt_type vrc4173_irq_type = { | ||
446 | .typename = "VRC4173", | ||
447 | .startup = startup_vrc4173_irq, | ||
448 | .shutdown = shutdown_vrc4173_irq, | ||
449 | .enable = enable_vrc4173_irq, | ||
450 | .disable = disable_vrc4173_irq, | ||
451 | .ack = ack_vrc4173_irq, | ||
452 | .end = end_vrc4173_irq, | ||
453 | }; | ||
454 | |||
455 | static int vrc4173_get_irq_number(int irq) | ||
456 | { | ||
457 | uint16_t status, mask; | ||
458 | int i; | ||
459 | |||
460 | status = vrc4173_inw(VRC4173_SYSINT1REG); | ||
461 | mask = vrc4173_inw(VRC4173_MSYSINT1REG); | ||
462 | |||
463 | status &= mask; | ||
464 | if (status) { | ||
465 | for (i = 0; i < 16; i++) | ||
466 | if (status & (0x0001 << i)) | ||
467 | return VRC4173_IRQ(i); | ||
468 | } | ||
469 | |||
470 | return -EINVAL; | ||
471 | } | ||
472 | |||
473 | static inline int vrc4173_icu_init(int cascade_irq) | ||
474 | { | ||
475 | int i; | ||
476 | |||
477 | if (cascade_irq < GIU_IRQ(0) || cascade_irq > GIU_IRQ(15)) | ||
478 | return -EINVAL; | ||
479 | |||
480 | vrc4173_outw(0, VRC4173_MSYSINT1REG); | ||
481 | |||
482 | vr41xx_set_irq_trigger(GIU_IRQ_TO_PIN(cascade_irq), TRIGGER_LEVEL, SIGNAL_THROUGH); | ||
483 | vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW); | ||
484 | |||
485 | for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++) | ||
486 | irq_desc[i].chip = &vrc4173_irq_type; | ||
487 | |||
488 | return 0; | ||
489 | } | ||
490 | |||
491 | static int __devinit vrc4173_probe(struct pci_dev *dev, | ||
492 | const struct pci_device_id *id) | ||
493 | { | ||
494 | unsigned long start, flags; | ||
495 | int err; | ||
496 | |||
497 | err = pci_enable_device(dev); | ||
498 | if (err < 0) { | ||
499 | printk(KERN_ERR "vrc4173: Failed to enable PCI device, aborting\n"); | ||
500 | return err; | ||
501 | } | ||
502 | |||
503 | pci_set_master(dev); | ||
504 | |||
505 | start = pci_resource_start(dev, 0); | ||
506 | if (start == 0) { | ||
507 | printk(KERN_ERR "vrc4173:No such PCI I/O resource, aborting\n"); | ||
508 | return -ENXIO; | ||
509 | } | ||
510 | |||
511 | flags = pci_resource_flags(dev, 0); | ||
512 | if ((flags & IORESOURCE_IO) == 0) { | ||
513 | printk(KERN_ERR "vrc4173: No such PCI I/O resource, aborting\n"); | ||
514 | return -ENXIO; | ||
515 | } | ||
516 | |||
517 | err = pci_request_regions(dev, "NEC VRC4173"); | ||
518 | if (err < 0) { | ||
519 | printk(KERN_ERR "vrc4173: PCI resources are busy, aborting\n"); | ||
520 | return err; | ||
521 | } | ||
522 | |||
523 | set_vrc4173_io_offset(start); | ||
524 | |||
525 | vrc4173_cmu_init(); | ||
526 | vrc4173_giu_init(); | ||
527 | |||
528 | err = vrc4173_icu_init(dev->irq); | ||
529 | if (err < 0) { | ||
530 | printk(KERN_ERR "vrc4173: Invalid IRQ %d, aborting\n", dev->irq); | ||
531 | return err; | ||
532 | } | ||
533 | |||
534 | err = vr41xx_cascade_irq(dev->irq, vrc4173_get_irq_number); | ||
535 | if (err < 0) { | ||
536 | printk(KERN_ERR "vrc4173: IRQ resource %d is busy, aborting\n", dev->irq); | ||
537 | return err; | ||
538 | } | ||
539 | |||
540 | printk(KERN_INFO | ||
541 | "NEC VRC4173 at 0x%#08lx, IRQ is cascaded to %d\n", start, dev->irq); | ||
542 | |||
543 | return 0; | ||
544 | } | ||
545 | |||
546 | static void vrc4173_remove(struct pci_dev *dev) | ||
547 | { | ||
548 | free_irq(dev->irq, NULL); | ||
549 | |||
550 | pci_release_regions(dev); | ||
551 | } | ||
552 | |||
553 | static struct pci_driver vrc4173_driver = { | ||
554 | .name = "NEC VRC4173", | ||
555 | .probe = vrc4173_probe, | ||
556 | .remove = vrc4173_remove, | ||
557 | .id_table = vrc4173_id_table, | ||
558 | }; | ||
559 | |||
560 | static int __devinit vrc4173_init(void) | ||
561 | { | ||
562 | int err; | ||
563 | |||
564 | err = pci_register_driver(&vrc4173_driver); | ||
565 | if (err < 0) | ||
566 | return err; | ||
567 | |||
568 | vrc4173_initialized = 1; | ||
569 | |||
570 | return 0; | ||
571 | } | ||
572 | |||
573 | static void __devexit vrc4173_exit(void) | ||
574 | { | ||
575 | vrc4173_initialized = 0; | ||
576 | |||
577 | pci_unregister_driver(&vrc4173_driver); | ||
578 | } | ||
579 | |||
580 | module_init(vrc4173_init); | ||
581 | module_exit(vrc4173_exit); | ||
diff --git a/arch/mips/vr41xx/ibm-workpad/setup.c b/arch/mips/vr41xx/ibm-workpad/setup.c index 50fe8af4c52c..9eef297eca1a 100644 --- a/arch/mips/vr41xx/ibm-workpad/setup.c +++ b/arch/mips/vr41xx/ibm-workpad/setup.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * setup.c, Setup for the IBM WorkPad z50. | 2 | * setup.c, Setup for the IBM WorkPad z50. |
3 | * | 3 | * |
4 | * Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2002-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
@@ -21,13 +21,18 @@ | |||
21 | #include <linux/ioport.h> | 21 | #include <linux/ioport.h> |
22 | 22 | ||
23 | #include <asm/io.h> | 23 | #include <asm/io.h> |
24 | #include <asm/vr41xx/workpad.h> | 24 | |
25 | #define WORKPAD_ISA_IO_BASE 0x15000000 | ||
26 | #define WORKPAD_ISA_IO_SIZE 0x03000000 | ||
27 | #define WORKPAD_ISA_IO_START 0 | ||
28 | #define WORKPAD_ISA_IO_END (WORKPAD_ISA_IO_SIZE - 1) | ||
29 | #define WORKPAD_IO_PORT_BASE KSEG1ADDR(WORKPAD_ISA_IO_BASE) | ||
25 | 30 | ||
26 | static int __init ibm_workpad_setup(void) | 31 | static int __init ibm_workpad_setup(void) |
27 | { | 32 | { |
28 | set_io_port_base(IO_PORT_BASE); | 33 | set_io_port_base(WORKPAD_IO_PORT_BASE); |
29 | ioport_resource.start = IO_PORT_RESOURCE_START; | 34 | ioport_resource.start = WORKPAD_ISA_IO_START; |
30 | ioport_resource.end = IO_PORT_RESOURCE_END; | 35 | ioport_resource.end = WORKPAD_ISA_IO_END; |
31 | 36 | ||
32 | return 0; | 37 | return 0; |
33 | } | 38 | } |
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c index 7b2511ca0a61..2483487344c2 100644 --- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c +++ b/arch/mips/vr41xx/nec-cmbvr4133/irq.c | |||
@@ -62,7 +62,7 @@ static void end_i8259_irq(unsigned int irq) | |||
62 | enable_8259A_irq(irq - I8259_IRQ_BASE); | 62 | enable_8259A_irq(irq - I8259_IRQ_BASE); |
63 | } | 63 | } |
64 | 64 | ||
65 | static struct hw_interrupt_type i8259_irq_type = { | 65 | static struct irq_chip i8259_irq_type = { |
66 | .typename = "XT-PIC", | 66 | .typename = "XT-PIC", |
67 | .startup = startup_i8259_irq, | 67 | .startup = startup_i8259_irq, |
68 | .shutdown = shutdown_i8259_irq, | 68 | .shutdown = shutdown_i8259_irq, |