diff options
Diffstat (limited to 'arch/mips/vr41xx/common/icu.c')
-rw-r--r-- | arch/mips/vr41xx/common/icu.c | 46 |
1 files changed, 12 insertions, 34 deletions
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index c215c0d39fae..33d70a6547ad 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c | |||
@@ -417,14 +417,7 @@ void vr41xx_disable_bcuint(void) | |||
417 | 417 | ||
418 | EXPORT_SYMBOL(vr41xx_disable_bcuint); | 418 | EXPORT_SYMBOL(vr41xx_disable_bcuint); |
419 | 419 | ||
420 | static unsigned int startup_sysint1_irq(unsigned int irq) | 420 | static void disable_sysint1_irq(unsigned int irq) |
421 | { | ||
422 | icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); | ||
423 | |||
424 | return 0; /* never anything pending */ | ||
425 | } | ||
426 | |||
427 | static void shutdown_sysint1_irq(unsigned int irq) | ||
428 | { | 421 | { |
429 | icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); | 422 | icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); |
430 | } | 423 | } |
@@ -434,9 +427,6 @@ static void enable_sysint1_irq(unsigned int irq) | |||
434 | icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); | 427 | icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); |
435 | } | 428 | } |
436 | 429 | ||
437 | #define disable_sysint1_irq shutdown_sysint1_irq | ||
438 | #define ack_sysint1_irq shutdown_sysint1_irq | ||
439 | |||
440 | static void end_sysint1_irq(unsigned int irq) | 430 | static void end_sysint1_irq(unsigned int irq) |
441 | { | 431 | { |
442 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 432 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
@@ -445,22 +435,14 @@ static void end_sysint1_irq(unsigned int irq) | |||
445 | 435 | ||
446 | static struct irq_chip sysint1_irq_type = { | 436 | static struct irq_chip sysint1_irq_type = { |
447 | .typename = "SYSINT1", | 437 | .typename = "SYSINT1", |
448 | .startup = startup_sysint1_irq, | 438 | .ack = disable_sysint1_irq, |
449 | .shutdown = shutdown_sysint1_irq, | 439 | .mask = disable_sysint1_irq, |
450 | .enable = enable_sysint1_irq, | 440 | .mask_ack = disable_sysint1_irq, |
451 | .disable = disable_sysint1_irq, | 441 | .unmask = enable_sysint1_irq, |
452 | .ack = ack_sysint1_irq, | ||
453 | .end = end_sysint1_irq, | 442 | .end = end_sysint1_irq, |
454 | }; | 443 | }; |
455 | 444 | ||
456 | static unsigned int startup_sysint2_irq(unsigned int irq) | 445 | static void disable_sysint2_irq(unsigned int irq) |
457 | { | ||
458 | icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); | ||
459 | |||
460 | return 0; /* never anything pending */ | ||
461 | } | ||
462 | |||
463 | static void shutdown_sysint2_irq(unsigned int irq) | ||
464 | { | 446 | { |
465 | icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); | 447 | icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); |
466 | } | 448 | } |
@@ -470,9 +452,6 @@ static void enable_sysint2_irq(unsigned int irq) | |||
470 | icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); | 452 | icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); |
471 | } | 453 | } |
472 | 454 | ||
473 | #define disable_sysint2_irq shutdown_sysint2_irq | ||
474 | #define ack_sysint2_irq shutdown_sysint2_irq | ||
475 | |||
476 | static void end_sysint2_irq(unsigned int irq) | 455 | static void end_sysint2_irq(unsigned int irq) |
477 | { | 456 | { |
478 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 457 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) |
@@ -481,11 +460,10 @@ static void end_sysint2_irq(unsigned int irq) | |||
481 | 460 | ||
482 | static struct irq_chip sysint2_irq_type = { | 461 | static struct irq_chip sysint2_irq_type = { |
483 | .typename = "SYSINT2", | 462 | .typename = "SYSINT2", |
484 | .startup = startup_sysint2_irq, | 463 | .ack = disable_sysint2_irq, |
485 | .shutdown = shutdown_sysint2_irq, | 464 | .mask = disable_sysint2_irq, |
486 | .enable = enable_sysint2_irq, | 465 | .mask_ack = disable_sysint2_irq, |
487 | .disable = disable_sysint2_irq, | 466 | .unmask = enable_sysint2_irq, |
488 | .ack = ack_sysint2_irq, | ||
489 | .end = end_sysint2_irq, | 467 | .end = end_sysint2_irq, |
490 | }; | 468 | }; |
491 | 469 | ||
@@ -723,10 +701,10 @@ static int __init vr41xx_icu_init(void) | |||
723 | icu2_write(MGIUINTHREG, 0xffff); | 701 | icu2_write(MGIUINTHREG, 0xffff); |
724 | 702 | ||
725 | for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) | 703 | for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) |
726 | irq_desc[i].chip = &sysint1_irq_type; | 704 | set_irq_chip(i, &sysint1_irq_type); |
727 | 705 | ||
728 | for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) | 706 | for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) |
729 | irq_desc[i].chip = &sysint2_irq_type; | 707 | set_irq_chip(i, &sysint2_irq_type); |
730 | 708 | ||
731 | cascade_irq(INT0_IRQ, icu_get_irq); | 709 | cascade_irq(INT0_IRQ, icu_get_irq); |
732 | cascade_irq(INT1_IRQ, icu_get_irq); | 710 | cascade_irq(INT1_IRQ, icu_get_irq); |