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-rw-r--r--arch/mips/vr4181/osprey/Makefile7
-rw-r--r--arch/mips/vr4181/osprey/dbg_io.c136
-rw-r--r--arch/mips/vr4181/osprey/prom.c49
-rw-r--r--arch/mips/vr4181/osprey/reset.c40
-rw-r--r--arch/mips/vr4181/osprey/setup.c68
5 files changed, 0 insertions, 300 deletions
diff --git a/arch/mips/vr4181/osprey/Makefile b/arch/mips/vr4181/osprey/Makefile
deleted file mode 100644
index 34be05790883..000000000000
--- a/arch/mips/vr4181/osprey/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for common code of NEC Osprey board
3#
4
5obj-y := setup.o prom.o reset.o
6
7obj-$(CONFIG_KGDB) += dbg_io.o
diff --git a/arch/mips/vr4181/osprey/dbg_io.c b/arch/mips/vr4181/osprey/dbg_io.c
deleted file mode 100644
index 5e8a84072d5b..000000000000
--- a/arch/mips/vr4181/osprey/dbg_io.c
+++ /dev/null
@@ -1,136 +0,0 @@
1/*
2 * kgdb io functions for osprey. We use the serial port on debug board.
3 *
4 * Copyright (C) 2001 MontaVista Software Inc.
5 * Author: jsun@mvista.com or jsun@junsun.net
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14/* ======================= CONFIG ======================== */
15
16/* [jsun] we use the second serial port for kdb */
17#define BASE 0xb7fffff0
18#define MAX_BAUD 115200
19
20/* distance in bytes between two serial registers */
21#define REG_OFFSET 1
22
23/*
24 * 0 - kgdb does serial init
25 * 1 - kgdb skip serial init
26 */
27static int remoteDebugInitialized = 1;
28
29/*
30 * the default baud rate *if* kgdb does serial init
31 */
32#define BAUD_DEFAULT UART16550_BAUD_38400
33
34/* ======================= END OF CONFIG ======================== */
35
36typedef unsigned char uint8;
37typedef unsigned int uint32;
38
39#define UART16550_BAUD_2400 2400
40#define UART16550_BAUD_4800 4800
41#define UART16550_BAUD_9600 9600
42#define UART16550_BAUD_19200 19200
43#define UART16550_BAUD_38400 38400
44#define UART16550_BAUD_57600 57600
45#define UART16550_BAUD_115200 115200
46
47#define UART16550_PARITY_NONE 0
48#define UART16550_PARITY_ODD 0x08
49#define UART16550_PARITY_EVEN 0x18
50#define UART16550_PARITY_MARK 0x28
51#define UART16550_PARITY_SPACE 0x38
52
53#define UART16550_DATA_5BIT 0x0
54#define UART16550_DATA_6BIT 0x1
55#define UART16550_DATA_7BIT 0x2
56#define UART16550_DATA_8BIT 0x3
57
58#define UART16550_STOP_1BIT 0x0
59#define UART16550_STOP_2BIT 0x4
60
61/* register offset */
62#define OFS_RCV_BUFFER 0
63#define OFS_TRANS_HOLD 0
64#define OFS_SEND_BUFFER 0
65#define OFS_INTR_ENABLE (1*REG_OFFSET)
66#define OFS_INTR_ID (2*REG_OFFSET)
67#define OFS_DATA_FORMAT (3*REG_OFFSET)
68#define OFS_LINE_CONTROL (3*REG_OFFSET)
69#define OFS_MODEM_CONTROL (4*REG_OFFSET)
70#define OFS_RS232_OUTPUT (4*REG_OFFSET)
71#define OFS_LINE_STATUS (5*REG_OFFSET)
72#define OFS_MODEM_STATUS (6*REG_OFFSET)
73#define OFS_RS232_INPUT (6*REG_OFFSET)
74#define OFS_SCRATCH_PAD (7*REG_OFFSET)
75
76#define OFS_DIVISOR_LSB (0*REG_OFFSET)
77#define OFS_DIVISOR_MSB (1*REG_OFFSET)
78
79
80/* memory-mapped read/write of the port */
81#define UART16550_READ(y) (*((volatile uint8*)(BASE + y)))
82#define UART16550_WRITE(y, z) ((*((volatile uint8*)(BASE + y))) = z)
83
84void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
85{
86 /* disable interrupts */
87 UART16550_WRITE(OFS_INTR_ENABLE, 0);
88
89 /* set up buad rate */
90 {
91 uint32 divisor;
92
93 /* set DIAB bit */
94 UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
95
96 /* set divisor */
97 divisor = MAX_BAUD / baud;
98 UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
99 UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
100
101 /* clear DIAB bit */
102 UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
103 }
104
105 /* set data format */
106 UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
107}
108
109
110uint8 getDebugChar(void)
111{
112 if (!remoteDebugInitialized) {
113 remoteDebugInitialized = 1;
114 debugInit(BAUD_DEFAULT,
115 UART16550_DATA_8BIT,
116 UART16550_PARITY_NONE, UART16550_STOP_1BIT);
117 }
118
119 while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
120 return UART16550_READ(OFS_RCV_BUFFER);
121}
122
123
124int putDebugChar(uint8 byte)
125{
126 if (!remoteDebugInitialized) {
127 remoteDebugInitialized = 1;
128 debugInit(BAUD_DEFAULT,
129 UART16550_DATA_8BIT,
130 UART16550_PARITY_NONE, UART16550_STOP_1BIT);
131 }
132
133 while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0);
134 UART16550_WRITE(OFS_SEND_BUFFER, byte);
135 return 1;
136}
diff --git a/arch/mips/vr4181/osprey/prom.c b/arch/mips/vr4181/osprey/prom.c
deleted file mode 100644
index af0d14561619..000000000000
--- a/arch/mips/vr4181/osprey/prom.c
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * Copyright 2001 MontaVista Software Inc.
3 * Author: jsun@mvista.com or jsun@junsun.net
4 *
5 * arch/mips/vr4181/osprey/prom.c
6 * prom code for osprey.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/string.h>
17#include <linux/mm.h>
18#include <linux/bootmem.h>
19#include <asm/bootinfo.h>
20#include <asm/addrspace.h>
21
22const char *get_system_type(void)
23{
24 return "NEC_Vr41xx Osprey";
25}
26
27/*
28 * [jsun] right now we assume it is the nec debug monitor, which does
29 * not pass any arguments.
30 */
31void __init prom_init(void)
32{
33 // cmdline is now set in default config
34 // strcpy(arcs_cmdline, "ip=bootp ");
35 // strcat(arcs_cmdline, "ether=46,0x03fe0300,eth0 ");
36 // strcpy(arcs_cmdline, "ether=0,0x0300,eth0 "
37 // strcat(arcs_cmdline, "video=vr4181fb:xres:240,yres:320,bpp:8 ");
38
39 mips_machgroup = MACH_GROUP_NEC_VR41XX;
40 mips_machtype = MACH_NEC_OSPREY;
41
42 /* 16MB fixed */
43 add_memory_region(0, 16 << 20, BOOT_MEM_RAM);
44}
45
46unsigned long __init prom_free_prom_memory(void)
47{
48 return 0;
49}
diff --git a/arch/mips/vr4181/osprey/reset.c b/arch/mips/vr4181/osprey/reset.c
deleted file mode 100644
index 036ae83d89d6..000000000000
--- a/arch/mips/vr4181/osprey/reset.c
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License as published by the
4 * Free Software Foundation; either version 2 of the License, or (at your
5 * option) any later version.
6 *
7 * Copyright (C) 1997, 2001 Ralf Baechle
8 * Copyright 2001 MontaVista Software Inc.
9 * Author: jsun@mvista.com or jsun@junsun.net
10 */
11#include <linux/sched.h>
12#include <linux/mm.h>
13#include <asm/io.h>
14#include <asm/cacheflush.h>
15#include <asm/processor.h>
16#include <asm/reboot.h>
17#include <asm/system.h>
18
19void nec_osprey_restart(char *command)
20{
21 set_c0_status(ST0_ERL);
22 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
23 flush_cache_all();
24 write_c0_wired(0);
25 __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
26}
27
28void nec_osprey_halt(void)
29{
30 printk(KERN_NOTICE "\n** You can safely turn off the power\n");
31 while (1)
32 __asm__(".set\tmips3\n\t"
33 "wait\n\t"
34 ".set\tmips0");
35}
36
37void nec_osprey_power_off(void)
38{
39 nec_osprey_halt();
40}
diff --git a/arch/mips/vr4181/osprey/setup.c b/arch/mips/vr4181/osprey/setup.c
deleted file mode 100644
index 2ff7140e7ed7..000000000000
--- a/arch/mips/vr4181/osprey/setup.c
+++ /dev/null
@@ -1,68 +0,0 @@
1/*
2 * linux/arch/mips/vr4181/setup.c
3 *
4 * VR41xx setup routines
5 *
6 * Copyright (C) 1999 Bradley D. LaRonde
7 * Copyright (C) 1999, 2000 Michael Klar
8 *
9 * Copyright 2001 MontaVista Software Inc.
10 * Author: jsun@mvista.com or jsun@junsun.net
11 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
12 *
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
15 * for more details.
16 *
17 */
18
19#include <linux/ide.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <asm/reboot.h>
23#include <asm/vr4181/vr4181.h>
24#include <asm/io.h>
25
26
27extern void nec_osprey_restart(char* c);
28extern void nec_osprey_halt(void);
29extern void nec_osprey_power_off(void);
30
31extern void vr4181_init_serial(void);
32extern void vr4181_init_time(void);
33
34static void __init nec_osprey_setup(void)
35{
36 set_io_port_base(VR4181_PORT_BASE);
37 isa_slot_offset = VR4181_ISAMEM_BASE;
38
39 vr4181_init_serial();
40 vr4181_init_time();
41
42 _machine_restart = nec_osprey_restart;
43 _machine_halt = nec_osprey_halt;
44 _machine_power_off = nec_osprey_power_off;
45
46 /* setup resource limit */
47 ioport_resource.end = 0xffffffff;
48 iomem_resource.end = 0xffffffff;
49
50 /* [jsun] hack */
51 /*
52 printk("[jsun] hack to change external ISA control register, %x -> %x\n",
53 (*VR4181_XISACTL),
54 (*VR4181_XISACTL) | 0x2);
55 *VR4181_XISACTL |= 0x2;
56 */
57
58 // *VR4181_GPHIBSTH = 0x2000;
59 // *VR4181_GPMD0REG = 0x00c0;
60 // *VR4181_GPINTEN = 1<<6;
61
62 /* [jsun] I believe this will get the interrupt type right
63 * for the ether port.
64 */
65 *VR4181_GPINTTYPL = 0x3000;
66}
67
68early_initcall(nec_osprey_setup);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-27 12:06:41 -0500