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-rw-r--r--arch/mips/vr4181/osprey/setup.c68
1 files changed, 0 insertions, 68 deletions
diff --git a/arch/mips/vr4181/osprey/setup.c b/arch/mips/vr4181/osprey/setup.c
deleted file mode 100644
index 2ff7140e7ed7..000000000000
--- a/arch/mips/vr4181/osprey/setup.c
+++ /dev/null
@@ -1,68 +0,0 @@
1/*
2 * linux/arch/mips/vr4181/setup.c
3 *
4 * VR41xx setup routines
5 *
6 * Copyright (C) 1999 Bradley D. LaRonde
7 * Copyright (C) 1999, 2000 Michael Klar
8 *
9 * Copyright 2001 MontaVista Software Inc.
10 * Author: jsun@mvista.com or jsun@junsun.net
11 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
12 *
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
15 * for more details.
16 *
17 */
18
19#include <linux/ide.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <asm/reboot.h>
23#include <asm/vr4181/vr4181.h>
24#include <asm/io.h>
25
26
27extern void nec_osprey_restart(char* c);
28extern void nec_osprey_halt(void);
29extern void nec_osprey_power_off(void);
30
31extern void vr4181_init_serial(void);
32extern void vr4181_init_time(void);
33
34static void __init nec_osprey_setup(void)
35{
36 set_io_port_base(VR4181_PORT_BASE);
37 isa_slot_offset = VR4181_ISAMEM_BASE;
38
39 vr4181_init_serial();
40 vr4181_init_time();
41
42 _machine_restart = nec_osprey_restart;
43 _machine_halt = nec_osprey_halt;
44 _machine_power_off = nec_osprey_power_off;
45
46 /* setup resource limit */
47 ioport_resource.end = 0xffffffff;
48 iomem_resource.end = 0xffffffff;
49
50 /* [jsun] hack */
51 /*
52 printk("[jsun] hack to change external ISA control register, %x -> %x\n",
53 (*VR4181_XISACTL),
54 (*VR4181_XISACTL) | 0x2);
55 *VR4181_XISACTL |= 0x2;
56 */
57
58 // *VR4181_GPHIBSTH = 0x2000;
59 // *VR4181_GPMD0REG = 0x00c0;
60 // *VR4181_GPINTEN = 1<<6;
61
62 /* [jsun] I believe this will get the interrupt type right
63 * for the ether port.
64 */
65 *VR4181_GPINTTYPL = 0x3000;
66}
67
68early_initcall(nec_osprey_setup);