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-rw-r--r--arch/mips/txx9/rbtx4938/Makefile2
-rw-r--r--arch/mips/txx9/rbtx4938/irq.c8
-rw-r--r--arch/mips/txx9/rbtx4938/prom.c3
-rw-r--r--arch/mips/txx9/rbtx4938/setup.c63
-rw-r--r--arch/mips/txx9/rbtx4938/spi_eeprom.c99
5 files changed, 60 insertions, 115 deletions
diff --git a/arch/mips/txx9/rbtx4938/Makefile b/arch/mips/txx9/rbtx4938/Makefile
index 9dcc52ae5b9d..f3e1f597b4f1 100644
--- a/arch/mips/txx9/rbtx4938/Makefile
+++ b/arch/mips/txx9/rbtx4938/Makefile
@@ -1,3 +1,3 @@
1obj-y += prom.o setup.o irq.o spi_eeprom.o 1obj-y += prom.o setup.o irq.o
2 2
3EXTRA_CFLAGS += -Werror 3EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c
index ca2f8306ce93..7d21befb8932 100644
--- a/arch/mips/txx9/rbtx4938/irq.c
+++ b/arch/mips/txx9/rbtx4938/irq.c
@@ -85,10 +85,10 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq)
85 u8 level3; 85 u8 level3;
86 86
87 level3 = readb(rbtx4938_imstat_addr); 87 level3 = readb(rbtx4938_imstat_addr);
88 if (level3) 88 if (unlikely(!level3))
89 /* must use fls so onboard ATA has priority */ 89 return -1;
90 sw_irq = RBTX4938_IRQ_IOC + fls(level3) - 1; 90 /* must use fls so onboard ATA has priority */
91 return sw_irq; 91 return RBTX4938_IRQ_IOC + __fls8(level3);
92} 92}
93 93
94static void __init 94static void __init
diff --git a/arch/mips/txx9/rbtx4938/prom.c b/arch/mips/txx9/rbtx4938/prom.c
index d73123cd2ab9..bcb469247e8c 100644
--- a/arch/mips/txx9/rbtx4938/prom.c
+++ b/arch/mips/txx9/rbtx4938/prom.c
@@ -18,9 +18,6 @@
18 18
19void __init rbtx4938_prom_init(void) 19void __init rbtx4938_prom_init(void)
20{ 20{
21#ifndef CONFIG_TX4938_NAND_BOOT
22 prom_init_cmdline();
23#endif
24 add_memory_region(0, tx4938_get_mem_size(), BOOT_MEM_RAM); 21 add_memory_region(0, tx4938_get_mem_size(), BOOT_MEM_RAM);
25 txx9_sio_putchar_init(TX4938_SIO_REG(0) & 0xfffffffffULL); 22 txx9_sio_putchar_init(TX4938_SIO_REG(0) & 0xfffffffffULL);
26} 23}
diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c
index 9ab48dec0fe8..e077cc4d3a59 100644
--- a/arch/mips/txx9/rbtx4938/setup.c
+++ b/arch/mips/txx9/rbtx4938/setup.c
@@ -15,6 +15,7 @@
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/mtd/physmap.h>
18 19
19#include <asm/reboot.h> 20#include <asm/reboot.h>
20#include <asm/io.h> 21#include <asm/io.h>
@@ -110,6 +111,7 @@ static void __init rbtx4938_pci_setup(void)
110#define SEEPROM2_CS 0 /* IOC */ 111#define SEEPROM2_CS 0 /* IOC */
111#define SEEPROM3_CS 1 /* IOC */ 112#define SEEPROM3_CS 1 /* IOC */
112#define SRTC_CS 2 /* IOC */ 113#define SRTC_CS 2 /* IOC */
114#define SPI_BUSNO 0
113 115
114static int __init rbtx4938_ethaddr_init(void) 116static int __init rbtx4938_ethaddr_init(void)
115{ 117{
@@ -119,7 +121,7 @@ static int __init rbtx4938_ethaddr_init(void)
119 int i; 121 int i;
120 122
121 /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */ 123 /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */
122 if (spi_eeprom_read(SEEPROM1_CS, 0, dat, sizeof(dat))) { 124 if (spi_eeprom_read(SPI_BUSNO, SEEPROM1_CS, 0, dat, sizeof(dat))) {
123 printk(KERN_ERR "seeprom: read error.\n"); 125 printk(KERN_ERR "seeprom: read error.\n");
124 return -ENODEV; 126 return -ENODEV;
125 } else { 127 } else {
@@ -173,23 +175,30 @@ static void __init rbtx4938_mem_setup(void)
173#endif 175#endif
174 176
175#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61 177#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61
176 printk(KERN_INFO "PIOSEL: disabling both ata and nand selection\n"); 178 pr_info("PIOSEL: disabling both ATA and NAND selection\n");
177 txx9_clear64(&tx4938_ccfgptr->pcfg, 179 txx9_clear64(&tx4938_ccfgptr->pcfg,
178 TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL); 180 TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL);
179#endif 181#endif
180 182
181#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND 183#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND
182 printk(KERN_INFO "PIOSEL: enabling nand selection\n"); 184 pr_info("PIOSEL: enabling NAND selection\n");
183 txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); 185 txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
184 txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); 186 txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
185#endif 187#endif
186 188
187#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA 189#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA
188 printk(KERN_INFO "PIOSEL: enabling ata selection\n"); 190 pr_info("PIOSEL: enabling ATA selection\n");
189 txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); 191 txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
190 txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); 192 txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
191#endif 193#endif
192 194
195#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_KEEP
196 pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg);
197 pr_info("PIOSEL: NAND %s, ATA %s\n",
198 (pcfg & TX4938_PCFG_NDF_SEL) ? "enabled" : "disabled",
199 (pcfg & TX4938_PCFG_ATA_SEL) ? "enabled" : "disabled");
200#endif
201
193 rbtx4938_spi_setup(); 202 rbtx4938_spi_setup();
194 pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */ 203 pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */
195 /* fixup piosel */ 204 /* fixup piosel */
@@ -279,9 +288,9 @@ static int __init rbtx4938_spi_init(void)
279 .mode = SPI_MODE_1 | SPI_CS_HIGH, 288 .mode = SPI_MODE_1 | SPI_CS_HIGH,
280 }; 289 };
281 spi_register_board_info(&srtc_info, 1); 290 spi_register_board_info(&srtc_info, 1);
282 spi_eeprom_register(SEEPROM1_CS); 291 spi_eeprom_register(SPI_BUSNO, SEEPROM1_CS, 128);
283 spi_eeprom_register(16 + SEEPROM2_CS); 292 spi_eeprom_register(SPI_BUSNO, 16 + SEEPROM2_CS, 128);
284 spi_eeprom_register(16 + SEEPROM3_CS); 293 spi_eeprom_register(SPI_BUSNO, 16 + SEEPROM3_CS, 128);
285 gpio_request(16 + SRTC_CS, "rtc-rs5c348"); 294 gpio_request(16 + SRTC_CS, "rtc-rs5c348");
286 gpio_direction_output(16 + SRTC_CS, 0); 295 gpio_direction_output(16 + SRTC_CS, 0);
287 gpio_request(SEEPROM1_CS, "seeprom1"); 296 gpio_request(SEEPROM1_CS, "seeprom1");
@@ -290,10 +299,46 @@ static int __init rbtx4938_spi_init(void)
290 gpio_direction_output(16 + SEEPROM2_CS, 1); 299 gpio_direction_output(16 + SEEPROM2_CS, 1);
291 gpio_request(16 + SEEPROM3_CS, "seeprom3"); 300 gpio_request(16 + SEEPROM3_CS, "seeprom3");
292 gpio_direction_output(16 + SEEPROM3_CS, 1); 301 gpio_direction_output(16 + SEEPROM3_CS, 1);
293 tx4938_spi_init(0); 302 tx4938_spi_init(SPI_BUSNO);
294 return 0; 303 return 0;
295} 304}
296 305
306static void __init rbtx4938_mtd_init(void)
307{
308 struct physmap_flash_data pdata = {
309 .width = 4,
310 };
311
312 switch (readb(rbtx4938_bdipsw_addr) & 7) {
313 case 0:
314 /* Boot */
315 txx9_physmap_flash_init(0, 0x1fc00000, 0x400000, &pdata);
316 /* System */
317 txx9_physmap_flash_init(1, 0x1e000000, 0x1000000, &pdata);
318 break;
319 case 1:
320 /* System */
321 txx9_physmap_flash_init(0, 0x1f000000, 0x1000000, &pdata);
322 /* Boot */
323 txx9_physmap_flash_init(1, 0x1ec00000, 0x400000, &pdata);
324 break;
325 case 2:
326 /* Ext */
327 txx9_physmap_flash_init(0, 0x1f000000, 0x1000000, &pdata);
328 /* System */
329 txx9_physmap_flash_init(1, 0x1e000000, 0x1000000, &pdata);
330 /* Boot */
331 txx9_physmap_flash_init(2, 0x1dc00000, 0x400000, &pdata);
332 break;
333 case 3:
334 /* Boot */
335 txx9_physmap_flash_init(1, 0x1bc00000, 0x400000, &pdata);
336 /* System */
337 txx9_physmap_flash_init(2, 0x1a000000, 0x1000000, &pdata);
338 break;
339 }
340}
341
297static void __init rbtx4938_arch_init(void) 342static void __init rbtx4938_arch_init(void)
298{ 343{
299 gpiochip_add(&rbtx4938_spi_gpio_chip); 344 gpiochip_add(&rbtx4938_spi_gpio_chip);
@@ -306,6 +351,8 @@ static void __init rbtx4938_device_init(void)
306 rbtx4938_ethaddr_init(); 351 rbtx4938_ethaddr_init();
307 rbtx4938_ne_init(); 352 rbtx4938_ne_init();
308 tx4938_wdt_init(); 353 tx4938_wdt_init();
354 rbtx4938_mtd_init();
355 txx9_iocled_init(RBTX4938_LED_ADDR - IO_BASE, -1, 8, 1, "green", NULL);
309} 356}
310 357
311struct txx9_board_vec rbtx4938_vec __initdata = { 358struct txx9_board_vec rbtx4938_vec __initdata = {
diff --git a/arch/mips/txx9/rbtx4938/spi_eeprom.c b/arch/mips/txx9/rbtx4938/spi_eeprom.c
deleted file mode 100644
index a7ea8b041c1d..000000000000
--- a/arch/mips/txx9/rbtx4938/spi_eeprom.c
+++ /dev/null
@@ -1,99 +0,0 @@
1/*
2 * spi_eeprom.c
3 * Copyright (C) 2000-2001 Toshiba Corporation
4 *
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
8 * or implied.
9 *
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
11 */
12#include <linux/init.h>
13#include <linux/device.h>
14#include <linux/spi/spi.h>
15#include <linux/spi/eeprom.h>
16#include <asm/txx9/spi.h>
17
18#define AT250X0_PAGE_SIZE 8
19
20/* register board information for at25 driver */
21int __init spi_eeprom_register(int chipid)
22{
23 static struct spi_eeprom eeprom = {
24 .name = "at250x0",
25 .byte_len = 128,
26 .page_size = AT250X0_PAGE_SIZE,
27 .flags = EE_ADDR1,
28 };
29 struct spi_board_info info = {
30 .modalias = "at25",
31 .max_speed_hz = 1500000, /* 1.5Mbps */
32 .bus_num = 0,
33 .chip_select = chipid,
34 .platform_data = &eeprom,
35 /* Mode 0: High-Active, Sample-Then-Shift */
36 };
37
38 return spi_register_board_info(&info, 1);
39}
40
41/* simple temporary spi driver to provide early access to seeprom. */
42
43static struct read_param {
44 int chipid;
45 int address;
46 unsigned char *buf;
47 int len;
48} *read_param;
49
50static int __init early_seeprom_probe(struct spi_device *spi)
51{
52 int stat = 0;
53 u8 cmd[2];
54 int len = read_param->len;
55 char *buf = read_param->buf;
56 int address = read_param->address;
57
58 dev_info(&spi->dev, "spiclk %u KHz.\n",
59 (spi->max_speed_hz + 500) / 1000);
60 if (read_param->chipid != spi->chip_select)
61 return -ENODEV;
62 while (len > 0) {
63 /* spi_write_then_read can only work with small chunk */
64 int c = len < AT250X0_PAGE_SIZE ? len : AT250X0_PAGE_SIZE;
65 cmd[0] = 0x03; /* AT25_READ */
66 cmd[1] = address;
67 stat = spi_write_then_read(spi, cmd, sizeof(cmd), buf, c);
68 buf += c;
69 len -= c;
70 address += c;
71 }
72 return stat;
73}
74
75static struct spi_driver early_seeprom_driver __initdata = {
76 .driver = {
77 .name = "at25",
78 .owner = THIS_MODULE,
79 },
80 .probe = early_seeprom_probe,
81};
82
83int __init spi_eeprom_read(int chipid, int address,
84 unsigned char *buf, int len)
85{
86 int ret;
87 struct read_param param = {
88 .chipid = chipid,
89 .address = address,
90 .buf = buf,
91 .len = len
92 };
93
94 read_param = &param;
95 ret = spi_register_driver(&early_seeprom_driver);
96 if (!ret)
97 spi_unregister_driver(&early_seeprom_driver);
98 return ret;
99}