diff options
Diffstat (limited to 'arch/mips/txx9/rbtx4927/irq.c')
-rw-r--r-- | arch/mips/txx9/rbtx4927/irq.c | 57 |
1 files changed, 30 insertions, 27 deletions
diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c index bef1447aeed2..70f13211bc2a 100644 --- a/arch/mips/txx9/rbtx4927/irq.c +++ b/arch/mips/txx9/rbtx4927/irq.c | |||
@@ -111,17 +111,10 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB | |||
111 | #include <linux/types.h> | 111 | #include <linux/types.h> |
112 | #include <linux/interrupt.h> | 112 | #include <linux/interrupt.h> |
113 | #include <asm/io.h> | 113 | #include <asm/io.h> |
114 | #include <asm/mipsregs.h> | ||
115 | #include <asm/txx9/generic.h> | ||
114 | #include <asm/txx9/rbtx4927.h> | 116 | #include <asm/txx9/rbtx4927.h> |
115 | 117 | ||
116 | #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG 0 | ||
117 | #define TOSHIBA_RBTX4927_IRQ_IOC_RAW_END 7 | ||
118 | |||
119 | #define TOSHIBA_RBTX4927_IRQ_IOC_BEG ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG) /* 56 */ | ||
120 | #define TOSHIBA_RBTX4927_IRQ_IOC_END ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_END) /* 63 */ | ||
121 | |||
122 | #define TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC TX4927_IRQ_NEST_EXT_ON_PIC | ||
123 | #define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC (TOSHIBA_RBTX4927_IRQ_IOC_BEG+2) | ||
124 | |||
125 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq); | 118 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq); |
126 | static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq); | 119 | static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq); |
127 | 120 | ||
@@ -136,34 +129,25 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { | |||
136 | #define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL | 129 | #define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL |
137 | #define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL | 130 | #define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL |
138 | 131 | ||
139 | int toshiba_rbtx4927_irq_nested(int sw_irq) | 132 | static int toshiba_rbtx4927_irq_nested(int sw_irq) |
140 | { | 133 | { |
141 | u8 level3; | 134 | u8 level3; |
142 | 135 | ||
143 | level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; | 136 | level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f; |
144 | if (level3) | 137 | if (level3) |
145 | sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + fls(level3) - 1; | 138 | sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1; |
146 | return (sw_irq); | 139 | return (sw_irq); |
147 | } | 140 | } |
148 | 141 | ||
149 | static struct irqaction toshiba_rbtx4927_irq_ioc_action = { | ||
150 | .handler = no_action, | ||
151 | .flags = IRQF_SHARED, | ||
152 | .mask = CPU_MASK_NONE, | ||
153 | .name = TOSHIBA_RBTX4927_IOC_NAME | ||
154 | }; | ||
155 | |||
156 | static void __init toshiba_rbtx4927_irq_ioc_init(void) | 142 | static void __init toshiba_rbtx4927_irq_ioc_init(void) |
157 | { | 143 | { |
158 | int i; | 144 | int i; |
159 | 145 | ||
160 | for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG; | 146 | for (i = RBTX4927_IRQ_IOC; |
161 | i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++) | 147 | i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++) |
162 | set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, | 148 | set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, |
163 | handle_level_irq); | 149 | handle_level_irq); |
164 | 150 | set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq); | |
165 | setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC, | ||
166 | &toshiba_rbtx4927_irq_ioc_action); | ||
167 | } | 151 | } |
168 | 152 | ||
169 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) | 153 | static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) |
@@ -171,7 +155,7 @@ static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) | |||
171 | unsigned char v; | 155 | unsigned char v; |
172 | 156 | ||
173 | v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); | 157 | v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); |
174 | v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); | 158 | v |= (1 << (irq - RBTX4927_IRQ_IOC)); |
175 | writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); | 159 | writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); |
176 | } | 160 | } |
177 | 161 | ||
@@ -180,15 +164,34 @@ static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) | |||
180 | unsigned char v; | 164 | unsigned char v; |
181 | 165 | ||
182 | v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); | 166 | v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB); |
183 | v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); | 167 | v &= ~(1 << (irq - RBTX4927_IRQ_IOC)); |
184 | writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); | 168 | writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB); |
185 | mmiowb(); | 169 | mmiowb(); |
186 | } | 170 | } |
187 | 171 | ||
188 | void __init arch_init_irq(void) | 172 | |
173 | static int rbtx4927_irq_dispatch(int pending) | ||
189 | { | 174 | { |
190 | extern void tx4927_irq_init(void); | 175 | int irq; |
176 | |||
177 | if (pending & STATUSF_IP7) /* cpu timer */ | ||
178 | irq = MIPS_CPU_IRQ_BASE + 7; | ||
179 | else if (pending & STATUSF_IP2) { /* tx4927 pic */ | ||
180 | irq = txx9_irq(); | ||
181 | if (irq == RBTX4927_IRQ_IOCINT) | ||
182 | irq = toshiba_rbtx4927_irq_nested(irq); | ||
183 | } else if (pending & STATUSF_IP0) /* user line 0 */ | ||
184 | irq = MIPS_CPU_IRQ_BASE + 0; | ||
185 | else if (pending & STATUSF_IP1) /* user line 1 */ | ||
186 | irq = MIPS_CPU_IRQ_BASE + 1; | ||
187 | else | ||
188 | irq = -1; | ||
189 | return irq; | ||
190 | } | ||
191 | 191 | ||
192 | void __init rbtx4927_irq_setup(void) | ||
193 | { | ||
194 | txx9_irq_dispatch = rbtx4927_irq_dispatch; | ||
192 | tx4927_irq_init(); | 195 | tx4927_irq_init(); |
193 | toshiba_rbtx4927_irq_ioc_init(); | 196 | toshiba_rbtx4927_irq_ioc_init(); |
194 | /* Onboard 10M Ether: High Active */ | 197 | /* Onboard 10M Ether: High Active */ |