diff options
Diffstat (limited to 'arch/mips/txx9/generic/setup_tx3927.c')
-rw-r--r-- | arch/mips/txx9/generic/setup_tx3927.c | 37 |
1 files changed, 22 insertions, 15 deletions
diff --git a/arch/mips/txx9/generic/setup_tx3927.c b/arch/mips/txx9/generic/setup_tx3927.c index 7bd963d37fc3..9505d58454c8 100644 --- a/arch/mips/txx9/generic/setup_tx3927.c +++ b/arch/mips/txx9/generic/setup_tx3927.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/delay.h> | 15 | #include <linux/delay.h> |
16 | #include <linux/param.h> | 16 | #include <linux/param.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | #include <linux/mtd/physmap.h> | ||
18 | #include <asm/mipsregs.h> | 19 | #include <asm/mipsregs.h> |
19 | #include <asm/txx9irq.h> | 20 | #include <asm/txx9irq.h> |
20 | #include <asm/txx9tmr.h> | 21 | #include <asm/txx9tmr.h> |
@@ -32,11 +33,6 @@ void __init tx3927_setup(void) | |||
32 | int i; | 33 | int i; |
33 | unsigned int conf; | 34 | unsigned int conf; |
34 | 35 | ||
35 | /* don't enable - see errata */ | ||
36 | txx9_ccfg_toeon = 0; | ||
37 | if (strstr(prom_getcmdline(), "toeon") != NULL) | ||
38 | txx9_ccfg_toeon = 1; | ||
39 | |||
40 | txx9_reg_res_init(TX3927_REV_PCODE(), TX3927_REG_BASE, | 36 | txx9_reg_res_init(TX3927_REV_PCODE(), TX3927_REG_BASE, |
41 | TX3927_REG_SIZE); | 37 | TX3927_REG_SIZE); |
42 | 38 | ||
@@ -99,16 +95,14 @@ void __init tx3927_setup(void) | |||
99 | txx9_gpio_init(TX3927_PIO_REG, 0, 16); | 95 | txx9_gpio_init(TX3927_PIO_REG, 0, 16); |
100 | 96 | ||
101 | conf = read_c0_conf(); | 97 | conf = read_c0_conf(); |
102 | if (!(conf & TX39_CONF_ICE)) | 98 | if (conf & TX39_CONF_DCE) { |
103 | printk(KERN_INFO "TX3927 I-Cache disabled.\n"); | 99 | if (!(conf & TX39_CONF_WBON)) |
104 | if (!(conf & TX39_CONF_DCE)) | 100 | pr_info("TX3927 D-Cache WriteThrough.\n"); |
105 | printk(KERN_INFO "TX3927 D-Cache disabled.\n"); | 101 | else if (!(conf & TX39_CONF_CWFON)) |
106 | else if (!(conf & TX39_CONF_WBON)) | 102 | pr_info("TX3927 D-Cache WriteBack.\n"); |
107 | printk(KERN_INFO "TX3927 D-Cache WriteThrough.\n"); | 103 | else |
108 | else if (!(conf & TX39_CONF_CWFON)) | 104 | pr_info("TX3927 D-Cache WriteBack (CWF) .\n"); |
109 | printk(KERN_INFO "TX3927 D-Cache WriteBack.\n"); | 105 | } |
110 | else | ||
111 | printk(KERN_INFO "TX3927 D-Cache WriteBack (CWF) .\n"); | ||
112 | } | 106 | } |
113 | 107 | ||
114 | void __init tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr) | 108 | void __init tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr) |
@@ -128,3 +122,16 @@ void __init tx3927_sio_init(unsigned int sclk, unsigned int cts_mask) | |||
128 | TXX9_IRQ_BASE + TX3927_IR_SIO(i), | 122 | TXX9_IRQ_BASE + TX3927_IR_SIO(i), |
129 | i, sclk, (1 << i) & cts_mask); | 123 | i, sclk, (1 << i) & cts_mask); |
130 | } | 124 | } |
125 | |||
126 | void __init tx3927_mtd_init(int ch) | ||
127 | { | ||
128 | struct physmap_flash_data pdata = { | ||
129 | .width = TX3927_ROMC_WIDTH(ch) / 8, | ||
130 | }; | ||
131 | unsigned long start = txx9_ce_res[ch].start; | ||
132 | unsigned long size = txx9_ce_res[ch].end - start + 1; | ||
133 | |||
134 | if (!(tx3927_romcptr->cr[ch] & 0x8)) | ||
135 | return; /* disabled */ | ||
136 | txx9_physmap_flash_init(ch, start, size, &pdata); | ||
137 | } | ||