1 files changed, 141 insertions, 0 deletions
diff --git a/arch/mips/txx9/generic/mem_tx4927.c b/arch/mips/txx9/generic/mem_tx4927.c
new file mode 100644
index 000000000000..12dfc377bf2f
--- /dev/null
+++ b/arch/mips/txx9/generic/mem_tx4927.c
@@ -0,0 +1,141 @@
+/*
+ * linux/arch/mips/tx4927/common/tx4927_prom.c
+ *
+ * common tx4927 memory interface
+ *
+ * Author: MontaVista Software, Inc.
+ *         source@mvista.com
+ *
+ * Copyright 2001-2002 MontaVista Software Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 2 of the License, or (at your
+ *  option) any later version.
+ *
+ *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/io.h>
+static unsigned int __init tx4927_process_sdccr(unsigned long addr)
+{
+        u64 val;
+        unsigned int sdccr_ce;
+        unsigned int sdccr_bs;
+        unsigned int sdccr_rs;
+        unsigned int sdccr_cs;
+        unsigned int sdccr_mw;
+        unsigned int bs = 0;
+        unsigned int rs = 0;
+        unsigned int cs = 0;
+        unsigned int mw = 0;
+        unsigned int msize = 0;
+        val = __raw_readq((void __iomem *)addr);
+        /* MVMCP -- need #defs for these bits masks */
+        sdccr_ce = ((val & (1 << 10)) >> 10);
+        sdccr_bs = ((val & (1 << 8)) >> 8);
+        sdccr_rs = ((val & (3 << 5)) >> 5);
+        sdccr_cs = ((val & (3 << 2)) >> 2);
+        sdccr_mw = ((val & (1 << 0)) >> 0);
+        if (sdccr_ce) {
+                switch (sdccr_bs) {
+                case 0:{
+                                bs = 2;
+                                break;
+                        }
+                case 1:{
+                                bs = 4;
+                                break;
+                        }
+                }
+                switch (sdccr_rs) {
+                case 0:{
+                                rs = 2048;
+                                break;
+                        }
+                case 1:{
+                                rs = 4096;
+                                break;
+                        }
+                case 2:{
+                                rs = 8192;
+                                break;
+                        }
+                case 3:{
+                                rs = 0;
+                                break;
+                        }
+                }
+                switch (sdccr_cs) {
+                case 0:{
+                                cs = 256;
+                                break;
+                        }
+                case 1:{
+                                cs = 512;
+                                break;
+                        }
+                case 2:{
+                                cs = 1024;
+                                break;
+                        }
+                case 3:{
+                                cs = 2048;
+                                break;
+                        }
+                }
+                switch (sdccr_mw) {
+                case 0:{
+                                mw = 8;
+                                break;
+                        }       /* 8 bytes = 64 bits */
+                case 1:{
+                                mw = 4;
+                                break;
+                        }       /* 4 bytes = 32 bits */
+                }
+        }
+        /*            bytes per chip     MB per chip      num chips */
+        msize = (((rs * cs * mw) / (1024 * 1024)) * bs);
+        return (msize);
+}
+unsigned int __init tx4927_get_mem_size(void)
+{
+        unsigned int c0;
+        unsigned int c1;
+        unsigned int c2;
+        unsigned int c3;
+        unsigned int total;
+        /* MVMCP -- need #defs for these registers */
+        c0 = tx4927_process_sdccr(0xff1f8000);
+        c1 = tx4927_process_sdccr(0xff1f8008);
+        c2 = tx4927_process_sdccr(0xff1f8010);
+        c3 = tx4927_process_sdccr(0xff1f8018);
+        total = c0 + c1 + c2 + c3;
+        return (total);
+}

diff --git a/arch/mips/txx9/generic/mem_tx4927.c b/arch/mips/txx9/generic/mem_tx4927.c new file mode 100644 index 000000000000..12dfc377bf2f --- /dev/null +++ b/arch/mips/txx9/generic/mem_tx4927.c
@@ -0,0 +1,141 @@
	1	/*
	2	* linux/arch/mips/tx4927/common/tx4927_prom.c
	3	*
	4	* common tx4927 memory interface
	5	*
	6	* Author: MontaVista Software, Inc.
	7	* source@mvista.com
	8	*
	9	* Copyright 2001-2002 MontaVista Software Inc.
	10	*
	11	* This program is free software; you can redistribute it and/or modify it
	12	* under the terms of the GNU General Public License as published by the
	13	* Free Software Foundation; either version 2 of the License, or (at your
	14	* option) any later version.
	15	*
	16	* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
	17	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	18	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
	19	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
	20	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
	21	* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
	22	* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
	23	* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
	24	* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
	25	* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	26	*
	27	* You should have received a copy of the GNU General Public License along
	28	* with this program; if not, write to the Free Software Foundation, Inc.,
	29	* 675 Mass Ave, Cambridge, MA 02139, USA.
	30	*/
	31
	32	#include <linux/init.h>
	33	#include <linux/types.h>
	34	#include <linux/io.h>
	35
	36	static unsigned int __init tx4927_process_sdccr(unsigned long addr)
	37	{
	38	u64 val;
	39	unsigned int sdccr_ce;
	40	unsigned int sdccr_bs;
	41	unsigned int sdccr_rs;
	42	unsigned int sdccr_cs;
	43	unsigned int sdccr_mw;
	44	unsigned int bs = 0;
	45	unsigned int rs = 0;
	46	unsigned int cs = 0;
	47	unsigned int mw = 0;
	48	unsigned int msize = 0;
	49
	50	val = __raw_readq((void __iomem *)addr);
	51
	52	/* MVMCP -- need #defs for these bits masks */
	53	sdccr_ce = ((val & (1 << 10)) >> 10);
	54	sdccr_bs = ((val & (1 << 8)) >> 8);
	55	sdccr_rs = ((val & (3 << 5)) >> 5);
	56	sdccr_cs = ((val & (3 << 2)) >> 2);
	57	sdccr_mw = ((val & (1 << 0)) >> 0);
	58
	59	if (sdccr_ce) {
	60	switch (sdccr_bs) {
	61	case 0:{
	62	bs = 2;
	63	break;
	64	}
	65	case 1:{
	66	bs = 4;
	67	break;
	68	}
	69	}
	70	switch (sdccr_rs) {
	71	case 0:{
	72	rs = 2048;
	73	break;
	74	}
	75	case 1:{
	76	rs = 4096;
	77	break;
	78	}
	79	case 2:{
	80	rs = 8192;
	81	break;
	82	}
	83	case 3:{
	84	rs = 0;
	85	break;
	86	}
	87	}
	88	switch (sdccr_cs) {
	89	case 0:{
	90	cs = 256;
	91	break;
	92	}
	93	case 1:{
	94	cs = 512;
	95	break;
	96	}
	97	case 2:{
	98	cs = 1024;
	99	break;
	100	}
	101	case 3:{
	102	cs = 2048;
	103	break;
	104	}
	105	}
	106	switch (sdccr_mw) {
	107	case 0:{
	108	mw = 8;
	109	break;
	110	} /* 8 bytes = 64 bits */
	111	case 1:{
	112	mw = 4;
	113	break;
	114	} /* 4 bytes = 32 bits */
	115	}
	116	}
	117
	118	/* bytes per chip MB per chip num chips */
	119	msize = (((rs * cs * mw) / (1024 * 1024)) * bs);
	120
	121	return (msize);
	122	}
	123
	124
	125	unsigned int __init tx4927_get_mem_size(void)
	126	{
	127	unsigned int c0;
	128	unsigned int c1;
	129	unsigned int c2;
	130	unsigned int c3;
	131	unsigned int total;
	132
	133	/* MVMCP -- need #defs for these registers */
	134	c0 = tx4927_process_sdccr(0xff1f8000);
	135	c1 = tx4927_process_sdccr(0xff1f8008);
	136	c2 = tx4927_process_sdccr(0xff1f8010);
	137	c3 = tx4927_process_sdccr(0xff1f8018);
	138	total = c0 + c1 + c2 + c3;
	139
	140	return (total);
	141	}