diff options
Diffstat (limited to 'arch/mips/tx4938/common/prom.c')
-rw-r--r-- | arch/mips/tx4938/common/prom.c | 124 |
1 files changed, 0 insertions, 124 deletions
diff --git a/arch/mips/tx4938/common/prom.c b/arch/mips/tx4938/common/prom.c deleted file mode 100644 index 20baeaeba4cd..000000000000 --- a/arch/mips/tx4938/common/prom.c +++ /dev/null | |||
@@ -1,124 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/mips/tx4938/common/prom.c | ||
3 | * | ||
4 | * common tx4938 memory interface | ||
5 | * Copyright (C) 2000-2001 Toshiba Corporation | ||
6 | * | ||
7 | * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the | ||
8 | * terms of the GNU General Public License version 2. This program is | ||
9 | * licensed "as is" without any warranty of any kind, whether express | ||
10 | * or implied. | ||
11 | * | ||
12 | * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) | ||
13 | */ | ||
14 | |||
15 | #include <linux/init.h> | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/io.h> | ||
18 | |||
19 | static unsigned int __init | ||
20 | tx4938_process_sdccr(u64 * addr) | ||
21 | { | ||
22 | u64 val; | ||
23 | unsigned int sdccr_ce; | ||
24 | unsigned int sdccr_rs; | ||
25 | unsigned int sdccr_cs; | ||
26 | unsigned int sdccr_mw; | ||
27 | unsigned int rs = 0; | ||
28 | unsigned int cs = 0; | ||
29 | unsigned int mw = 0; | ||
30 | unsigned int bc = 4; | ||
31 | unsigned int msize = 0; | ||
32 | |||
33 | val = ____raw_readq((void __iomem *)addr); | ||
34 | |||
35 | /* MVMCP -- need #defs for these bits masks */ | ||
36 | sdccr_ce = ((val & (1 << 10)) >> 10); | ||
37 | sdccr_rs = ((val & (3 << 5)) >> 5); | ||
38 | sdccr_cs = ((val & (7 << 2)) >> 2); | ||
39 | sdccr_mw = ((val & (1 << 0)) >> 0); | ||
40 | |||
41 | if (sdccr_ce) { | ||
42 | switch (sdccr_rs) { | ||
43 | case 0:{ | ||
44 | rs = 2048; | ||
45 | break; | ||
46 | } | ||
47 | case 1:{ | ||
48 | rs = 4096; | ||
49 | break; | ||
50 | } | ||
51 | case 2:{ | ||
52 | rs = 8192; | ||
53 | break; | ||
54 | } | ||
55 | default:{ | ||
56 | rs = 0; | ||
57 | break; | ||
58 | } | ||
59 | } | ||
60 | switch (sdccr_cs) { | ||
61 | case 0:{ | ||
62 | cs = 256; | ||
63 | break; | ||
64 | } | ||
65 | case 1:{ | ||
66 | cs = 512; | ||
67 | break; | ||
68 | } | ||
69 | case 2:{ | ||
70 | cs = 1024; | ||
71 | break; | ||
72 | } | ||
73 | case 3:{ | ||
74 | cs = 2048; | ||
75 | break; | ||
76 | } | ||
77 | case 4:{ | ||
78 | cs = 4096; | ||
79 | break; | ||
80 | } | ||
81 | default:{ | ||
82 | cs = 0; | ||
83 | break; | ||
84 | } | ||
85 | } | ||
86 | switch (sdccr_mw) { | ||
87 | case 0:{ | ||
88 | mw = 8; | ||
89 | break; | ||
90 | } /* 8 bytes = 64 bits */ | ||
91 | case 1:{ | ||
92 | mw = 4; | ||
93 | break; | ||
94 | } /* 4 bytes = 32 bits */ | ||
95 | } | ||
96 | } | ||
97 | |||
98 | /* bytes per chip MB per chip bank count */ | ||
99 | msize = (((rs * cs * mw) / (1024 * 1024)) * (bc)); | ||
100 | |||
101 | /* MVMCP -- bc hard coded to 4 from table 9.3.1 */ | ||
102 | /* boad supports bc=2 but no way to detect */ | ||
103 | |||
104 | return (msize); | ||
105 | } | ||
106 | |||
107 | unsigned int __init | ||
108 | tx4938_get_mem_size(void) | ||
109 | { | ||
110 | unsigned int c0; | ||
111 | unsigned int c1; | ||
112 | unsigned int c2; | ||
113 | unsigned int c3; | ||
114 | unsigned int total; | ||
115 | |||
116 | /* MVMCP -- need #defs for these registers */ | ||
117 | c0 = tx4938_process_sdccr((u64 *) 0xff1f8000); | ||
118 | c1 = tx4938_process_sdccr((u64 *) 0xff1f8008); | ||
119 | c2 = tx4938_process_sdccr((u64 *) 0xff1f8010); | ||
120 | c3 = tx4938_process_sdccr((u64 *) 0xff1f8018); | ||
121 | total = c0 + c1 + c2 + c3; | ||
122 | |||
123 | return (total); | ||
124 | } | ||