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-rw-r--r--arch/mips/tx4927/common/tx4927_irq.c162
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c183
2 files changed, 23 insertions, 322 deletions
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c
index 8266a88a3f88..2c57ced5c68c 100644
--- a/arch/mips/tx4927/common/tx4927_irq.c
+++ b/arch/mips/tx4927/common/tx4927_irq.c
@@ -64,19 +64,13 @@
64#define TX4927_IRQ_NEST4 ( 1 << 9 ) 64#define TX4927_IRQ_NEST4 ( 1 << 9 )
65 65
66#define TX4927_IRQ_CP0_INIT ( 1 << 10 ) 66#define TX4927_IRQ_CP0_INIT ( 1 << 10 )
67#define TX4927_IRQ_CP0_STARTUP ( 1 << 11 )
68#define TX4927_IRQ_CP0_SHUTDOWN ( 1 << 12 )
69#define TX4927_IRQ_CP0_ENABLE ( 1 << 13 ) 67#define TX4927_IRQ_CP0_ENABLE ( 1 << 13 )
70#define TX4927_IRQ_CP0_DISABLE ( 1 << 14 ) 68#define TX4927_IRQ_CP0_DISABLE ( 1 << 14 )
71#define TX4927_IRQ_CP0_MASK ( 1 << 15 )
72#define TX4927_IRQ_CP0_ENDIRQ ( 1 << 16 ) 69#define TX4927_IRQ_CP0_ENDIRQ ( 1 << 16 )
73 70
74#define TX4927_IRQ_PIC_INIT ( 1 << 20 ) 71#define TX4927_IRQ_PIC_INIT ( 1 << 20 )
75#define TX4927_IRQ_PIC_STARTUP ( 1 << 21 )
76#define TX4927_IRQ_PIC_SHUTDOWN ( 1 << 22 )
77#define TX4927_IRQ_PIC_ENABLE ( 1 << 23 ) 72#define TX4927_IRQ_PIC_ENABLE ( 1 << 23 )
78#define TX4927_IRQ_PIC_DISABLE ( 1 << 24 ) 73#define TX4927_IRQ_PIC_DISABLE ( 1 << 24 )
79#define TX4927_IRQ_PIC_MASK ( 1 << 25 )
80#define TX4927_IRQ_PIC_ENDIRQ ( 1 << 26 ) 74#define TX4927_IRQ_PIC_ENDIRQ ( 1 << 26 )
81 75
82#define TX4927_IRQ_ALL 0xffffffff 76#define TX4927_IRQ_ALL 0xffffffff
@@ -87,18 +81,12 @@ static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE
87 | TX4927_IRQ_INFO 81 | TX4927_IRQ_INFO
88 | TX4927_IRQ_WARN | TX4927_IRQ_EROR 82 | TX4927_IRQ_WARN | TX4927_IRQ_EROR
89// | TX4927_IRQ_CP0_INIT 83// | TX4927_IRQ_CP0_INIT
90// | TX4927_IRQ_CP0_STARTUP
91// | TX4927_IRQ_CP0_SHUTDOWN
92// | TX4927_IRQ_CP0_ENABLE 84// | TX4927_IRQ_CP0_ENABLE
93// | TX4927_IRQ_CP0_DISABLE 85// | TX4927_IRQ_CP0_DISABLE
94// | TX4927_IRQ_CP0_MASK
95// | TX4927_IRQ_CP0_ENDIRQ 86// | TX4927_IRQ_CP0_ENDIRQ
96// | TX4927_IRQ_PIC_INIT 87// | TX4927_IRQ_PIC_INIT
97// | TX4927_IRQ_PIC_STARTUP
98// | TX4927_IRQ_PIC_SHUTDOWN
99// | TX4927_IRQ_PIC_ENABLE 88// | TX4927_IRQ_PIC_ENABLE
100// | TX4927_IRQ_PIC_DISABLE 89// | TX4927_IRQ_PIC_DISABLE
101// | TX4927_IRQ_PIC_MASK
102// | TX4927_IRQ_PIC_ENDIRQ 90// | TX4927_IRQ_PIC_ENDIRQ
103// | TX4927_IRQ_INIT 91// | TX4927_IRQ_INIT
104// | TX4927_IRQ_NEST1 92// | TX4927_IRQ_NEST1
@@ -124,49 +112,36 @@ static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE
124 * Forwad definitions for all pic's 112 * Forwad definitions for all pic's
125 */ 113 */
126 114
127static unsigned int tx4927_irq_cp0_startup(unsigned int irq);
128static void tx4927_irq_cp0_shutdown(unsigned int irq);
129static void tx4927_irq_cp0_enable(unsigned int irq); 115static void tx4927_irq_cp0_enable(unsigned int irq);
130static void tx4927_irq_cp0_disable(unsigned int irq); 116static void tx4927_irq_cp0_disable(unsigned int irq);
131static void tx4927_irq_cp0_mask_and_ack(unsigned int irq);
132static void tx4927_irq_cp0_end(unsigned int irq); 117static void tx4927_irq_cp0_end(unsigned int irq);
133 118
134static unsigned int tx4927_irq_pic_startup(unsigned int irq);
135static void tx4927_irq_pic_shutdown(unsigned int irq);
136static void tx4927_irq_pic_enable(unsigned int irq); 119static void tx4927_irq_pic_enable(unsigned int irq);
137static void tx4927_irq_pic_disable(unsigned int irq); 120static void tx4927_irq_pic_disable(unsigned int irq);
138static void tx4927_irq_pic_mask_and_ack(unsigned int irq);
139static void tx4927_irq_pic_end(unsigned int irq); 121static void tx4927_irq_pic_end(unsigned int irq);
140 122
141/* 123/*
142 * Kernel structs for all pic's 124 * Kernel structs for all pic's
143 */ 125 */
144 126
145static DEFINE_SPINLOCK(tx4927_cp0_lock);
146static DEFINE_SPINLOCK(tx4927_pic_lock);
147
148#define TX4927_CP0_NAME "TX4927-CP0" 127#define TX4927_CP0_NAME "TX4927-CP0"
149static struct irq_chip tx4927_irq_cp0_type = { 128static struct irq_chip tx4927_irq_cp0_type = {
150 .typename = TX4927_CP0_NAME, 129 .typename = TX4927_CP0_NAME,
151 .startup = tx4927_irq_cp0_startup, 130 .ack = tx4927_irq_cp0_disable,
152 .shutdown = tx4927_irq_cp0_shutdown, 131 .mask = tx4927_irq_cp0_disable,
153 .enable = tx4927_irq_cp0_enable, 132 .mask_ack = tx4927_irq_cp0_disable,
154 .disable = tx4927_irq_cp0_disable, 133 .unmask = tx4927_irq_cp0_enable,
155 .ack = tx4927_irq_cp0_mask_and_ack,
156 .end = tx4927_irq_cp0_end, 134 .end = tx4927_irq_cp0_end,
157 .set_affinity = NULL
158}; 135};
159 136
160#define TX4927_PIC_NAME "TX4927-PIC" 137#define TX4927_PIC_NAME "TX4927-PIC"
161static struct irq_chip tx4927_irq_pic_type = { 138static struct irq_chip tx4927_irq_pic_type = {
162 .typename = TX4927_PIC_NAME, 139 .typename = TX4927_PIC_NAME,
163 .startup = tx4927_irq_pic_startup, 140 .ack = tx4927_irq_pic_disable,
164 .shutdown = tx4927_irq_pic_shutdown, 141 .mask = tx4927_irq_pic_disable,
165 .enable = tx4927_irq_pic_enable, 142 .mask_ack = tx4927_irq_pic_disable,
166 .disable = tx4927_irq_pic_disable, 143 .unmask = tx4927_irq_pic_enable,
167 .ack = tx4927_irq_pic_mask_and_ack,
168 .end = tx4927_irq_pic_end, 144 .end = tx4927_irq_pic_end,
169 .set_affinity = NULL
170}; 145};
171 146
172#define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL } 147#define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
@@ -211,8 +186,6 @@ tx4927_irq_cp0_modify(unsigned cp0_reg, unsigned clr_bits, unsigned set_bits)
211 break; 186 break;
212 } 187 }
213 } 188 }
214
215 return;
216} 189}
217 190
218static void __init tx4927_irq_cp0_init(void) 191static void __init tx4927_irq_cp0_init(void)
@@ -222,71 +195,22 @@ static void __init tx4927_irq_cp0_init(void)
222 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_INIT, "beg=%d end=%d\n", 195 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_INIT, "beg=%d end=%d\n",
223 TX4927_IRQ_CP0_BEG, TX4927_IRQ_CP0_END); 196 TX4927_IRQ_CP0_BEG, TX4927_IRQ_CP0_END);
224 197
225 for (i = TX4927_IRQ_CP0_BEG; i <= TX4927_IRQ_CP0_END; i++) { 198 for (i = TX4927_IRQ_CP0_BEG; i <= TX4927_IRQ_CP0_END; i++)
226 irq_desc[i].status = IRQ_DISABLED; 199 set_irq_chip(i, &tx4927_irq_cp0_type);
227 irq_desc[i].action = 0;
228 irq_desc[i].depth = 1;
229 irq_desc[i].chip = &tx4927_irq_cp0_type;
230 }
231
232 return;
233}
234
235static unsigned int tx4927_irq_cp0_startup(unsigned int irq)
236{
237 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_STARTUP, "irq=%d \n", irq);
238
239 tx4927_irq_cp0_enable(irq);
240
241 return (0);
242}
243
244static void tx4927_irq_cp0_shutdown(unsigned int irq)
245{
246 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_SHUTDOWN, "irq=%d \n", irq);
247
248 tx4927_irq_cp0_disable(irq);
249
250 return;
251} 200}
252 201
253static void tx4927_irq_cp0_enable(unsigned int irq) 202static void tx4927_irq_cp0_enable(unsigned int irq)
254{ 203{
255 unsigned long flags;
256
257 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENABLE, "irq=%d \n", irq); 204 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENABLE, "irq=%d \n", irq);
258 205
259 spin_lock_irqsave(&tx4927_cp0_lock, flags);
260
261 tx4927_irq_cp0_modify(CCP0_STATUS, 0, tx4927_irq_cp0_mask(irq)); 206 tx4927_irq_cp0_modify(CCP0_STATUS, 0, tx4927_irq_cp0_mask(irq));
262
263 spin_unlock_irqrestore(&tx4927_cp0_lock, flags);
264
265 return;
266} 207}
267 208
268static void tx4927_irq_cp0_disable(unsigned int irq) 209static void tx4927_irq_cp0_disable(unsigned int irq)
269{ 210{
270 unsigned long flags;
271
272 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_DISABLE, "irq=%d \n", irq); 211 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_DISABLE, "irq=%d \n", irq);
273 212
274 spin_lock_irqsave(&tx4927_cp0_lock, flags);
275
276 tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0); 213 tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0);
277
278 spin_unlock_irqrestore(&tx4927_cp0_lock, flags);
279
280 return;
281}
282
283static void tx4927_irq_cp0_mask_and_ack(unsigned int irq)
284{
285 TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_MASK, "irq=%d \n", irq);
286
287 tx4927_irq_cp0_disable(irq);
288
289 return;
290} 214}
291 215
292static void tx4927_irq_cp0_end(unsigned int irq) 216static void tx4927_irq_cp0_end(unsigned int irq)
@@ -296,8 +220,6 @@ static void tx4927_irq_cp0_end(unsigned int irq)
296 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { 220 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
297 tx4927_irq_cp0_enable(irq); 221 tx4927_irq_cp0_enable(irq);
298 } 222 }
299
300 return;
301} 223}
302 224
303/* 225/*
@@ -418,94 +340,38 @@ static void tx4927_irq_pic_modify(unsigned pic_reg, unsigned clr_bits,
418 val &= (~clr_bits); 340 val &= (~clr_bits);
419 val |= (set_bits); 341 val |= (set_bits);
420 TX4927_WR(pic_reg, val); 342 TX4927_WR(pic_reg, val);
421
422 return;
423} 343}
424 344
425static void __init tx4927_irq_pic_init(void) 345static void __init tx4927_irq_pic_init(void)
426{ 346{
427 unsigned long flags;
428 int i; 347 int i;
429 348
430 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_INIT, "beg=%d end=%d\n", 349 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_INIT, "beg=%d end=%d\n",
431 TX4927_IRQ_PIC_BEG, TX4927_IRQ_PIC_END); 350 TX4927_IRQ_PIC_BEG, TX4927_IRQ_PIC_END);
432 351
433 for (i = TX4927_IRQ_PIC_BEG; i <= TX4927_IRQ_PIC_END; i++) { 352 for (i = TX4927_IRQ_PIC_BEG; i <= TX4927_IRQ_PIC_END; i++)
434 irq_desc[i].status = IRQ_DISABLED; 353 set_irq_chip(i, &tx4927_irq_pic_type);
435 irq_desc[i].action = 0;
436 irq_desc[i].depth = 2;
437 irq_desc[i].chip = &tx4927_irq_pic_type;
438 }
439 354
440 setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action); 355 setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action);
441 356
442 spin_lock_irqsave(&tx4927_pic_lock, flags);
443
444 TX4927_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */ 357 TX4927_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */
445 TX4927_WR(0xff1ff600, TX4927_RD(0xff1ff600) | 0x1); /* irq enable */ 358 TX4927_WR(0xff1ff600, TX4927_RD(0xff1ff600) | 0x1); /* irq enable */
446
447 spin_unlock_irqrestore(&tx4927_pic_lock, flags);
448
449 return;
450}
451
452static unsigned int tx4927_irq_pic_startup(unsigned int irq)
453{
454 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_STARTUP, "irq=%d\n", irq);
455
456 tx4927_irq_pic_enable(irq);
457
458 return (0);
459}
460
461static void tx4927_irq_pic_shutdown(unsigned int irq)
462{
463 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_SHUTDOWN, "irq=%d\n", irq);
464
465 tx4927_irq_pic_disable(irq);
466
467 return;
468} 359}
469 360
470static void tx4927_irq_pic_enable(unsigned int irq) 361static void tx4927_irq_pic_enable(unsigned int irq)
471{ 362{
472 unsigned long flags;
473
474 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENABLE, "irq=%d\n", irq); 363 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENABLE, "irq=%d\n", irq);
475 364
476 spin_lock_irqsave(&tx4927_pic_lock, flags);
477
478 tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), 0, 365 tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), 0,
479 tx4927_irq_pic_mask(irq)); 366 tx4927_irq_pic_mask(irq));
480
481 spin_unlock_irqrestore(&tx4927_pic_lock, flags);
482
483 return;
484} 367}
485 368
486static void tx4927_irq_pic_disable(unsigned int irq) 369static void tx4927_irq_pic_disable(unsigned int irq)
487{ 370{
488 unsigned long flags;
489
490 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_DISABLE, "irq=%d\n", irq); 371 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_DISABLE, "irq=%d\n", irq);
491 372
492 spin_lock_irqsave(&tx4927_pic_lock, flags);
493
494 tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), 373 tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq),
495 tx4927_irq_pic_mask(irq), 0); 374 tx4927_irq_pic_mask(irq), 0);
496
497 spin_unlock_irqrestore(&tx4927_pic_lock, flags);
498
499 return;
500}
501
502static void tx4927_irq_pic_mask_and_ack(unsigned int irq)
503{
504 TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_MASK, "irq=%d\n", irq);
505
506 tx4927_irq_pic_disable(irq);
507
508 return;
509} 375}
510 376
511static void tx4927_irq_pic_end(unsigned int irq) 377static void tx4927_irq_pic_end(unsigned int irq)
@@ -515,8 +381,6 @@ static void tx4927_irq_pic_end(unsigned int irq)
515 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { 381 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
516 tx4927_irq_pic_enable(irq); 382 tx4927_irq_pic_enable(irq);
517 } 383 }
518
519 return;
520} 384}
521 385
522/* 386/*
@@ -533,8 +397,6 @@ void __init tx4927_irq_init(void)
533 tx4927_irq_pic_init(); 397 tx4927_irq_pic_init();
534 398
535 TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "+\n"); 399 TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "+\n");
536
537 return;
538} 400}
539 401
540static int tx4927_irq_nested(void) 402static int tx4927_irq_nested(void)
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index 0c3c3f668230..1fdace89ae6d 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -151,16 +151,11 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB
151#define TOSHIBA_RBTX4927_IRQ_EROR ( 1 << 2 ) 151#define TOSHIBA_RBTX4927_IRQ_EROR ( 1 << 2 )
152 152
153#define TOSHIBA_RBTX4927_IRQ_IOC_INIT ( 1 << 10 ) 153#define TOSHIBA_RBTX4927_IRQ_IOC_INIT ( 1 << 10 )
154#define TOSHIBA_RBTX4927_IRQ_IOC_STARTUP ( 1 << 11 )
155#define TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN ( 1 << 12 )
156#define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE ( 1 << 13 ) 154#define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE ( 1 << 13 )
157#define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE ( 1 << 14 ) 155#define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE ( 1 << 14 )
158#define TOSHIBA_RBTX4927_IRQ_IOC_MASK ( 1 << 15 )
159#define TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ ( 1 << 16 ) 156#define TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ ( 1 << 16 )
160 157
161#define TOSHIBA_RBTX4927_IRQ_ISA_INIT ( 1 << 20 ) 158#define TOSHIBA_RBTX4927_IRQ_ISA_INIT ( 1 << 20 )
162#define TOSHIBA_RBTX4927_IRQ_ISA_STARTUP ( 1 << 21 )
163#define TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN ( 1 << 22 )
164#define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE ( 1 << 23 ) 159#define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE ( 1 << 23 )
165#define TOSHIBA_RBTX4927_IRQ_ISA_DISABLE ( 1 << 24 ) 160#define TOSHIBA_RBTX4927_IRQ_ISA_DISABLE ( 1 << 24 )
166#define TOSHIBA_RBTX4927_IRQ_ISA_MASK ( 1 << 25 ) 161#define TOSHIBA_RBTX4927_IRQ_ISA_MASK ( 1 << 25 )
@@ -175,15 +170,10 @@ static const u32 toshiba_rbtx4927_irq_debug_flag =
175 (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO | 170 (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO |
176 TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR 171 TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR
177// | TOSHIBA_RBTX4927_IRQ_IOC_INIT 172// | TOSHIBA_RBTX4927_IRQ_IOC_INIT
178// | TOSHIBA_RBTX4927_IRQ_IOC_STARTUP
179// | TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN
180// | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE 173// | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE
181// | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE 174// | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE
182// | TOSHIBA_RBTX4927_IRQ_IOC_MASK
183// | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ 175// | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ
184// | TOSHIBA_RBTX4927_IRQ_ISA_INIT 176// | TOSHIBA_RBTX4927_IRQ_ISA_INIT
185// | TOSHIBA_RBTX4927_IRQ_ISA_STARTUP
186// | TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN
187// | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE 177// | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE
188// | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE 178// | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE
189// | TOSHIBA_RBTX4927_IRQ_ISA_MASK 179// | TOSHIBA_RBTX4927_IRQ_ISA_MASK
@@ -231,35 +221,25 @@ extern void disable_8259A_irq(unsigned int irq);
231extern void mask_and_ack_8259A(unsigned int irq); 221extern void mask_and_ack_8259A(unsigned int irq);
232#endif 222#endif
233 223
234static unsigned int toshiba_rbtx4927_irq_ioc_startup(unsigned int irq);
235static void toshiba_rbtx4927_irq_ioc_shutdown(unsigned int irq);
236static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq); 224static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
237static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq); 225static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
238static void toshiba_rbtx4927_irq_ioc_mask_and_ack(unsigned int irq);
239static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq); 226static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq);
240 227
241#ifdef CONFIG_TOSHIBA_FPCIB0 228#ifdef CONFIG_TOSHIBA_FPCIB0
242static unsigned int toshiba_rbtx4927_irq_isa_startup(unsigned int irq);
243static void toshiba_rbtx4927_irq_isa_shutdown(unsigned int irq);
244static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq); 229static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq);
245static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq); 230static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq);
246static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq); 231static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq);
247static void toshiba_rbtx4927_irq_isa_end(unsigned int irq); 232static void toshiba_rbtx4927_irq_isa_end(unsigned int irq);
248#endif 233#endif
249 234
250static DEFINE_SPINLOCK(toshiba_rbtx4927_ioc_lock);
251
252
253#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC" 235#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
254static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { 236static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
255 .typename = TOSHIBA_RBTX4927_IOC_NAME, 237 .typename = TOSHIBA_RBTX4927_IOC_NAME,
256 .startup = toshiba_rbtx4927_irq_ioc_startup, 238 .ack = toshiba_rbtx4927_irq_ioc_disable,
257 .shutdown = toshiba_rbtx4927_irq_ioc_shutdown, 239 .mask = toshiba_rbtx4927_irq_ioc_disable,
258 .enable = toshiba_rbtx4927_irq_ioc_enable, 240 .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
259 .disable = toshiba_rbtx4927_irq_ioc_disable, 241 .unmask = toshiba_rbtx4927_irq_ioc_enable,
260 .ack = toshiba_rbtx4927_irq_ioc_mask_and_ack,
261 .end = toshiba_rbtx4927_irq_ioc_end, 242 .end = toshiba_rbtx4927_irq_ioc_end,
262 .set_affinity = NULL
263}; 243};
264#define TOSHIBA_RBTX4927_IOC_INTR_ENAB 0xbc002000 244#define TOSHIBA_RBTX4927_IOC_INTR_ENAB 0xbc002000
265#define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006 245#define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006
@@ -269,13 +249,11 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
269#define TOSHIBA_RBTX4927_ISA_NAME "RBTX4927-ISA" 249#define TOSHIBA_RBTX4927_ISA_NAME "RBTX4927-ISA"
270static struct irq_chip toshiba_rbtx4927_irq_isa_type = { 250static struct irq_chip toshiba_rbtx4927_irq_isa_type = {
271 .typename = TOSHIBA_RBTX4927_ISA_NAME, 251 .typename = TOSHIBA_RBTX4927_ISA_NAME,
272 .startup = toshiba_rbtx4927_irq_isa_startup,
273 .shutdown = toshiba_rbtx4927_irq_isa_shutdown,
274 .enable = toshiba_rbtx4927_irq_isa_enable,
275 .disable = toshiba_rbtx4927_irq_isa_disable,
276 .ack = toshiba_rbtx4927_irq_isa_mask_and_ack, 252 .ack = toshiba_rbtx4927_irq_isa_mask_and_ack,
253 .mask = toshiba_rbtx4927_irq_isa_disable,
254 .mask_ack = toshiba_rbtx4927_irq_isa_mask_and_ack,
255 .unmask = toshiba_rbtx4927_irq_isa_enable,
277 .end = toshiba_rbtx4927_irq_isa_end, 256 .end = toshiba_rbtx4927_irq_isa_end,
278 .set_affinity = NULL
279}; 257};
280#endif 258#endif
281 259
@@ -363,58 +341,15 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void)
363 TOSHIBA_RBTX4927_IRQ_IOC_END); 341 TOSHIBA_RBTX4927_IRQ_IOC_END);
364 342
365 for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG; 343 for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG;
366 i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++) { 344 i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++)
367 irq_desc[i].status = IRQ_DISABLED; 345 set_irq_chip(i, &toshiba_rbtx4927_irq_ioc_type);
368 irq_desc[i].action = 0;
369 irq_desc[i].depth = 3;
370 irq_desc[i].chip = &toshiba_rbtx4927_irq_ioc_type;
371 }
372 346
373 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC, 347 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
374 &toshiba_rbtx4927_irq_ioc_action); 348 &toshiba_rbtx4927_irq_ioc_action);
375
376 return;
377} 349}
378 350
379static unsigned int toshiba_rbtx4927_irq_ioc_startup(unsigned int irq)
380{
381 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_STARTUP,
382 "irq=%d\n", irq);
383
384 if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
385 || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
386 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
387 "bad irq=%d\n", irq);
388 panic("\n");
389 }
390
391 toshiba_rbtx4927_irq_ioc_enable(irq);
392
393 return (0);
394}
395
396
397static void toshiba_rbtx4927_irq_ioc_shutdown(unsigned int irq)
398{
399 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN,
400 "irq=%d\n", irq);
401
402 if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
403 || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
404 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
405 "bad irq=%d\n", irq);
406 panic("\n");
407 }
408
409 toshiba_rbtx4927_irq_ioc_disable(irq);
410
411 return;
412}
413
414
415static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) 351static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
416{ 352{
417 unsigned long flags;
418 volatile unsigned char v; 353 volatile unsigned char v;
419 354
420 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENABLE, 355 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENABLE,
@@ -427,21 +362,14 @@ static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
427 panic("\n"); 362 panic("\n");
428 } 363 }
429 364
430 spin_lock_irqsave(&toshiba_rbtx4927_ioc_lock, flags);
431
432 v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB); 365 v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
433 v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); 366 v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
434 TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v); 367 TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v);
435
436 spin_unlock_irqrestore(&toshiba_rbtx4927_ioc_lock, flags);
437
438 return;
439} 368}
440 369
441 370
442static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) 371static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
443{ 372{
444 unsigned long flags;
445 volatile unsigned char v; 373 volatile unsigned char v;
446 374
447 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_DISABLE, 375 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_DISABLE,
@@ -454,36 +382,11 @@ static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
454 panic("\n"); 382 panic("\n");
455 } 383 }
456 384
457 spin_lock_irqsave(&toshiba_rbtx4927_ioc_lock, flags);
458
459 v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB); 385 v = TX4927_RD08(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
460 v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG)); 386 v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
461 TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v); 387 TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v);
462
463 spin_unlock_irqrestore(&toshiba_rbtx4927_ioc_lock, flags);
464
465 return;
466} 388}
467 389
468
469static void toshiba_rbtx4927_irq_ioc_mask_and_ack(unsigned int irq)
470{
471 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_MASK,
472 "irq=%d\n", irq);
473
474 if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
475 || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
476 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
477 "bad irq=%d\n", irq);
478 panic("\n");
479 }
480
481 toshiba_rbtx4927_irq_ioc_disable(irq);
482
483 return;
484}
485
486
487static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq) 390static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq)
488{ 391{
489 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ, 392 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ,
@@ -499,8 +402,6 @@ static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq)
499 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { 402 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
500 toshiba_rbtx4927_irq_ioc_enable(irq); 403 toshiba_rbtx4927_irq_ioc_enable(irq);
501 } 404 }
502
503 return;
504} 405}
505 406
506 407
@@ -520,13 +421,8 @@ static void __init toshiba_rbtx4927_irq_isa_init(void)
520 TOSHIBA_RBTX4927_IRQ_ISA_END); 421 TOSHIBA_RBTX4927_IRQ_ISA_END);
521 422
522 for (i = TOSHIBA_RBTX4927_IRQ_ISA_BEG; 423 for (i = TOSHIBA_RBTX4927_IRQ_ISA_BEG;
523 i <= TOSHIBA_RBTX4927_IRQ_ISA_END; i++) { 424 i <= TOSHIBA_RBTX4927_IRQ_ISA_END; i++)
524 irq_desc[i].status = IRQ_DISABLED; 425 set_irq_chip(i, &toshiba_rbtx4927_irq_isa_type);
525 irq_desc[i].action = 0;
526 irq_desc[i].depth =
527 ((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5));
528 irq_desc[i].chip = &toshiba_rbtx4927_irq_isa_type;
529 }
530 426
531 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC, 427 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC,
532 &toshiba_rbtx4927_irq_isa_master); 428 &toshiba_rbtx4927_irq_isa_master);
@@ -536,48 +432,6 @@ static void __init toshiba_rbtx4927_irq_isa_init(void)
536 /* make sure we are looking at IRR (not ISR) */ 432 /* make sure we are looking at IRR (not ISR) */
537 outb(0x0A, 0x20); 433 outb(0x0A, 0x20);
538 outb(0x0A, 0xA0); 434 outb(0x0A, 0xA0);
539
540 return;
541}
542#endif
543
544
545#ifdef CONFIG_TOSHIBA_FPCIB0
546static unsigned int toshiba_rbtx4927_irq_isa_startup(unsigned int irq)
547{
548 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_STARTUP,
549 "irq=%d\n", irq);
550
551 if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
552 || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
553 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
554 "bad irq=%d\n", irq);
555 panic("\n");
556 }
557
558 toshiba_rbtx4927_irq_isa_enable(irq);
559
560 return (0);
561}
562#endif
563
564
565#ifdef CONFIG_TOSHIBA_FPCIB0
566static void toshiba_rbtx4927_irq_isa_shutdown(unsigned int irq)
567{
568 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN,
569 "irq=%d\n", irq);
570
571 if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG
572 || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) {
573 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
574 "bad irq=%d\n", irq);
575 panic("\n");
576 }
577
578 toshiba_rbtx4927_irq_isa_disable(irq);
579
580 return;
581} 435}
582#endif 436#endif
583 437
@@ -596,8 +450,6 @@ static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq)
596 } 450 }
597 451
598 enable_8259A_irq(irq); 452 enable_8259A_irq(irq);
599
600 return;
601} 453}
602#endif 454#endif
603 455
@@ -616,8 +468,6 @@ static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq)
616 } 468 }
617 469
618 disable_8259A_irq(irq); 470 disable_8259A_irq(irq);
619
620 return;
621} 471}
622#endif 472#endif
623 473
@@ -636,8 +486,6 @@ static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq)
636 } 486 }
637 487
638 mask_and_ack_8259A(irq); 488 mask_and_ack_8259A(irq);
639
640 return;
641} 489}
642#endif 490#endif
643 491
@@ -658,8 +506,6 @@ static void toshiba_rbtx4927_irq_isa_end(unsigned int irq)
658 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { 506 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
659 toshiba_rbtx4927_irq_isa_enable(irq); 507 toshiba_rbtx4927_irq_isa_enable(irq);
660 } 508 }
661
662 return;
663} 509}
664#endif 510#endif
665 511
@@ -668,8 +514,6 @@ void __init arch_init_irq(void)
668{ 514{
669 extern void tx4927_irq_init(void); 515 extern void tx4927_irq_init(void);
670 516
671 local_irq_disable();
672
673 tx4927_irq_init(); 517 tx4927_irq_init();
674 toshiba_rbtx4927_irq_ioc_init(); 518 toshiba_rbtx4927_irq_ioc_init();
675#ifdef CONFIG_TOSHIBA_FPCIB0 519#ifdef CONFIG_TOSHIBA_FPCIB0
@@ -681,8 +525,6 @@ void __init arch_init_irq(void)
681#endif 525#endif
682 526
683 wbflush(); 527 wbflush();
684
685 return;
686} 528}
687 529
688void toshiba_rbtx4927_irq_dump(char *key) 530void toshiba_rbtx4927_irq_dump(char *key)
@@ -715,7 +557,6 @@ void toshiba_rbtx4927_irq_dump(char *key)
715 } 557 }
716 } 558 }
717#endif 559#endif
718 return;
719} 560}
720 561
721void toshiba_rbtx4927_irq_dump_pics(char *s) 562void toshiba_rbtx4927_irq_dump_pics(char *s)
@@ -780,6 +621,4 @@ void toshiba_rbtx4927_irq_dump_pics(char *s)
780 level5_s); 621 level5_s);
781 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, "[%s]\n", 622 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, "[%s]\n",
782 s); 623 s);
783
784 return;
785} 624}