diff options
Diffstat (limited to 'arch/mips/tx4927/common/tx4927_irq.c')
-rw-r--r-- | arch/mips/tx4927/common/tx4927_irq.c | 162 |
1 files changed, 12 insertions, 150 deletions
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c index 8266a88a3f88..2c57ced5c68c 100644 --- a/arch/mips/tx4927/common/tx4927_irq.c +++ b/arch/mips/tx4927/common/tx4927_irq.c | |||
@@ -64,19 +64,13 @@ | |||
64 | #define TX4927_IRQ_NEST4 ( 1 << 9 ) | 64 | #define TX4927_IRQ_NEST4 ( 1 << 9 ) |
65 | 65 | ||
66 | #define TX4927_IRQ_CP0_INIT ( 1 << 10 ) | 66 | #define TX4927_IRQ_CP0_INIT ( 1 << 10 ) |
67 | #define TX4927_IRQ_CP0_STARTUP ( 1 << 11 ) | ||
68 | #define TX4927_IRQ_CP0_SHUTDOWN ( 1 << 12 ) | ||
69 | #define TX4927_IRQ_CP0_ENABLE ( 1 << 13 ) | 67 | #define TX4927_IRQ_CP0_ENABLE ( 1 << 13 ) |
70 | #define TX4927_IRQ_CP0_DISABLE ( 1 << 14 ) | 68 | #define TX4927_IRQ_CP0_DISABLE ( 1 << 14 ) |
71 | #define TX4927_IRQ_CP0_MASK ( 1 << 15 ) | ||
72 | #define TX4927_IRQ_CP0_ENDIRQ ( 1 << 16 ) | 69 | #define TX4927_IRQ_CP0_ENDIRQ ( 1 << 16 ) |
73 | 70 | ||
74 | #define TX4927_IRQ_PIC_INIT ( 1 << 20 ) | 71 | #define TX4927_IRQ_PIC_INIT ( 1 << 20 ) |
75 | #define TX4927_IRQ_PIC_STARTUP ( 1 << 21 ) | ||
76 | #define TX4927_IRQ_PIC_SHUTDOWN ( 1 << 22 ) | ||
77 | #define TX4927_IRQ_PIC_ENABLE ( 1 << 23 ) | 72 | #define TX4927_IRQ_PIC_ENABLE ( 1 << 23 ) |
78 | #define TX4927_IRQ_PIC_DISABLE ( 1 << 24 ) | 73 | #define TX4927_IRQ_PIC_DISABLE ( 1 << 24 ) |
79 | #define TX4927_IRQ_PIC_MASK ( 1 << 25 ) | ||
80 | #define TX4927_IRQ_PIC_ENDIRQ ( 1 << 26 ) | 74 | #define TX4927_IRQ_PIC_ENDIRQ ( 1 << 26 ) |
81 | 75 | ||
82 | #define TX4927_IRQ_ALL 0xffffffff | 76 | #define TX4927_IRQ_ALL 0xffffffff |
@@ -87,18 +81,12 @@ static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE | |||
87 | | TX4927_IRQ_INFO | 81 | | TX4927_IRQ_INFO |
88 | | TX4927_IRQ_WARN | TX4927_IRQ_EROR | 82 | | TX4927_IRQ_WARN | TX4927_IRQ_EROR |
89 | // | TX4927_IRQ_CP0_INIT | 83 | // | TX4927_IRQ_CP0_INIT |
90 | // | TX4927_IRQ_CP0_STARTUP | ||
91 | // | TX4927_IRQ_CP0_SHUTDOWN | ||
92 | // | TX4927_IRQ_CP0_ENABLE | 84 | // | TX4927_IRQ_CP0_ENABLE |
93 | // | TX4927_IRQ_CP0_DISABLE | 85 | // | TX4927_IRQ_CP0_DISABLE |
94 | // | TX4927_IRQ_CP0_MASK | ||
95 | // | TX4927_IRQ_CP0_ENDIRQ | 86 | // | TX4927_IRQ_CP0_ENDIRQ |
96 | // | TX4927_IRQ_PIC_INIT | 87 | // | TX4927_IRQ_PIC_INIT |
97 | // | TX4927_IRQ_PIC_STARTUP | ||
98 | // | TX4927_IRQ_PIC_SHUTDOWN | ||
99 | // | TX4927_IRQ_PIC_ENABLE | 88 | // | TX4927_IRQ_PIC_ENABLE |
100 | // | TX4927_IRQ_PIC_DISABLE | 89 | // | TX4927_IRQ_PIC_DISABLE |
101 | // | TX4927_IRQ_PIC_MASK | ||
102 | // | TX4927_IRQ_PIC_ENDIRQ | 90 | // | TX4927_IRQ_PIC_ENDIRQ |
103 | // | TX4927_IRQ_INIT | 91 | // | TX4927_IRQ_INIT |
104 | // | TX4927_IRQ_NEST1 | 92 | // | TX4927_IRQ_NEST1 |
@@ -124,49 +112,36 @@ static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE | |||
124 | * Forwad definitions for all pic's | 112 | * Forwad definitions for all pic's |
125 | */ | 113 | */ |
126 | 114 | ||
127 | static unsigned int tx4927_irq_cp0_startup(unsigned int irq); | ||
128 | static void tx4927_irq_cp0_shutdown(unsigned int irq); | ||
129 | static void tx4927_irq_cp0_enable(unsigned int irq); | 115 | static void tx4927_irq_cp0_enable(unsigned int irq); |
130 | static void tx4927_irq_cp0_disable(unsigned int irq); | 116 | static void tx4927_irq_cp0_disable(unsigned int irq); |
131 | static void tx4927_irq_cp0_mask_and_ack(unsigned int irq); | ||
132 | static void tx4927_irq_cp0_end(unsigned int irq); | 117 | static void tx4927_irq_cp0_end(unsigned int irq); |
133 | 118 | ||
134 | static unsigned int tx4927_irq_pic_startup(unsigned int irq); | ||
135 | static void tx4927_irq_pic_shutdown(unsigned int irq); | ||
136 | static void tx4927_irq_pic_enable(unsigned int irq); | 119 | static void tx4927_irq_pic_enable(unsigned int irq); |
137 | static void tx4927_irq_pic_disable(unsigned int irq); | 120 | static void tx4927_irq_pic_disable(unsigned int irq); |
138 | static void tx4927_irq_pic_mask_and_ack(unsigned int irq); | ||
139 | static void tx4927_irq_pic_end(unsigned int irq); | 121 | static void tx4927_irq_pic_end(unsigned int irq); |
140 | 122 | ||
141 | /* | 123 | /* |
142 | * Kernel structs for all pic's | 124 | * Kernel structs for all pic's |
143 | */ | 125 | */ |
144 | 126 | ||
145 | static DEFINE_SPINLOCK(tx4927_cp0_lock); | ||
146 | static DEFINE_SPINLOCK(tx4927_pic_lock); | ||
147 | |||
148 | #define TX4927_CP0_NAME "TX4927-CP0" | 127 | #define TX4927_CP0_NAME "TX4927-CP0" |
149 | static struct irq_chip tx4927_irq_cp0_type = { | 128 | static struct irq_chip tx4927_irq_cp0_type = { |
150 | .typename = TX4927_CP0_NAME, | 129 | .typename = TX4927_CP0_NAME, |
151 | .startup = tx4927_irq_cp0_startup, | 130 | .ack = tx4927_irq_cp0_disable, |
152 | .shutdown = tx4927_irq_cp0_shutdown, | 131 | .mask = tx4927_irq_cp0_disable, |
153 | .enable = tx4927_irq_cp0_enable, | 132 | .mask_ack = tx4927_irq_cp0_disable, |
154 | .disable = tx4927_irq_cp0_disable, | 133 | .unmask = tx4927_irq_cp0_enable, |
155 | .ack = tx4927_irq_cp0_mask_and_ack, | ||
156 | .end = tx4927_irq_cp0_end, | 134 | .end = tx4927_irq_cp0_end, |
157 | .set_affinity = NULL | ||
158 | }; | 135 | }; |
159 | 136 | ||
160 | #define TX4927_PIC_NAME "TX4927-PIC" | 137 | #define TX4927_PIC_NAME "TX4927-PIC" |
161 | static struct irq_chip tx4927_irq_pic_type = { | 138 | static struct irq_chip tx4927_irq_pic_type = { |
162 | .typename = TX4927_PIC_NAME, | 139 | .typename = TX4927_PIC_NAME, |
163 | .startup = tx4927_irq_pic_startup, | 140 | .ack = tx4927_irq_pic_disable, |
164 | .shutdown = tx4927_irq_pic_shutdown, | 141 | .mask = tx4927_irq_pic_disable, |
165 | .enable = tx4927_irq_pic_enable, | 142 | .mask_ack = tx4927_irq_pic_disable, |
166 | .disable = tx4927_irq_pic_disable, | 143 | .unmask = tx4927_irq_pic_enable, |
167 | .ack = tx4927_irq_pic_mask_and_ack, | ||
168 | .end = tx4927_irq_pic_end, | 144 | .end = tx4927_irq_pic_end, |
169 | .set_affinity = NULL | ||
170 | }; | 145 | }; |
171 | 146 | ||
172 | #define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL } | 147 | #define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL } |
@@ -211,8 +186,6 @@ tx4927_irq_cp0_modify(unsigned cp0_reg, unsigned clr_bits, unsigned set_bits) | |||
211 | break; | 186 | break; |
212 | } | 187 | } |
213 | } | 188 | } |
214 | |||
215 | return; | ||
216 | } | 189 | } |
217 | 190 | ||
218 | static void __init tx4927_irq_cp0_init(void) | 191 | static void __init tx4927_irq_cp0_init(void) |
@@ -222,71 +195,22 @@ static void __init tx4927_irq_cp0_init(void) | |||
222 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_INIT, "beg=%d end=%d\n", | 195 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_INIT, "beg=%d end=%d\n", |
223 | TX4927_IRQ_CP0_BEG, TX4927_IRQ_CP0_END); | 196 | TX4927_IRQ_CP0_BEG, TX4927_IRQ_CP0_END); |
224 | 197 | ||
225 | for (i = TX4927_IRQ_CP0_BEG; i <= TX4927_IRQ_CP0_END; i++) { | 198 | for (i = TX4927_IRQ_CP0_BEG; i <= TX4927_IRQ_CP0_END; i++) |
226 | irq_desc[i].status = IRQ_DISABLED; | 199 | set_irq_chip(i, &tx4927_irq_cp0_type); |
227 | irq_desc[i].action = 0; | ||
228 | irq_desc[i].depth = 1; | ||
229 | irq_desc[i].chip = &tx4927_irq_cp0_type; | ||
230 | } | ||
231 | |||
232 | return; | ||
233 | } | ||
234 | |||
235 | static unsigned int tx4927_irq_cp0_startup(unsigned int irq) | ||
236 | { | ||
237 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_STARTUP, "irq=%d \n", irq); | ||
238 | |||
239 | tx4927_irq_cp0_enable(irq); | ||
240 | |||
241 | return (0); | ||
242 | } | ||
243 | |||
244 | static void tx4927_irq_cp0_shutdown(unsigned int irq) | ||
245 | { | ||
246 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_SHUTDOWN, "irq=%d \n", irq); | ||
247 | |||
248 | tx4927_irq_cp0_disable(irq); | ||
249 | |||
250 | return; | ||
251 | } | 200 | } |
252 | 201 | ||
253 | static void tx4927_irq_cp0_enable(unsigned int irq) | 202 | static void tx4927_irq_cp0_enable(unsigned int irq) |
254 | { | 203 | { |
255 | unsigned long flags; | ||
256 | |||
257 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENABLE, "irq=%d \n", irq); | 204 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENABLE, "irq=%d \n", irq); |
258 | 205 | ||
259 | spin_lock_irqsave(&tx4927_cp0_lock, flags); | ||
260 | |||
261 | tx4927_irq_cp0_modify(CCP0_STATUS, 0, tx4927_irq_cp0_mask(irq)); | 206 | tx4927_irq_cp0_modify(CCP0_STATUS, 0, tx4927_irq_cp0_mask(irq)); |
262 | |||
263 | spin_unlock_irqrestore(&tx4927_cp0_lock, flags); | ||
264 | |||
265 | return; | ||
266 | } | 207 | } |
267 | 208 | ||
268 | static void tx4927_irq_cp0_disable(unsigned int irq) | 209 | static void tx4927_irq_cp0_disable(unsigned int irq) |
269 | { | 210 | { |
270 | unsigned long flags; | ||
271 | |||
272 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_DISABLE, "irq=%d \n", irq); | 211 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_DISABLE, "irq=%d \n", irq); |
273 | 212 | ||
274 | spin_lock_irqsave(&tx4927_cp0_lock, flags); | ||
275 | |||
276 | tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0); | 213 | tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0); |
277 | |||
278 | spin_unlock_irqrestore(&tx4927_cp0_lock, flags); | ||
279 | |||
280 | return; | ||
281 | } | ||
282 | |||
283 | static void tx4927_irq_cp0_mask_and_ack(unsigned int irq) | ||
284 | { | ||
285 | TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_MASK, "irq=%d \n", irq); | ||
286 | |||
287 | tx4927_irq_cp0_disable(irq); | ||
288 | |||
289 | return; | ||
290 | } | 214 | } |
291 | 215 | ||
292 | static void tx4927_irq_cp0_end(unsigned int irq) | 216 | static void tx4927_irq_cp0_end(unsigned int irq) |
@@ -296,8 +220,6 @@ static void tx4927_irq_cp0_end(unsigned int irq) | |||
296 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { | 220 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { |
297 | tx4927_irq_cp0_enable(irq); | 221 | tx4927_irq_cp0_enable(irq); |
298 | } | 222 | } |
299 | |||
300 | return; | ||
301 | } | 223 | } |
302 | 224 | ||
303 | /* | 225 | /* |
@@ -418,94 +340,38 @@ static void tx4927_irq_pic_modify(unsigned pic_reg, unsigned clr_bits, | |||
418 | val &= (~clr_bits); | 340 | val &= (~clr_bits); |
419 | val |= (set_bits); | 341 | val |= (set_bits); |
420 | TX4927_WR(pic_reg, val); | 342 | TX4927_WR(pic_reg, val); |
421 | |||
422 | return; | ||
423 | } | 343 | } |
424 | 344 | ||
425 | static void __init tx4927_irq_pic_init(void) | 345 | static void __init tx4927_irq_pic_init(void) |
426 | { | 346 | { |
427 | unsigned long flags; | ||
428 | int i; | 347 | int i; |
429 | 348 | ||
430 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_INIT, "beg=%d end=%d\n", | 349 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_INIT, "beg=%d end=%d\n", |
431 | TX4927_IRQ_PIC_BEG, TX4927_IRQ_PIC_END); | 350 | TX4927_IRQ_PIC_BEG, TX4927_IRQ_PIC_END); |
432 | 351 | ||
433 | for (i = TX4927_IRQ_PIC_BEG; i <= TX4927_IRQ_PIC_END; i++) { | 352 | for (i = TX4927_IRQ_PIC_BEG; i <= TX4927_IRQ_PIC_END; i++) |
434 | irq_desc[i].status = IRQ_DISABLED; | 353 | set_irq_chip(i, &tx4927_irq_pic_type); |
435 | irq_desc[i].action = 0; | ||
436 | irq_desc[i].depth = 2; | ||
437 | irq_desc[i].chip = &tx4927_irq_pic_type; | ||
438 | } | ||
439 | 354 | ||
440 | setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action); | 355 | setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action); |
441 | 356 | ||
442 | spin_lock_irqsave(&tx4927_pic_lock, flags); | ||
443 | |||
444 | TX4927_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */ | 357 | TX4927_WR(0xff1ff640, 0x6); /* irq level mask -- only accept hightest */ |
445 | TX4927_WR(0xff1ff600, TX4927_RD(0xff1ff600) | 0x1); /* irq enable */ | 358 | TX4927_WR(0xff1ff600, TX4927_RD(0xff1ff600) | 0x1); /* irq enable */ |
446 | |||
447 | spin_unlock_irqrestore(&tx4927_pic_lock, flags); | ||
448 | |||
449 | return; | ||
450 | } | ||
451 | |||
452 | static unsigned int tx4927_irq_pic_startup(unsigned int irq) | ||
453 | { | ||
454 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_STARTUP, "irq=%d\n", irq); | ||
455 | |||
456 | tx4927_irq_pic_enable(irq); | ||
457 | |||
458 | return (0); | ||
459 | } | ||
460 | |||
461 | static void tx4927_irq_pic_shutdown(unsigned int irq) | ||
462 | { | ||
463 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_SHUTDOWN, "irq=%d\n", irq); | ||
464 | |||
465 | tx4927_irq_pic_disable(irq); | ||
466 | |||
467 | return; | ||
468 | } | 359 | } |
469 | 360 | ||
470 | static void tx4927_irq_pic_enable(unsigned int irq) | 361 | static void tx4927_irq_pic_enable(unsigned int irq) |
471 | { | 362 | { |
472 | unsigned long flags; | ||
473 | |||
474 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENABLE, "irq=%d\n", irq); | 363 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENABLE, "irq=%d\n", irq); |
475 | 364 | ||
476 | spin_lock_irqsave(&tx4927_pic_lock, flags); | ||
477 | |||
478 | tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), 0, | 365 | tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), 0, |
479 | tx4927_irq_pic_mask(irq)); | 366 | tx4927_irq_pic_mask(irq)); |
480 | |||
481 | spin_unlock_irqrestore(&tx4927_pic_lock, flags); | ||
482 | |||
483 | return; | ||
484 | } | 367 | } |
485 | 368 | ||
486 | static void tx4927_irq_pic_disable(unsigned int irq) | 369 | static void tx4927_irq_pic_disable(unsigned int irq) |
487 | { | 370 | { |
488 | unsigned long flags; | ||
489 | |||
490 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_DISABLE, "irq=%d\n", irq); | 371 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_DISABLE, "irq=%d\n", irq); |
491 | 372 | ||
492 | spin_lock_irqsave(&tx4927_pic_lock, flags); | ||
493 | |||
494 | tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), | 373 | tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), |
495 | tx4927_irq_pic_mask(irq), 0); | 374 | tx4927_irq_pic_mask(irq), 0); |
496 | |||
497 | spin_unlock_irqrestore(&tx4927_pic_lock, flags); | ||
498 | |||
499 | return; | ||
500 | } | ||
501 | |||
502 | static void tx4927_irq_pic_mask_and_ack(unsigned int irq) | ||
503 | { | ||
504 | TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_MASK, "irq=%d\n", irq); | ||
505 | |||
506 | tx4927_irq_pic_disable(irq); | ||
507 | |||
508 | return; | ||
509 | } | 375 | } |
510 | 376 | ||
511 | static void tx4927_irq_pic_end(unsigned int irq) | 377 | static void tx4927_irq_pic_end(unsigned int irq) |
@@ -515,8 +381,6 @@ static void tx4927_irq_pic_end(unsigned int irq) | |||
515 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { | 381 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { |
516 | tx4927_irq_pic_enable(irq); | 382 | tx4927_irq_pic_enable(irq); |
517 | } | 383 | } |
518 | |||
519 | return; | ||
520 | } | 384 | } |
521 | 385 | ||
522 | /* | 386 | /* |
@@ -533,8 +397,6 @@ void __init tx4927_irq_init(void) | |||
533 | tx4927_irq_pic_init(); | 397 | tx4927_irq_pic_init(); |
534 | 398 | ||
535 | TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "+\n"); | 399 | TX4927_IRQ_DPRINTK(TX4927_IRQ_INIT, "+\n"); |
536 | |||
537 | return; | ||
538 | } | 400 | } |
539 | 401 | ||
540 | static int tx4927_irq_nested(void) | 402 | static int tx4927_irq_nested(void) |