diff options
Diffstat (limited to 'arch/mips/sni')
-rw-r--r-- | arch/mips/sni/a20r.c | 6 | ||||
-rw-r--r-- | arch/mips/sni/pcimt.c | 4 | ||||
-rw-r--r-- | arch/mips/sni/pcit.c | 26 | ||||
-rw-r--r-- | arch/mips/sni/rm200.c | 10 | ||||
-rw-r--r-- | arch/mips/sni/setup.c | 6 | ||||
-rw-r--r-- | arch/mips/sni/sniprom.c | 6 | ||||
-rw-r--r-- | arch/mips/sni/time.c | 16 |
7 files changed, 37 insertions, 37 deletions
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c index acc9ba76c1a9..b74607599971 100644 --- a/arch/mips/sni/a20r.c +++ b/arch/mips/sni/a20r.c | |||
@@ -127,7 +127,7 @@ static u32 a20r_ack_hwint(void) | |||
127 | { | 127 | { |
128 | u32 status = read_c0_status(); | 128 | u32 status = read_c0_status(); |
129 | 129 | ||
130 | write_c0_status (status | 0x00010000); | 130 | write_c0_status(status | 0x00010000); |
131 | asm volatile( | 131 | asm volatile( |
132 | " .set push \n" | 132 | " .set push \n" |
133 | " .set noat \n" | 133 | " .set noat \n" |
@@ -195,7 +195,7 @@ static void a20r_hwint(void) | |||
195 | u32 cause, status; | 195 | u32 cause, status; |
196 | int irq; | 196 | int irq; |
197 | 197 | ||
198 | clear_c0_status (IE_IRQ0); | 198 | clear_c0_status(IE_IRQ0); |
199 | status = a20r_ack_hwint(); | 199 | status = a20r_ack_hwint(); |
200 | cause = read_c0_cause(); | 200 | cause = read_c0_cause(); |
201 | 201 | ||
@@ -213,7 +213,7 @@ void __init sni_a20r_irq_init(void) | |||
213 | set_irq_chip(i, &a20r_irq_type); | 213 | set_irq_chip(i, &a20r_irq_type); |
214 | sni_hwint = a20r_hwint; | 214 | sni_hwint = a20r_hwint; |
215 | change_c0_status(ST0_IM, IE_IRQ0); | 215 | change_c0_status(ST0_IM, IE_IRQ0); |
216 | setup_irq (SNI_A20R_IRQ_BASE + 3, &sni_isa_irq); | 216 | setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq); |
217 | } | 217 | } |
218 | 218 | ||
219 | void sni_a20r_init(void) | 219 | void sni_a20r_init(void) |
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c index 25cf646329ae..39bb15f1f2a6 100644 --- a/arch/mips/sni/pcimt.c +++ b/arch/mips/sni/pcimt.c | |||
@@ -284,9 +284,9 @@ static void sni_pcimt_hwint(void) | |||
284 | u32 pending = read_c0_cause() & read_c0_status(); | 284 | u32 pending = read_c0_cause() & read_c0_status(); |
285 | 285 | ||
286 | if (pending & C_IRQ5) | 286 | if (pending & C_IRQ5) |
287 | do_IRQ (MIPS_CPU_IRQ_BASE + 7); | 287 | do_IRQ(MIPS_CPU_IRQ_BASE + 7); |
288 | else if (pending & C_IRQ4) | 288 | else if (pending & C_IRQ4) |
289 | do_IRQ (MIPS_CPU_IRQ_BASE + 6); | 289 | do_IRQ(MIPS_CPU_IRQ_BASE + 6); |
290 | else if (pending & C_IRQ3) | 290 | else if (pending & C_IRQ3) |
291 | pcimt_hwint3(); | 291 | pcimt_hwint3(); |
292 | else if (pending & C_IRQ1) | 292 | else if (pending & C_IRQ1) |
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c index 3361bdd240e6..416f397c768b 100644 --- a/arch/mips/sni/pcit.c +++ b/arch/mips/sni/pcit.c | |||
@@ -188,8 +188,8 @@ static void pcit_hwint1(void) | |||
188 | irq = ffs((pending >> 16) & 0x7f); | 188 | irq = ffs((pending >> 16) & 0x7f); |
189 | 189 | ||
190 | if (likely(irq > 0)) | 190 | if (likely(irq > 0)) |
191 | do_IRQ (irq + SNI_PCIT_INT_START - 1); | 191 | do_IRQ(irq + SNI_PCIT_INT_START - 1); |
192 | set_c0_status (IE_IRQ1); | 192 | set_c0_status(IE_IRQ1); |
193 | } | 193 | } |
194 | 194 | ||
195 | static void pcit_hwint0(void) | 195 | static void pcit_hwint0(void) |
@@ -201,8 +201,8 @@ static void pcit_hwint0(void) | |||
201 | irq = ffs((pending >> 16) & 0x3f); | 201 | irq = ffs((pending >> 16) & 0x3f); |
202 | 202 | ||
203 | if (likely(irq > 0)) | 203 | if (likely(irq > 0)) |
204 | do_IRQ (irq + SNI_PCIT_INT_START - 1); | 204 | do_IRQ(irq + SNI_PCIT_INT_START - 1); |
205 | set_c0_status (IE_IRQ0); | 205 | set_c0_status(IE_IRQ0); |
206 | } | 206 | } |
207 | 207 | ||
208 | static void sni_pcit_hwint(void) | 208 | static void sni_pcit_hwint(void) |
@@ -212,11 +212,11 @@ static void sni_pcit_hwint(void) | |||
212 | if (pending & C_IRQ1) | 212 | if (pending & C_IRQ1) |
213 | pcit_hwint1(); | 213 | pcit_hwint1(); |
214 | else if (pending & C_IRQ2) | 214 | else if (pending & C_IRQ2) |
215 | do_IRQ (MIPS_CPU_IRQ_BASE + 4); | 215 | do_IRQ(MIPS_CPU_IRQ_BASE + 4); |
216 | else if (pending & C_IRQ3) | 216 | else if (pending & C_IRQ3) |
217 | do_IRQ (MIPS_CPU_IRQ_BASE + 5); | 217 | do_IRQ(MIPS_CPU_IRQ_BASE + 5); |
218 | else if (pending & C_IRQ5) | 218 | else if (pending & C_IRQ5) |
219 | do_IRQ (MIPS_CPU_IRQ_BASE + 7); | 219 | do_IRQ(MIPS_CPU_IRQ_BASE + 7); |
220 | } | 220 | } |
221 | 221 | ||
222 | static void sni_pcit_hwint_cplus(void) | 222 | static void sni_pcit_hwint_cplus(void) |
@@ -226,13 +226,13 @@ static void sni_pcit_hwint_cplus(void) | |||
226 | if (pending & C_IRQ0) | 226 | if (pending & C_IRQ0) |
227 | pcit_hwint0(); | 227 | pcit_hwint0(); |
228 | else if (pending & C_IRQ1) | 228 | else if (pending & C_IRQ1) |
229 | do_IRQ (MIPS_CPU_IRQ_BASE + 3); | 229 | do_IRQ(MIPS_CPU_IRQ_BASE + 3); |
230 | else if (pending & C_IRQ2) | 230 | else if (pending & C_IRQ2) |
231 | do_IRQ (MIPS_CPU_IRQ_BASE + 4); | 231 | do_IRQ(MIPS_CPU_IRQ_BASE + 4); |
232 | else if (pending & C_IRQ3) | 232 | else if (pending & C_IRQ3) |
233 | do_IRQ (MIPS_CPU_IRQ_BASE + 5); | 233 | do_IRQ(MIPS_CPU_IRQ_BASE + 5); |
234 | else if (pending & C_IRQ5) | 234 | else if (pending & C_IRQ5) |
235 | do_IRQ (MIPS_CPU_IRQ_BASE + 7); | 235 | do_IRQ(MIPS_CPU_IRQ_BASE + 7); |
236 | } | 236 | } |
237 | 237 | ||
238 | void __init sni_pcit_irq_init(void) | 238 | void __init sni_pcit_irq_init(void) |
@@ -245,7 +245,7 @@ void __init sni_pcit_irq_init(void) | |||
245 | *(volatile u32 *)SNI_PCIT_INT_REG = 0; | 245 | *(volatile u32 *)SNI_PCIT_INT_REG = 0; |
246 | sni_hwint = sni_pcit_hwint; | 246 | sni_hwint = sni_pcit_hwint; |
247 | change_c0_status(ST0_IM, IE_IRQ1); | 247 | change_c0_status(ST0_IM, IE_IRQ1); |
248 | setup_irq (SNI_PCIT_INT_START + 6, &sni_isa_irq); | 248 | setup_irq(SNI_PCIT_INT_START + 6, &sni_isa_irq); |
249 | } | 249 | } |
250 | 250 | ||
251 | void __init sni_pcit_cplus_irq_init(void) | 251 | void __init sni_pcit_cplus_irq_init(void) |
@@ -258,7 +258,7 @@ void __init sni_pcit_cplus_irq_init(void) | |||
258 | *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000; | 258 | *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000; |
259 | sni_hwint = sni_pcit_hwint_cplus; | 259 | sni_hwint = sni_pcit_hwint_cplus; |
260 | change_c0_status(ST0_IM, IE_IRQ0); | 260 | change_c0_status(ST0_IM, IE_IRQ0); |
261 | setup_irq (MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq); | 261 | setup_irq(MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq); |
262 | } | 262 | } |
263 | 263 | ||
264 | void __init sni_pcit_init(void) | 264 | void __init sni_pcit_init(void) |
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c index 94f115c6b2e0..67b061eef6cd 100644 --- a/arch/mips/sni/rm200.c +++ b/arch/mips/sni/rm200.c | |||
@@ -162,16 +162,16 @@ static void sni_rm200_hwint(void) | |||
162 | int irq; | 162 | int irq; |
163 | 163 | ||
164 | if (pending & C_IRQ5) | 164 | if (pending & C_IRQ5) |
165 | do_IRQ (MIPS_CPU_IRQ_BASE + 7); | 165 | do_IRQ(MIPS_CPU_IRQ_BASE + 7); |
166 | else if (pending & C_IRQ0) { | 166 | else if (pending & C_IRQ0) { |
167 | clear_c0_status (IE_IRQ0); | 167 | clear_c0_status(IE_IRQ0); |
168 | mask = *(volatile u8 *)SNI_RM200_INT_ENA_REG ^ 0x1f; | 168 | mask = *(volatile u8 *)SNI_RM200_INT_ENA_REG ^ 0x1f; |
169 | stat = *(volatile u8 *)SNI_RM200_INT_STAT_REG ^ 0x14; | 169 | stat = *(volatile u8 *)SNI_RM200_INT_STAT_REG ^ 0x14; |
170 | irq = ffs(stat & mask & 0x1f); | 170 | irq = ffs(stat & mask & 0x1f); |
171 | 171 | ||
172 | if (likely(irq > 0)) | 172 | if (likely(irq > 0)) |
173 | do_IRQ (irq + SNI_RM200_INT_START - 1); | 173 | do_IRQ(irq + SNI_RM200_INT_START - 1); |
174 | set_c0_status (IE_IRQ0); | 174 | set_c0_status(IE_IRQ0); |
175 | } | 175 | } |
176 | } | 176 | } |
177 | 177 | ||
@@ -187,7 +187,7 @@ void __init sni_rm200_irq_init(void) | |||
187 | set_irq_chip(i, &rm200_irq_type); | 187 | set_irq_chip(i, &rm200_irq_type); |
188 | sni_hwint = sni_rm200_hwint; | 188 | sni_hwint = sni_rm200_hwint; |
189 | change_c0_status(ST0_IM, IE_IRQ0); | 189 | change_c0_status(ST0_IM, IE_IRQ0); |
190 | setup_irq (SNI_RM200_INT_START + 0, &sni_isa_irq); | 190 | setup_irq(SNI_RM200_INT_START + 0, &sni_isa_irq); |
191 | } | 191 | } |
192 | 192 | ||
193 | void __init sni_rm200_init(void) | 193 | void __init sni_rm200_init(void) |
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c index 883e35ea4e82..e8b26bdee24c 100644 --- a/arch/mips/sni/setup.c +++ b/arch/mips/sni/setup.c | |||
@@ -106,11 +106,11 @@ static void __devinit quirk_cirrus_ram_size(struct pci_dev *dev) | |||
106 | * need to do it here, otherwise we get screen corruption | 106 | * need to do it here, otherwise we get screen corruption |
107 | * on older Cirrus chips | 107 | * on older Cirrus chips |
108 | */ | 108 | */ |
109 | pci_read_config_word (dev, PCI_COMMAND, &cmd); | 109 | pci_read_config_word(dev, PCI_COMMAND, &cmd); |
110 | if ((cmd & (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) | 110 | if ((cmd & (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) |
111 | == (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) { | 111 | == (PCI_COMMAND_IO|PCI_COMMAND_MEMORY)) { |
112 | vga_wseq (NULL, CL_SEQR6, 0x12); /* unlock all extension registers */ | 112 | vga_wseq(NULL, CL_SEQR6, 0x12); /* unlock all extension registers */ |
113 | vga_wseq (NULL, CL_SEQRF, 0x18); | 113 | vga_wseq(NULL, CL_SEQRF, 0x18); |
114 | } | 114 | } |
115 | } | 115 | } |
116 | 116 | ||
diff --git a/arch/mips/sni/sniprom.c b/arch/mips/sni/sniprom.c index db544a6e23f3..11eddd43458d 100644 --- a/arch/mips/sni/sniprom.c +++ b/arch/mips/sni/sniprom.c | |||
@@ -45,7 +45,7 @@ void prom_putchar(char c) | |||
45 | static char *(*__prom_getenv)(char *) = (char *(*)(char *))PROM_ENTRY(PROM_GETENV); | 45 | static char *(*__prom_getenv)(char *) = (char *(*)(char *))PROM_ENTRY(PROM_GETENV); |
46 | static void (*__prom_get_memconf)(void *) = (void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF); | 46 | static void (*__prom_get_memconf)(void *) = (void (*)(void *))PROM_ENTRY(PROM_GET_MEMCONF); |
47 | 47 | ||
48 | char *prom_getenv (char *s) | 48 | char *prom_getenv(char *s) |
49 | { | 49 | { |
50 | return __prom_getenv(s); | 50 | return __prom_getenv(s); |
51 | } | 51 | } |
@@ -131,9 +131,9 @@ static void __init sni_console_setup(void) | |||
131 | int port; | 131 | int port; |
132 | static char options[8]; | 132 | static char options[8]; |
133 | 133 | ||
134 | cdev = prom_getenv ("console_dev"); | 134 | cdev = prom_getenv("console_dev"); |
135 | if (strncmp (cdev, "tty", 3) == 0) { | 135 | if (strncmp (cdev, "tty", 3) == 0) { |
136 | ctype = prom_getenv ("console"); | 136 | ctype = prom_getenv("console"); |
137 | switch (*ctype) { | 137 | switch (*ctype) { |
138 | default: | 138 | default: |
139 | case 'l': | 139 | case 'l': |
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c index 153f065434ea..b80877349d38 100644 --- a/arch/mips/sni/time.c +++ b/arch/mips/sni/time.c | |||
@@ -44,23 +44,23 @@ static __init unsigned long dosample(void) | |||
44 | volatile u8 msb, lsb; | 44 | volatile u8 msb, lsb; |
45 | 45 | ||
46 | /* Start the counter. */ | 46 | /* Start the counter. */ |
47 | outb_p (0x34, 0x43); | 47 | outb_p(0x34, 0x43); |
48 | outb_p(SNI_8254_TCSAMP_COUNTER & 0xff, 0x40); | 48 | outb_p(SNI_8254_TCSAMP_COUNTER & 0xff, 0x40); |
49 | outb (SNI_8254_TCSAMP_COUNTER >> 8, 0x40); | 49 | outb(SNI_8254_TCSAMP_COUNTER >> 8, 0x40); |
50 | 50 | ||
51 | /* Get initial counter invariant */ | 51 | /* Get initial counter invariant */ |
52 | ct0 = read_c0_count(); | 52 | ct0 = read_c0_count(); |
53 | 53 | ||
54 | /* Latch and spin until top byte of counter0 is zero */ | 54 | /* Latch and spin until top byte of counter0 is zero */ |
55 | do { | 55 | do { |
56 | outb (0x00, 0x43); | 56 | outb(0x00, 0x43); |
57 | lsb = inb (0x40); | 57 | lsb = inb(0x40); |
58 | msb = inb (0x40); | 58 | msb = inb(0x40); |
59 | ct1 = read_c0_count(); | 59 | ct1 = read_c0_count(); |
60 | } while (msb); | 60 | } while (msb); |
61 | 61 | ||
62 | /* Stop the counter. */ | 62 | /* Stop the counter. */ |
63 | outb (0x38, 0x43); | 63 | outb(0x38, 0x43); |
64 | /* | 64 | /* |
65 | * Return the difference, this is how far the r4k counter increments | 65 | * Return the difference, this is how far the r4k counter increments |
66 | * for every 1/HZ seconds. We round off the nearest 1 MHz of master | 66 | * for every 1/HZ seconds. We round off the nearest 1 MHz of master |
@@ -137,7 +137,7 @@ void __init plat_timer_setup(struct irqaction *irq) | |||
137 | case SNI_BRD_10NEW: | 137 | case SNI_BRD_10NEW: |
138 | case SNI_BRD_TOWER_OASIC: | 138 | case SNI_BRD_TOWER_OASIC: |
139 | case SNI_BRD_MINITOWER: | 139 | case SNI_BRD_MINITOWER: |
140 | sni_a20r_timer_setup (irq); | 140 | sni_a20r_timer_setup(irq); |
141 | break; | 141 | break; |
142 | 142 | ||
143 | case SNI_BRD_PCI_TOWER: | 143 | case SNI_BRD_PCI_TOWER: |
@@ -146,7 +146,7 @@ void __init plat_timer_setup(struct irqaction *irq) | |||
146 | case SNI_BRD_PCI_DESKTOP: | 146 | case SNI_BRD_PCI_DESKTOP: |
147 | case SNI_BRD_PCI_TOWER_CPLUS: | 147 | case SNI_BRD_PCI_TOWER_CPLUS: |
148 | case SNI_BRD_PCI_MTOWER_CPLUS: | 148 | case SNI_BRD_PCI_MTOWER_CPLUS: |
149 | sni_cpu_timer_setup (irq); | 149 | sni_cpu_timer_setup(irq); |
150 | break; | 150 | break; |
151 | } | 151 | } |
152 | } | 152 | } |