diff options
Diffstat (limited to 'arch/mips/sni/rm200.c')
-rw-r--r-- | arch/mips/sni/rm200.c | 46 |
1 files changed, 17 insertions, 29 deletions
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c index 0e6f42c2bbc8..a7e5a6d917b1 100644 --- a/arch/mips/sni/rm200.c +++ b/arch/mips/sni/rm200.c | |||
@@ -155,12 +155,11 @@ static __iomem u8 *rm200_pic_slave; | |||
155 | #define cached_master_mask (rm200_cached_irq_mask) | 155 | #define cached_master_mask (rm200_cached_irq_mask) |
156 | #define cached_slave_mask (rm200_cached_irq_mask >> 8) | 156 | #define cached_slave_mask (rm200_cached_irq_mask >> 8) |
157 | 157 | ||
158 | static void sni_rm200_disable_8259A_irq(unsigned int irq) | 158 | static void sni_rm200_disable_8259A_irq(struct irq_data *d) |
159 | { | 159 | { |
160 | unsigned int mask; | 160 | unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE; |
161 | unsigned long flags; | 161 | unsigned long flags; |
162 | 162 | ||
163 | irq -= RM200_I8259A_IRQ_BASE; | ||
164 | mask = 1 << irq; | 163 | mask = 1 << irq; |
165 | raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); | 164 | raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); |
166 | rm200_cached_irq_mask |= mask; | 165 | rm200_cached_irq_mask |= mask; |
@@ -171,12 +170,11 @@ static void sni_rm200_disable_8259A_irq(unsigned int irq) | |||
171 | raw_spin_unlock_irqrestore(&sni_rm200_i8259A_lock, flags); | 170 | raw_spin_unlock_irqrestore(&sni_rm200_i8259A_lock, flags); |
172 | } | 171 | } |
173 | 172 | ||
174 | static void sni_rm200_enable_8259A_irq(unsigned int irq) | 173 | static void sni_rm200_enable_8259A_irq(struct irq_data *d) |
175 | { | 174 | { |
176 | unsigned int mask; | 175 | unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE; |
177 | unsigned long flags; | 176 | unsigned long flags; |
178 | 177 | ||
179 | irq -= RM200_I8259A_IRQ_BASE; | ||
180 | mask = ~(1 << irq); | 178 | mask = ~(1 << irq); |
181 | raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); | 179 | raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); |
182 | rm200_cached_irq_mask &= mask; | 180 | rm200_cached_irq_mask &= mask; |
@@ -210,12 +208,11 @@ static inline int sni_rm200_i8259A_irq_real(unsigned int irq) | |||
210 | * first, _then_ send the EOI, and the order of EOI | 208 | * first, _then_ send the EOI, and the order of EOI |
211 | * to the two 8259s is important! | 209 | * to the two 8259s is important! |
212 | */ | 210 | */ |
213 | void sni_rm200_mask_and_ack_8259A(unsigned int irq) | 211 | void sni_rm200_mask_and_ack_8259A(struct irq_data *d) |
214 | { | 212 | { |
215 | unsigned int irqmask; | 213 | unsigned int irqmask, irq = d->irq - RM200_I8259A_IRQ_BASE; |
216 | unsigned long flags; | 214 | unsigned long flags; |
217 | 215 | ||
218 | irq -= RM200_I8259A_IRQ_BASE; | ||
219 | irqmask = 1 << irq; | 216 | irqmask = 1 << irq; |
220 | raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); | 217 | raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); |
221 | /* | 218 | /* |
@@ -285,9 +282,9 @@ spurious_8259A_irq: | |||
285 | 282 | ||
286 | static struct irq_chip sni_rm200_i8259A_chip = { | 283 | static struct irq_chip sni_rm200_i8259A_chip = { |
287 | .name = "RM200-XT-PIC", | 284 | .name = "RM200-XT-PIC", |
288 | .mask = sni_rm200_disable_8259A_irq, | 285 | .irq_mask = sni_rm200_disable_8259A_irq, |
289 | .unmask = sni_rm200_enable_8259A_irq, | 286 | .irq_unmask = sni_rm200_enable_8259A_irq, |
290 | .mask_ack = sni_rm200_mask_and_ack_8259A, | 287 | .irq_mask_ack = sni_rm200_mask_and_ack_8259A, |
291 | }; | 288 | }; |
292 | 289 | ||
293 | /* | 290 | /* |
@@ -416,7 +413,7 @@ void __init sni_rm200_i8259_irqs(void) | |||
416 | sni_rm200_init_8259A(); | 413 | sni_rm200_init_8259A(); |
417 | 414 | ||
418 | for (i = RM200_I8259A_IRQ_BASE; i < RM200_I8259A_IRQ_BASE + 16; i++) | 415 | for (i = RM200_I8259A_IRQ_BASE; i < RM200_I8259A_IRQ_BASE + 16; i++) |
419 | set_irq_chip_and_handler(i, &sni_rm200_i8259A_chip, | 416 | irq_set_chip_and_handler(i, &sni_rm200_i8259A_chip, |
420 | handle_level_irq); | 417 | handle_level_irq); |
421 | 418 | ||
422 | setup_irq(RM200_I8259A_IRQ_BASE + PIC_CASCADE_IR, &sni_rm200_irq2); | 419 | setup_irq(RM200_I8259A_IRQ_BASE + PIC_CASCADE_IR, &sni_rm200_irq2); |
@@ -429,33 +426,24 @@ void __init sni_rm200_i8259_irqs(void) | |||
429 | #define SNI_RM200_INT_START 24 | 426 | #define SNI_RM200_INT_START 24 |
430 | #define SNI_RM200_INT_END 28 | 427 | #define SNI_RM200_INT_END 28 |
431 | 428 | ||
432 | static void enable_rm200_irq(unsigned int irq) | 429 | static void enable_rm200_irq(struct irq_data *d) |
433 | { | 430 | { |
434 | unsigned int mask = 1 << (irq - SNI_RM200_INT_START); | 431 | unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START); |
435 | 432 | ||
436 | *(volatile u8 *)SNI_RM200_INT_ENA_REG &= ~mask; | 433 | *(volatile u8 *)SNI_RM200_INT_ENA_REG &= ~mask; |
437 | } | 434 | } |
438 | 435 | ||
439 | void disable_rm200_irq(unsigned int irq) | 436 | void disable_rm200_irq(struct irq_data *d) |
440 | { | 437 | { |
441 | unsigned int mask = 1 << (irq - SNI_RM200_INT_START); | 438 | unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START); |
442 | 439 | ||
443 | *(volatile u8 *)SNI_RM200_INT_ENA_REG |= mask; | 440 | *(volatile u8 *)SNI_RM200_INT_ENA_REG |= mask; |
444 | } | 441 | } |
445 | 442 | ||
446 | void end_rm200_irq(unsigned int irq) | ||
447 | { | ||
448 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | ||
449 | enable_rm200_irq(irq); | ||
450 | } | ||
451 | |||
452 | static struct irq_chip rm200_irq_type = { | 443 | static struct irq_chip rm200_irq_type = { |
453 | .name = "RM200", | 444 | .name = "RM200", |
454 | .ack = disable_rm200_irq, | 445 | .irq_mask = disable_rm200_irq, |
455 | .mask = disable_rm200_irq, | 446 | .irq_unmask = enable_rm200_irq, |
456 | .mask_ack = disable_rm200_irq, | ||
457 | .unmask = enable_rm200_irq, | ||
458 | .end = end_rm200_irq, | ||
459 | }; | 447 | }; |
460 | 448 | ||
461 | static void sni_rm200_hwint(void) | 449 | static void sni_rm200_hwint(void) |
@@ -489,7 +477,7 @@ void __init sni_rm200_irq_init(void) | |||
489 | mips_cpu_irq_init(); | 477 | mips_cpu_irq_init(); |
490 | /* Actually we've got more interrupts to handle ... */ | 478 | /* Actually we've got more interrupts to handle ... */ |
491 | for (i = SNI_RM200_INT_START; i <= SNI_RM200_INT_END; i++) | 479 | for (i = SNI_RM200_INT_START; i <= SNI_RM200_INT_END; i++) |
492 | set_irq_chip_and_handler(i, &rm200_irq_type, handle_level_irq); | 480 | irq_set_chip_and_handler(i, &rm200_irq_type, handle_level_irq); |
493 | sni_hwint = sni_rm200_hwint; | 481 | sni_hwint = sni_rm200_hwint; |
494 | change_c0_status(ST0_IM, IE_IRQ0); | 482 | change_c0_status(ST0_IM, IE_IRQ0); |
495 | setup_irq(SNI_RM200_INT_START + 0, &sni_rm200_i8259A_irq); | 483 | setup_irq(SNI_RM200_INT_START + 0, &sni_rm200_i8259A_irq); |