aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/sni/pcimt.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/sni/pcimt.c')
-rw-r--r--arch/mips/sni/pcimt.c23
1 files changed, 7 insertions, 16 deletions
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 8c92c73bc717..ed3b3d317358 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -194,33 +194,24 @@ static struct pci_controller sni_controller = {
194 .io_map_base = SNI_PORT_BASE 194 .io_map_base = SNI_PORT_BASE
195}; 195};
196 196
197static void enable_pcimt_irq(unsigned int irq) 197static void enable_pcimt_irq(struct irq_data *d)
198{ 198{
199 unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2); 199 unsigned int mask = 1 << (d->irq - PCIMT_IRQ_INT2);
200 200
201 *(volatile u8 *) PCIMT_IRQSEL |= mask; 201 *(volatile u8 *) PCIMT_IRQSEL |= mask;
202} 202}
203 203
204void disable_pcimt_irq(unsigned int irq) 204void disable_pcimt_irq(struct irq_data *d)
205{ 205{
206 unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2)); 206 unsigned int mask = ~(1 << (d->irq - PCIMT_IRQ_INT2));
207 207
208 *(volatile u8 *) PCIMT_IRQSEL &= mask; 208 *(volatile u8 *) PCIMT_IRQSEL &= mask;
209} 209}
210 210
211static void end_pcimt_irq(unsigned int irq)
212{
213 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
214 enable_pcimt_irq(irq);
215}
216
217static struct irq_chip pcimt_irq_type = { 211static struct irq_chip pcimt_irq_type = {
218 .name = "PCIMT", 212 .name = "PCIMT",
219 .ack = disable_pcimt_irq, 213 .irq_mask = disable_pcimt_irq,
220 .mask = disable_pcimt_irq, 214 .irq_unmask = enable_pcimt_irq,
221 .mask_ack = disable_pcimt_irq,
222 .unmask = enable_pcimt_irq,
223 .end = end_pcimt_irq,
224}; 215};
225 216
226/* 217/*
@@ -305,7 +296,7 @@ void __init sni_pcimt_irq_init(void)
305 mips_cpu_irq_init(); 296 mips_cpu_irq_init();
306 /* Actually we've got more interrupts to handle ... */ 297 /* Actually we've got more interrupts to handle ... */
307 for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_SCSI; i++) 298 for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_SCSI; i++)
308 set_irq_chip_and_handler(i, &pcimt_irq_type, handle_level_irq); 299 irq_set_chip_and_handler(i, &pcimt_irq_type, handle_level_irq);
309 sni_hwint = sni_pcimt_hwint; 300 sni_hwint = sni_pcimt_hwint;
310 change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ3); 301 change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ3);
311} 302}