diff options
Diffstat (limited to 'arch/mips/sni/irq.c')
-rw-r--r-- | arch/mips/sni/irq.c | 37 |
1 files changed, 27 insertions, 10 deletions
diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c index 952038aa4b90..7365b4853ddb 100644 --- a/arch/mips/sni/irq.c +++ b/arch/mips/sni/irq.c | |||
@@ -19,8 +19,6 @@ | |||
19 | 19 | ||
20 | DEFINE_SPINLOCK(pciasic_lock); | 20 | DEFINE_SPINLOCK(pciasic_lock); |
21 | 21 | ||
22 | extern asmlinkage void sni_rm200_pci_handle_int(void); | ||
23 | |||
24 | static void enable_pciasic_irq(unsigned int irq) | 22 | static void enable_pciasic_irq(unsigned int irq) |
25 | { | 23 | { |
26 | unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2); | 24 | unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2); |
@@ -71,20 +69,20 @@ static struct hw_interrupt_type pciasic_irq_type = { | |||
71 | * hwint0 should deal with MP agent, ASIC PCI, EISA NMI and debug | 69 | * hwint0 should deal with MP agent, ASIC PCI, EISA NMI and debug |
72 | * button interrupts. Later ... | 70 | * button interrupts. Later ... |
73 | */ | 71 | */ |
74 | void pciasic_hwint0(struct pt_regs *regs) | 72 | static void pciasic_hwint0(struct pt_regs *regs) |
75 | { | 73 | { |
76 | panic("Received int0 but no handler yet ..."); | 74 | panic("Received int0 but no handler yet ..."); |
77 | } | 75 | } |
78 | 76 | ||
79 | /* This interrupt was used for the com1 console on the first prototypes. */ | 77 | /* This interrupt was used for the com1 console on the first prototypes. */ |
80 | void pciasic_hwint2(struct pt_regs *regs) | 78 | static void pciasic_hwint2(struct pt_regs *regs) |
81 | { | 79 | { |
82 | /* I think this shouldn't happen on production machines. */ | 80 | /* I think this shouldn't happen on production machines. */ |
83 | panic("hwint2 and no handler yet"); | 81 | panic("hwint2 and no handler yet"); |
84 | } | 82 | } |
85 | 83 | ||
86 | /* hwint5 is the r4k count / compare interrupt */ | 84 | /* hwint5 is the r4k count / compare interrupt */ |
87 | void pciasic_hwint5(struct pt_regs *regs) | 85 | static void pciasic_hwint5(struct pt_regs *regs) |
88 | { | 86 | { |
89 | panic("hwint5 and no handler yet"); | 87 | panic("hwint5 and no handler yet"); |
90 | } | 88 | } |
@@ -105,7 +103,7 @@ static unsigned int ls1bit8(unsigned int x) | |||
105 | * | 103 | * |
106 | * The EISA_INT bit in CSITPEND is high active, all others are low active. | 104 | * The EISA_INT bit in CSITPEND is high active, all others are low active. |
107 | */ | 105 | */ |
108 | void pciasic_hwint1(struct pt_regs *regs) | 106 | static void pciasic_hwint1(struct pt_regs *regs) |
109 | { | 107 | { |
110 | u8 pend = *(volatile char *)PCIMT_CSITPEND; | 108 | u8 pend = *(volatile char *)PCIMT_CSITPEND; |
111 | unsigned long flags; | 109 | unsigned long flags; |
@@ -135,7 +133,7 @@ void pciasic_hwint1(struct pt_regs *regs) | |||
135 | /* | 133 | /* |
136 | * hwint 3 should deal with the PCI A - D interrupts, | 134 | * hwint 3 should deal with the PCI A - D interrupts, |
137 | */ | 135 | */ |
138 | void pciasic_hwint3(struct pt_regs *regs) | 136 | static void pciasic_hwint3(struct pt_regs *regs) |
139 | { | 137 | { |
140 | u8 pend = *(volatile char *)PCIMT_CSITPEND; | 138 | u8 pend = *(volatile char *)PCIMT_CSITPEND; |
141 | int irq; | 139 | int irq; |
@@ -150,13 +148,34 @@ void pciasic_hwint3(struct pt_regs *regs) | |||
150 | /* | 148 | /* |
151 | * hwint 4 is used for only the onboard PCnet 32. | 149 | * hwint 4 is used for only the onboard PCnet 32. |
152 | */ | 150 | */ |
153 | void pciasic_hwint4(struct pt_regs *regs) | 151 | static void pciasic_hwint4(struct pt_regs *regs) |
154 | { | 152 | { |
155 | clear_c0_status(IE_IRQ4); | 153 | clear_c0_status(IE_IRQ4); |
156 | do_IRQ(PCIMT_IRQ_ETHERNET, regs); | 154 | do_IRQ(PCIMT_IRQ_ETHERNET, regs); |
157 | set_c0_status(IE_IRQ4); | 155 | set_c0_status(IE_IRQ4); |
158 | } | 156 | } |
159 | 157 | ||
158 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | ||
159 | { | ||
160 | unsigned int pending = read_c0_status() & read_c0_cause(); | ||
161 | static unsigned char led_cache; | ||
162 | |||
163 | *(volatile unsigned char *) PCIMT_CSLED = ++led_cache; | ||
164 | |||
165 | if (pending & 0x0800) | ||
166 | pciasic_hwint1(regs); | ||
167 | else if (pending & 0x4000) | ||
168 | pciasic_hwint4(regs); | ||
169 | else if (pending & 0x2000) | ||
170 | pciasic_hwint3(regs); | ||
171 | else if (pending & 0x1000) | ||
172 | pciasic_hwint2(regs); | ||
173 | else if (pending & 0x8000) | ||
174 | pciasic_hwint5(regs); | ||
175 | else if (pending & 0x0400) | ||
176 | pciasic_hwint0(regs); | ||
177 | } | ||
178 | |||
160 | void __init init_pciasic(void) | 179 | void __init init_pciasic(void) |
161 | { | 180 | { |
162 | unsigned long flags; | 181 | unsigned long flags; |
@@ -176,8 +195,6 @@ void __init arch_init_irq(void) | |||
176 | { | 195 | { |
177 | int i; | 196 | int i; |
178 | 197 | ||
179 | set_except_vector(0, sni_rm200_pci_handle_int); | ||
180 | |||
181 | init_i8259_irqs(); /* Integrated i8259 */ | 198 | init_i8259_irqs(); /* Integrated i8259 */ |
182 | init_pciasic(); | 199 | init_pciasic(); |
183 | 200 | ||