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-rw-r--r--arch/mips/sibyte/bcm1480/smp.c101
-rw-r--r--arch/mips/sibyte/cfe/Makefile1
-rw-r--r--arch/mips/sibyte/cfe/setup.c11
-rw-r--r--arch/mips/sibyte/cfe/smp.c110
-rw-r--r--arch/mips/sibyte/sb1250/smp.c100
5 files changed, 198 insertions, 125 deletions
diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c
index 436ba78359ab..183c460b9ca1 100644
--- a/arch/mips/sibyte/bcm1480/smp.c
+++ b/arch/mips/sibyte/bcm1480/smp.c
@@ -23,6 +23,7 @@
23 23
24#include <asm/mmu_context.h> 24#include <asm/mmu_context.h>
25#include <asm/io.h> 25#include <asm/io.h>
26#include <asm/fw/cfe/cfe_api.h>
26#include <asm/sibyte/sb1250.h> 27#include <asm/sibyte/sb1250.h>
27#include <asm/sibyte/bcm1480_regs.h> 28#include <asm/sibyte/bcm1480_regs.h>
28#include <asm/sibyte/bcm1480_int.h> 29#include <asm/sibyte/bcm1480_int.h>
@@ -67,28 +68,114 @@ void __cpuinit bcm1480_smp_init(void)
67 change_c0_status(ST0_IM, imask); 68 change_c0_status(ST0_IM, imask);
68} 69}
69 70
70void __cpuinit bcm1480_smp_finish(void) 71/*
72 * These are routines for dealing with the sb1250 smp capabilities
73 * independent of board/firmware
74 */
75
76/*
77 * Simple enough; everything is set up, so just poke the appropriate mailbox
78 * register, and we should be set
79 */
80static void bcm1480_send_ipi_single(int cpu, unsigned int action)
81{
82 __raw_writeq((((u64)action)<< 48), mailbox_0_set_regs[cpu]);
83}
84
85static void bcm1480_send_ipi_mask(cpumask_t mask, unsigned int action)
86{
87 unsigned int i;
88
89 for_each_cpu_mask(i, mask)
90 bcm1480_send_ipi_single(i, action);
91}
92
93/*
94 * Code to run on secondary just after probing the CPU
95 */
96static void __cpuinit bcm1480_init_secondary(void)
97{
98 extern void bcm1480_smp_init(void);
99
100 bcm1480_smp_init();
101}
102
103/*
104 * Do any tidying up before marking online and running the idle
105 * loop
106 */
107static void __cpuinit bcm1480_smp_finish(void)
71{ 108{
72 extern void sb1480_clockevent_init(void); 109 extern void sb1480_clockevent_init(void);
73 110
74 sb1480_clockevent_init(); 111 sb1480_clockevent_init();
75 local_irq_enable(); 112 local_irq_enable();
113 bcm1480_smp_finish();
76} 114}
77 115
78/* 116/*
79 * These are routines for dealing with the sb1250 smp capabilities 117 * Final cleanup after all secondaries booted
80 * independent of board/firmware
81 */ 118 */
119static void bcm1480_cpus_done(void)
120{
121}
82 122
83/* 123/*
84 * Simple enough; everything is set up, so just poke the appropriate mailbox 124 * Setup the PC, SP, and GP of a secondary processor and start it
85 * register, and we should be set 125 * running!
86 */ 126 */
87void core_send_ipi(int cpu, unsigned int action) 127static void __cpuinit bcm1480_boot_secondary(int cpu, struct task_struct *idle)
88{ 128{
89 __raw_writeq((((u64)action)<< 48), mailbox_0_set_regs[cpu]); 129 int retval;
130
131 retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap,
132 __KSTK_TOS(idle),
133 (unsigned long)task_thread_info(idle), 0);
134 if (retval != 0)
135 printk("cfe_start_cpu(%i) returned %i\n" , cpu, retval);
90} 136}
91 137
138/*
139 * Use CFE to find out how many CPUs are available, setting up
140 * phys_cpu_present_map and the logical/physical mappings.
141 * XXXKW will the boot CPU ever not be physical 0?
142 *
143 * Common setup before any secondaries are started
144 */
145static void __init bcm1480_smp_setup(void)
146{
147 int i, num;
148
149 cpus_clear(phys_cpu_present_map);
150 cpu_set(0, phys_cpu_present_map);
151 __cpu_number_map[0] = 0;
152 __cpu_logical_map[0] = 0;
153
154 for (i = 1, num = 0; i < NR_CPUS; i++) {
155 if (cfe_cpu_stop(i) == 0) {
156 cpu_set(i, phys_cpu_present_map);
157 __cpu_number_map[i] = ++num;
158 __cpu_logical_map[num] = i;
159 }
160 }
161 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
162}
163
164static void __init bcm1480_prepare_cpus(unsigned int max_cpus)
165{
166}
167
168struct plat_smp_ops bcm1480_smp_ops = {
169 .send_ipi_single = bcm1480_send_ipi_single,
170 .send_ipi_mask = bcm1480_send_ipi_mask,
171 .init_secondary = bcm1480_init_secondary,
172 .smp_finish = bcm1480_smp_finish,
173 .cpus_done = bcm1480_cpus_done,
174 .boot_secondary = bcm1480_boot_secondary,
175 .smp_setup = bcm1480_smp_setup,
176 .prepare_cpus = bcm1480_prepare_cpus,
177};
178
92void bcm1480_mailbox_interrupt(void) 179void bcm1480_mailbox_interrupt(void)
93{ 180{
94 int cpu = smp_processor_id(); 181 int cpu = smp_processor_id();
diff --git a/arch/mips/sibyte/cfe/Makefile b/arch/mips/sibyte/cfe/Makefile
index a1214937b705..02b32e142adf 100644
--- a/arch/mips/sibyte/cfe/Makefile
+++ b/arch/mips/sibyte/cfe/Makefile
@@ -1,3 +1,2 @@
1lib-y = setup.o 1lib-y = setup.o
2lib-$(CONFIG_SMP) += smp.o
3lib-$(CONFIG_SIBYTE_CFE_CONSOLE) += console.o 2lib-$(CONFIG_SIBYTE_CFE_CONSOLE) += console.o
diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c
index dbd6e6fdd3f9..50d7c05e15b8 100644
--- a/arch/mips/sibyte/cfe/setup.c
+++ b/arch/mips/sibyte/cfe/setup.c
@@ -28,6 +28,7 @@
28#include <asm/bootinfo.h> 28#include <asm/bootinfo.h>
29#include <asm/reboot.h> 29#include <asm/reboot.h>
30#include <asm/sibyte/board.h> 30#include <asm/sibyte/board.h>
31#include <asm/smp-ops.h>
31 32
32#include <asm/fw/cfe/cfe_api.h> 33#include <asm/fw/cfe/cfe_api.h>
33#include <asm/fw/cfe/cfe_error.h> 34#include <asm/fw/cfe/cfe_error.h>
@@ -232,6 +233,9 @@ static int __init initrd_setup(char *str)
232 233
233#endif 234#endif
234 235
236extern struct plat_smp_ops sb_smp_ops;
237extern struct plat_smp_ops bcm1480_smp_ops;
238
235/* 239/*
236 * prom_init is called just after the cpu type is determined, from setup_arch() 240 * prom_init is called just after the cpu type is determined, from setup_arch()
237 */ 241 */
@@ -340,6 +344,13 @@ void __init prom_init(void)
340 arcs_cmdline[CL_SIZE-1] = 0; 344 arcs_cmdline[CL_SIZE-1] = 0;
341 345
342 prom_meminit(); 346 prom_meminit();
347
348#if defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250)
349 register_smp_ops(&sb_smp_ops);
350#endif
351#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
352 register_smp_ops(&bcm1480_smp_ops);
353#endif
343} 354}
344 355
345void __init prom_free_prom_memory(void) 356void __init prom_free_prom_memory(void)
diff --git a/arch/mips/sibyte/cfe/smp.c b/arch/mips/sibyte/cfe/smp.c
deleted file mode 100644
index 534a62912f21..000000000000
--- a/arch/mips/sibyte/cfe/smp.c
+++ /dev/null
@@ -1,110 +0,0 @@
1/*
2 * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19#include <linux/init.h>
20#include <linux/sched.h>
21#include <linux/smp.h>
22#include <asm/processor.h>
23
24#include <asm/fw/cfe/cfe_api.h>
25#include <asm/fw/cfe/cfe_error.h>
26
27/*
28 * Use CFE to find out how many CPUs are available, setting up
29 * phys_cpu_present_map and the logical/physical mappings.
30 * XXXKW will the boot CPU ever not be physical 0?
31 *
32 * Common setup before any secondaries are started
33 */
34void __init plat_smp_setup(void)
35{
36 int i, num;
37
38 cpus_clear(phys_cpu_present_map);
39 cpu_set(0, phys_cpu_present_map);
40 __cpu_number_map[0] = 0;
41 __cpu_logical_map[0] = 0;
42
43 for (i = 1, num = 0; i < NR_CPUS; i++) {
44 if (cfe_cpu_stop(i) == 0) {
45 cpu_set(i, phys_cpu_present_map);
46 __cpu_number_map[i] = ++num;
47 __cpu_logical_map[num] = i;
48 }
49 }
50 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
51}
52
53void __init plat_prepare_cpus(unsigned int max_cpus)
54{
55}
56
57/*
58 * Setup the PC, SP, and GP of a secondary processor and start it
59 * running!
60 */
61void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle)
62{
63 int retval;
64
65 retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap,
66 __KSTK_TOS(idle),
67 (unsigned long)task_thread_info(idle), 0);
68 if (retval != 0)
69 printk("cfe_start_cpu(%i) returned %i\n" , cpu, retval);
70}
71
72/*
73 * Code to run on secondary just after probing the CPU
74 */
75void __cpuinit prom_init_secondary(void)
76{
77#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
78 extern void bcm1480_smp_init(void);
79 bcm1480_smp_init();
80#elif defined(CONFIG_SIBYTE_SB1250)
81 extern void sb1250_smp_init(void);
82 sb1250_smp_init();
83#else
84#error invalid SMP configuration
85#endif
86}
87
88/*
89 * Do any tidying up before marking online and running the idle
90 * loop
91 */
92void __cpuinit prom_smp_finish(void)
93{
94#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
95 extern void bcm1480_smp_finish(void);
96 bcm1480_smp_finish();
97#elif defined(CONFIG_SIBYTE_SB1250)
98 extern void sb1250_smp_finish(void);
99 sb1250_smp_finish();
100#else
101#error invalid SMP configuration
102#endif
103}
104
105/*
106 * Final cleanup after all secondaries booted
107 */
108void prom_cpus_done(void)
109{
110}
diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c
index 3f52c95a4eb8..0734b933e969 100644
--- a/arch/mips/sibyte/sb1250/smp.c
+++ b/arch/mips/sibyte/sb1250/smp.c
@@ -24,6 +24,7 @@
24 24
25#include <asm/mmu_context.h> 25#include <asm/mmu_context.h>
26#include <asm/io.h> 26#include <asm/io.h>
27#include <asm/fw/cfe/cfe_api.h>
27#include <asm/sibyte/sb1250.h> 28#include <asm/sibyte/sb1250.h>
28#include <asm/sibyte/sb1250_regs.h> 29#include <asm/sibyte/sb1250_regs.h>
29#include <asm/sibyte/sb1250_int.h> 30#include <asm/sibyte/sb1250_int.h>
@@ -55,7 +56,43 @@ void __cpuinit sb1250_smp_init(void)
55 change_c0_status(ST0_IM, imask); 56 change_c0_status(ST0_IM, imask);
56} 57}
57 58
58void __cpuinit sb1250_smp_finish(void) 59/*
60 * These are routines for dealing with the sb1250 smp capabilities
61 * independent of board/firmware
62 */
63
64/*
65 * Simple enough; everything is set up, so just poke the appropriate mailbox
66 * register, and we should be set
67 */
68static void sb1250_send_ipi_single(int cpu, unsigned int action)
69{
70 __raw_writeq((((u64)action) << 48), mailbox_set_regs[cpu]);
71}
72
73static inline void sb1250_send_ipi_mask(cpumask_t mask, unsigned int action)
74{
75 unsigned int i;
76
77 for_each_cpu_mask(i, mask)
78 sb1250_send_ipi_single(i, action);
79}
80
81/*
82 * Code to run on secondary just after probing the CPU
83 */
84static void __cpuinit sb1250_init_secondary(void)
85{
86 extern void sb1250_smp_init(void);
87
88 sb1250_smp_init();
89}
90
91/*
92 * Do any tidying up before marking online and running the idle
93 * loop
94 */
95static void __cpuinit sb1250_smp_finish(void)
59{ 96{
60 extern void sb1250_clockevent_init(void); 97 extern void sb1250_clockevent_init(void);
61 98
@@ -64,19 +101,68 @@ void __cpuinit sb1250_smp_finish(void)
64} 101}
65 102
66/* 103/*
67 * These are routines for dealing with the sb1250 smp capabilities 104 * Final cleanup after all secondaries booted
68 * independent of board/firmware
69 */ 105 */
106static void sb1250_cpus_done(void)
107{
108}
70 109
71/* 110/*
72 * Simple enough; everything is set up, so just poke the appropriate mailbox 111 * Setup the PC, SP, and GP of a secondary processor and start it
73 * register, and we should be set 112 * running!
74 */ 113 */
75void core_send_ipi(int cpu, unsigned int action) 114static void __cpuinit sb1250_boot_secondary(int cpu, struct task_struct *idle)
76{ 115{
77 __raw_writeq((((u64)action) << 48), mailbox_set_regs[cpu]); 116 int retval;
117
118 retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap,
119 __KSTK_TOS(idle),
120 (unsigned long)task_thread_info(idle), 0);
121 if (retval != 0)
122 printk("cfe_start_cpu(%i) returned %i\n" , cpu, retval);
78} 123}
79 124
125/*
126 * Use CFE to find out how many CPUs are available, setting up
127 * phys_cpu_present_map and the logical/physical mappings.
128 * XXXKW will the boot CPU ever not be physical 0?
129 *
130 * Common setup before any secondaries are started
131 */
132static void __init sb1250_smp_setup(void)
133{
134 int i, num;
135
136 cpus_clear(phys_cpu_present_map);
137 cpu_set(0, phys_cpu_present_map);
138 __cpu_number_map[0] = 0;
139 __cpu_logical_map[0] = 0;
140
141 for (i = 1, num = 0; i < NR_CPUS; i++) {
142 if (cfe_cpu_stop(i) == 0) {
143 cpu_set(i, phys_cpu_present_map);
144 __cpu_number_map[i] = ++num;
145 __cpu_logical_map[num] = i;
146 }
147 }
148 printk(KERN_INFO "Detected %i available secondary CPU(s)\n", num);
149}
150
151static void __init sb1250_prepare_cpus(unsigned int max_cpus)
152{
153}
154
155struct plat_smp_ops sb_smp_ops = {
156 .send_ipi_single = sb1250_send_ipi_single,
157 .send_ipi_mask = sb1250_send_ipi_mask,
158 .init_secondary = sb1250_init_secondary,
159 .smp_finish = sb1250_smp_finish,
160 .cpus_done = sb1250_cpus_done,
161 .boot_secondary = sb1250_boot_secondary,
162 .smp_setup = sb1250_smp_setup,
163 .prepare_cpus = sb1250_prepare_cpus,
164};
165
80void sb1250_mailbox_interrupt(void) 166void sb1250_mailbox_interrupt(void)
81{ 167{
82 int cpu = smp_processor_id(); 168 int cpu = smp_processor_id();
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-01 00:24:30 -0500