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-rw-r--r--arch/mips/sibyte/bcm1480/time.c17
-rw-r--r--arch/mips/sibyte/sb1250/irq.c8
-rw-r--r--arch/mips/sibyte/swarm/setup.c4
3 files changed, 18 insertions, 11 deletions
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c
index e545752695a1..efaf83efd2e4 100644
--- a/arch/mips/sibyte/bcm1480/time.c
+++ b/arch/mips/sibyte/bcm1480/time.c
@@ -110,17 +110,18 @@ void bcm1480_timer_interrupt(struct pt_regs *regs)
110 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS, 110 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
111 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); 111 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
112 112
113 /*
114 * CPU 0 handles the global timer interrupt job
115 */
116 if (cpu == 0) { 113 if (cpu == 0) {
114 /*
115 * CPU 0 handles the global timer interrupt job
116 */
117 ll_timer_interrupt(irq, regs); 117 ll_timer_interrupt(irq, regs);
118 } 118 }
119 119 else {
120 /* 120 /*
121 * every CPU should do profiling and process accouting 121 * other CPUs should just do profiling and process accounting
122 */ 122 */
123 ll_local_timer_interrupt(irq, regs); 123 ll_local_timer_interrupt(irq, regs);
124 }
124} 125}
125 126
126/* 127/*
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 0f6e54db4888..f853c32f60a0 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -435,13 +435,17 @@ static inline int dclz(unsigned long long x)
435 return lz; 435 return lz;
436} 436}
437 437
438extern void sb1250_timer_interrupt(struct pt_regs *regs);
439extern void sb1250_mailbox_interrupt(struct pt_regs *regs);
440extern void sb1250_kgdb_interrupt(struct pt_regs *regs);
441
438asmlinkage void plat_irq_dispatch(struct pt_regs *regs) 442asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
439{ 443{
440 unsigned int pending; 444 unsigned int pending;
441 445
442#ifdef CONFIG_SIBYTE_SB1250_PROF 446#ifdef CONFIG_SIBYTE_SB1250_PROF
443 /* Set compare to count to silence count/compare timer interrupts */ 447 /* Set compare to count to silence count/compare timer interrupts */
444 write_c0_count(read_c0_count()); 448 write_c0_compare(read_c0_count());
445#endif 449#endif
446 450
447 /* 451 /*
@@ -482,7 +486,7 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
482 * Default...we've hit an IP[2] interrupt, which means we've 486 * Default...we've hit an IP[2] interrupt, which means we've
483 * got to check the 1250 interrupt registers to figure out what 487 * got to check the 1250 interrupt registers to figure out what
484 * to do. Need to detect which CPU we're on, now that 488 * to do. Need to detect which CPU we're on, now that
485 ~ smp_affinity is supported. 489 * smp_affinity is supported.
486 */ 490 */
487 mask = __raw_readq(IOADDR(A_IMR_REGISTER(smp_processor_id(), 491 mask = __raw_readq(IOADDR(A_IMR_REGISTER(smp_processor_id(),
488 R_IMR_INTERRUPT_STATUS_BASE))); 492 R_IMR_INTERRUPT_STATUS_BASE)));
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c
index 4b5f74ff3edd..f9e694988cdf 100644
--- a/arch/mips/sibyte/swarm/setup.c
+++ b/arch/mips/sibyte/swarm/setup.c
@@ -72,8 +72,10 @@ const char *get_system_type(void)
72 72
73void __init swarm_time_init(void) 73void __init swarm_time_init(void)
74{ 74{
75#if defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
75 /* Setup HPT */ 76 /* Setup HPT */
76 sb1250_hpt_setup(); 77 sb1250_hpt_setup();
78#endif
77} 79}
78 80
79void __init swarm_timer_setup(struct irqaction *irq) 81void __init swarm_timer_setup(struct irqaction *irq)
@@ -103,7 +105,7 @@ int swarm_be_handler(struct pt_regs *regs, int is_fixup)
103 return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL); 105 return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL);
104} 106}
105 107
106void __init plat_setup(void) 108void __init plat_mem_setup(void)
107{ 109{
108#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) 110#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
109 bcm1480_setup(); 111 bcm1480_setup();