diff options
Diffstat (limited to 'arch/mips/sibyte')
-rw-r--r-- | arch/mips/sibyte/bcm1480/irq.c | 30 | ||||
-rw-r--r-- | arch/mips/sibyte/bcm1480/time.c | 35 | ||||
-rw-r--r-- | arch/mips/sibyte/sb1250/bcm1250_tbprof.c | 4 | ||||
-rw-r--r-- | arch/mips/sibyte/sb1250/bus_watcher.c | 2 | ||||
-rw-r--r-- | arch/mips/sibyte/sb1250/irq.c | 30 | ||||
-rw-r--r-- | arch/mips/sibyte/sb1250/time.c | 34 | ||||
-rw-r--r-- | arch/mips/sibyte/swarm/setup.c | 8 |
7 files changed, 41 insertions, 102 deletions
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 8b1f41484923..2e8f6b2e2420 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c | |||
@@ -45,11 +45,9 @@ | |||
45 | */ | 45 | */ |
46 | 46 | ||
47 | 47 | ||
48 | #define shutdown_bcm1480_irq disable_bcm1480_irq | ||
49 | static void end_bcm1480_irq(unsigned int irq); | 48 | static void end_bcm1480_irq(unsigned int irq); |
50 | static void enable_bcm1480_irq(unsigned int irq); | 49 | static void enable_bcm1480_irq(unsigned int irq); |
51 | static void disable_bcm1480_irq(unsigned int irq); | 50 | static void disable_bcm1480_irq(unsigned int irq); |
52 | static unsigned int startup_bcm1480_irq(unsigned int irq); | ||
53 | static void ack_bcm1480_irq(unsigned int irq); | 51 | static void ack_bcm1480_irq(unsigned int irq); |
54 | #ifdef CONFIG_SMP | 52 | #ifdef CONFIG_SMP |
55 | static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask); | 53 | static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask); |
@@ -85,11 +83,10 @@ extern char sb1250_duart_present[]; | |||
85 | 83 | ||
86 | static struct irq_chip bcm1480_irq_type = { | 84 | static struct irq_chip bcm1480_irq_type = { |
87 | .typename = "BCM1480-IMR", | 85 | .typename = "BCM1480-IMR", |
88 | .startup = startup_bcm1480_irq, | ||
89 | .shutdown = shutdown_bcm1480_irq, | ||
90 | .enable = enable_bcm1480_irq, | ||
91 | .disable = disable_bcm1480_irq, | ||
92 | .ack = ack_bcm1480_irq, | 86 | .ack = ack_bcm1480_irq, |
87 | .mask = disable_bcm1480_irq, | ||
88 | .mask_ack = ack_bcm1480_irq, | ||
89 | .unmask = enable_bcm1480_irq, | ||
93 | .end = end_bcm1480_irq, | 90 | .end = end_bcm1480_irq, |
94 | #ifdef CONFIG_SMP | 91 | #ifdef CONFIG_SMP |
95 | .set_affinity = bcm1480_set_affinity | 92 | .set_affinity = bcm1480_set_affinity |
@@ -188,14 +185,6 @@ static void bcm1480_set_affinity(unsigned int irq, cpumask_t mask) | |||
188 | 185 | ||
189 | /*****************************************************************************/ | 186 | /*****************************************************************************/ |
190 | 187 | ||
191 | static unsigned int startup_bcm1480_irq(unsigned int irq) | ||
192 | { | ||
193 | bcm1480_unmask_irq(bcm1480_irq_owner[irq], irq); | ||
194 | |||
195 | return 0; /* never anything pending */ | ||
196 | } | ||
197 | |||
198 | |||
199 | static void disable_bcm1480_irq(unsigned int irq) | 188 | static void disable_bcm1480_irq(unsigned int irq) |
200 | { | 189 | { |
201 | bcm1480_mask_irq(bcm1480_irq_owner[irq], irq); | 190 | bcm1480_mask_irq(bcm1480_irq_owner[irq], irq); |
@@ -270,16 +259,9 @@ void __init init_bcm1480_irqs(void) | |||
270 | { | 259 | { |
271 | int i; | 260 | int i; |
272 | 261 | ||
273 | for (i = 0; i < NR_IRQS; i++) { | 262 | for (i = 0; i < BCM1480_NR_IRQS; i++) { |
274 | irq_desc[i].status = IRQ_DISABLED; | 263 | set_irq_chip(i, &bcm1480_irq_type); |
275 | irq_desc[i].action = 0; | 264 | bcm1480_irq_owner[i] = 0; |
276 | irq_desc[i].depth = 1; | ||
277 | if (i < BCM1480_NR_IRQS) { | ||
278 | irq_desc[i].chip = &bcm1480_irq_type; | ||
279 | bcm1480_irq_owner[i] = 0; | ||
280 | } else { | ||
281 | irq_desc[i].chip = &no_irq_chip; | ||
282 | } | ||
283 | } | 265 | } |
284 | } | 266 | } |
285 | 267 | ||
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c index bf12af46132e..6f3f71bf4244 100644 --- a/arch/mips/sibyte/bcm1480/time.c +++ b/arch/mips/sibyte/bcm1480/time.c | |||
@@ -47,6 +47,12 @@ | |||
47 | #define IMR_IP3_VAL K_BCM1480_INT_MAP_I1 | 47 | #define IMR_IP3_VAL K_BCM1480_INT_MAP_I1 |
48 | #define IMR_IP4_VAL K_BCM1480_INT_MAP_I2 | 48 | #define IMR_IP4_VAL K_BCM1480_INT_MAP_I2 |
49 | 49 | ||
50 | #ifdef CONFIG_SIMULATION | ||
51 | #define BCM1480_HPT_VALUE 50000 | ||
52 | #else | ||
53 | #define BCM1480_HPT_VALUE 1000000 | ||
54 | #endif | ||
55 | |||
50 | extern int bcm1480_steal_irq(int irq); | 56 | extern int bcm1480_steal_irq(int irq); |
51 | 57 | ||
52 | void bcm1480_time_init(void) | 58 | void bcm1480_time_init(void) |
@@ -59,11 +65,6 @@ void bcm1480_time_init(void) | |||
59 | BUG(); | 65 | BUG(); |
60 | } | 66 | } |
61 | 67 | ||
62 | if (!cpu) { | ||
63 | /* Use our own gettimeoffset() routine */ | ||
64 | do_gettimeoffset = bcm1480_gettimeoffset; | ||
65 | } | ||
66 | |||
67 | bcm1480_mask_irq(cpu, irq); | 68 | bcm1480_mask_irq(cpu, irq); |
68 | 69 | ||
69 | /* Map the timer interrupt to ip[4] of this cpu */ | 70 | /* Map the timer interrupt to ip[4] of this cpu */ |
@@ -74,11 +75,7 @@ void bcm1480_time_init(void) | |||
74 | /* Disable the timer and set up the count */ | 75 | /* Disable the timer and set up the count */ |
75 | __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); | 76 | __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); |
76 | __raw_writeq( | 77 | __raw_writeq( |
77 | #ifndef CONFIG_SIMULATION | 78 | BCM1480_HPT_VALUE/HZ |
78 | 1000000/HZ | ||
79 | #else | ||
80 | 50000/HZ | ||
81 | #endif | ||
82 | , IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); | 79 | , IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); |
83 | 80 | ||
84 | /* Set the timer running */ | 81 | /* Set the timer running */ |
@@ -97,8 +94,6 @@ void bcm1480_time_init(void) | |||
97 | */ | 94 | */ |
98 | } | 95 | } |
99 | 96 | ||
100 | #include <asm/sibyte/sb1250.h> | ||
101 | |||
102 | void bcm1480_timer_interrupt(void) | 97 | void bcm1480_timer_interrupt(void) |
103 | { | 98 | { |
104 | int cpu = smp_processor_id(); | 99 | int cpu = smp_processor_id(); |
@@ -122,16 +117,16 @@ void bcm1480_timer_interrupt(void) | |||
122 | } | 117 | } |
123 | } | 118 | } |
124 | 119 | ||
125 | /* | 120 | static cycle_t bcm1480_hpt_read(void) |
126 | * We use our own do_gettimeoffset() instead of the generic one, | ||
127 | * because the generic one does not work for SMP case. | ||
128 | * In addition, since we use general timer 0 for system time, | ||
129 | * we can get accurate intra-jiffy offset without calibration. | ||
130 | */ | ||
131 | unsigned long bcm1480_gettimeoffset(void) | ||
132 | { | 121 | { |
122 | /* We assume this function is called xtime_lock held. */ | ||
133 | unsigned long count = | 123 | unsigned long count = |
134 | __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT))); | 124 | __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT))); |
125 | return (jiffies + 1) * (BCM1480_HPT_VALUE / HZ) - count; | ||
126 | } | ||
135 | 127 | ||
136 | return 1000000/HZ - count; | 128 | void __init bcm1480_hpt_setup(void) |
129 | { | ||
130 | clocksource_mips.read = bcm1480_hpt_read; | ||
131 | mips_hpt_frequency = BCM1480_HPT_VALUE; | ||
137 | } | 132 | } |
diff --git a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c b/arch/mips/sibyte/sb1250/bcm1250_tbprof.c index 992e0d8dbb67..d1a906e683b2 100644 --- a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c +++ b/arch/mips/sibyte/sb1250/bcm1250_tbprof.c | |||
@@ -88,7 +88,7 @@ static void arm_tb(void) | |||
88 | sbp.tb_armed = 1; | 88 | sbp.tb_armed = 1; |
89 | } | 89 | } |
90 | 90 | ||
91 | static irqreturn_t sbprof_tb_intr(int irq, void *dev_id, struct pt_regs *regs) | 91 | static irqreturn_t sbprof_tb_intr(int irq, void *dev_id) |
92 | { | 92 | { |
93 | int i; | 93 | int i; |
94 | DBG(printk(DEVNAME ": tb_intr\n")); | 94 | DBG(printk(DEVNAME ": tb_intr\n")); |
@@ -138,7 +138,7 @@ static irqreturn_t sbprof_tb_intr(int irq, void *dev_id, struct pt_regs *regs) | |||
138 | return IRQ_HANDLED; | 138 | return IRQ_HANDLED; |
139 | } | 139 | } |
140 | 140 | ||
141 | static irqreturn_t sbprof_pc_intr(int irq, void *dev_id, struct pt_regs *regs) | 141 | static irqreturn_t sbprof_pc_intr(int irq, void *dev_id) |
142 | { | 142 | { |
143 | printk(DEVNAME ": unexpected pc_intr"); | 143 | printk(DEVNAME ": unexpected pc_intr"); |
144 | return IRQ_NONE; | 144 | return IRQ_NONE; |
diff --git a/arch/mips/sibyte/sb1250/bus_watcher.c b/arch/mips/sibyte/sb1250/bus_watcher.c index bb90649fbc48..45274bd3cd8b 100644 --- a/arch/mips/sibyte/sb1250/bus_watcher.c +++ b/arch/mips/sibyte/sb1250/bus_watcher.c | |||
@@ -171,7 +171,7 @@ static void create_proc_decoder(struct bw_stats_struct *stats) | |||
171 | * notes: possible re-entry due to multiple sources | 171 | * notes: possible re-entry due to multiple sources |
172 | * should check/indicate saturation | 172 | * should check/indicate saturation |
173 | */ | 173 | */ |
174 | static irqreturn_t sibyte_bw_int(int irq, void *data, struct pt_regs *regs) | 174 | static irqreturn_t sibyte_bw_int(int irq, void *data) |
175 | { | 175 | { |
176 | struct bw_stats_struct *stats = data; | 176 | struct bw_stats_struct *stats = data; |
177 | unsigned long cntr; | 177 | unsigned long cntr; |
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index d5d26770daf6..82ce7533053f 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c | |||
@@ -44,11 +44,9 @@ | |||
44 | */ | 44 | */ |
45 | 45 | ||
46 | 46 | ||
47 | #define shutdown_sb1250_irq disable_sb1250_irq | ||
48 | static void end_sb1250_irq(unsigned int irq); | 47 | static void end_sb1250_irq(unsigned int irq); |
49 | static void enable_sb1250_irq(unsigned int irq); | 48 | static void enable_sb1250_irq(unsigned int irq); |
50 | static void disable_sb1250_irq(unsigned int irq); | 49 | static void disable_sb1250_irq(unsigned int irq); |
51 | static unsigned int startup_sb1250_irq(unsigned int irq); | ||
52 | static void ack_sb1250_irq(unsigned int irq); | 50 | static void ack_sb1250_irq(unsigned int irq); |
53 | #ifdef CONFIG_SMP | 51 | #ifdef CONFIG_SMP |
54 | static void sb1250_set_affinity(unsigned int irq, cpumask_t mask); | 52 | static void sb1250_set_affinity(unsigned int irq, cpumask_t mask); |
@@ -70,11 +68,10 @@ extern char sb1250_duart_present[]; | |||
70 | 68 | ||
71 | static struct irq_chip sb1250_irq_type = { | 69 | static struct irq_chip sb1250_irq_type = { |
72 | .typename = "SB1250-IMR", | 70 | .typename = "SB1250-IMR", |
73 | .startup = startup_sb1250_irq, | ||
74 | .shutdown = shutdown_sb1250_irq, | ||
75 | .enable = enable_sb1250_irq, | ||
76 | .disable = disable_sb1250_irq, | ||
77 | .ack = ack_sb1250_irq, | 71 | .ack = ack_sb1250_irq, |
72 | .mask = disable_sb1250_irq, | ||
73 | .mask_ack = ack_sb1250_irq, | ||
74 | .unmask = enable_sb1250_irq, | ||
78 | .end = end_sb1250_irq, | 75 | .end = end_sb1250_irq, |
79 | #ifdef CONFIG_SMP | 76 | #ifdef CONFIG_SMP |
80 | .set_affinity = sb1250_set_affinity | 77 | .set_affinity = sb1250_set_affinity |
@@ -163,14 +160,6 @@ static void sb1250_set_affinity(unsigned int irq, cpumask_t mask) | |||
163 | 160 | ||
164 | /*****************************************************************************/ | 161 | /*****************************************************************************/ |
165 | 162 | ||
166 | static unsigned int startup_sb1250_irq(unsigned int irq) | ||
167 | { | ||
168 | sb1250_unmask_irq(sb1250_irq_owner[irq], irq); | ||
169 | |||
170 | return 0; /* never anything pending */ | ||
171 | } | ||
172 | |||
173 | |||
174 | static void disable_sb1250_irq(unsigned int irq) | 163 | static void disable_sb1250_irq(unsigned int irq) |
175 | { | 164 | { |
176 | sb1250_mask_irq(sb1250_irq_owner[irq], irq); | 165 | sb1250_mask_irq(sb1250_irq_owner[irq], irq); |
@@ -239,16 +228,9 @@ void __init init_sb1250_irqs(void) | |||
239 | { | 228 | { |
240 | int i; | 229 | int i; |
241 | 230 | ||
242 | for (i = 0; i < NR_IRQS; i++) { | 231 | for (i = 0; i < SB1250_NR_IRQS; i++) { |
243 | irq_desc[i].status = IRQ_DISABLED; | 232 | set_irq_chip(i, &sb1250_irq_type); |
244 | irq_desc[i].action = 0; | 233 | sb1250_irq_owner[i] = 0; |
245 | irq_desc[i].depth = 1; | ||
246 | if (i < SB1250_NR_IRQS) { | ||
247 | irq_desc[i].chip = &sb1250_irq_type; | ||
248 | sb1250_irq_owner[i] = 0; | ||
249 | } else { | ||
250 | irq_desc[i].chip = &no_irq_chip; | ||
251 | } | ||
252 | } | 234 | } |
253 | } | 235 | } |
254 | 236 | ||
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c index 0ccf1796dd78..2efffe15ff23 100644 --- a/arch/mips/sibyte/sb1250/time.c +++ b/arch/mips/sibyte/sb1250/time.c | |||
@@ -47,15 +47,11 @@ | |||
47 | 47 | ||
48 | #define SB1250_HPT_NUM 3 | 48 | #define SB1250_HPT_NUM 3 |
49 | #define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */ | 49 | #define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */ |
50 | #define SB1250_HPT_SHIFT ((sizeof(unsigned int)*8)-V_SCD_TIMER_WIDTH) | ||
51 | 50 | ||
52 | 51 | ||
53 | extern int sb1250_steal_irq(int irq); | 52 | extern int sb1250_steal_irq(int irq); |
54 | 53 | ||
55 | static unsigned int sb1250_hpt_read(void); | 54 | static cycle_t sb1250_hpt_read(void); |
56 | static void sb1250_hpt_init(unsigned int); | ||
57 | |||
58 | static unsigned int hpt_offset; | ||
59 | 55 | ||
60 | void __init sb1250_hpt_setup(void) | 56 | void __init sb1250_hpt_setup(void) |
61 | { | 57 | { |
@@ -69,13 +65,9 @@ void __init sb1250_hpt_setup(void) | |||
69 | __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, | 65 | __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, |
70 | IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG))); | 66 | IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG))); |
71 | 67 | ||
72 | /* | 68 | mips_hpt_frequency = V_SCD_TIMER_FREQ; |
73 | * we need to fill 32 bits, so just use the upper 23 bits and pretend | 69 | clocksource_mips.read = sb1250_hpt_read; |
74 | * the timer is going 512Mhz instead of 1Mhz | 70 | clocksource_mips.mask = M_SCD_TIMER_INIT; |
75 | */ | ||
76 | mips_hpt_frequency = V_SCD_TIMER_FREQ << SB1250_HPT_SHIFT; | ||
77 | mips_hpt_init = sb1250_hpt_init; | ||
78 | mips_hpt_read = sb1250_hpt_read; | ||
79 | } | 71 | } |
80 | } | 72 | } |
81 | 73 | ||
@@ -149,25 +141,13 @@ void sb1250_timer_interrupt(void) | |||
149 | 141 | ||
150 | /* | 142 | /* |
151 | * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over | 143 | * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over |
152 | * again. There's no easy way to set to a specific value so store init value | 144 | * again. |
153 | * in hpt_offset and subtract each time. | ||
154 | * | ||
155 | * Note: Timer isn't full 32bits so shift it into the upper part making | ||
156 | * it appear to run at a higher frequency. | ||
157 | */ | 145 | */ |
158 | static unsigned int sb1250_hpt_read(void) | 146 | static cycle_t sb1250_hpt_read(void) |
159 | { | 147 | { |
160 | unsigned int count; | 148 | unsigned int count; |
161 | 149 | ||
162 | count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT)))); | 150 | count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT)))); |
163 | 151 | ||
164 | count = (SB1250_HPT_VALUE - count) << SB1250_HPT_SHIFT; | 152 | return SB1250_HPT_VALUE - count; |
165 | |||
166 | return count - hpt_offset; | ||
167 | } | ||
168 | |||
169 | static void sb1250_hpt_init(unsigned int count) | ||
170 | { | ||
171 | hpt_offset = count; | ||
172 | return; | ||
173 | } | 153 | } |
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c index ac342f5643c9..defa1f1452ad 100644 --- a/arch/mips/sibyte/swarm/setup.c +++ b/arch/mips/sibyte/swarm/setup.c | |||
@@ -43,7 +43,7 @@ | |||
43 | #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) | 43 | #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) |
44 | #include <asm/sibyte/sb1250_regs.h> | 44 | #include <asm/sibyte/sb1250_regs.h> |
45 | #else | 45 | #else |
46 | #error invalid SiByte board configuation | 46 | #error invalid SiByte board configuration |
47 | #endif | 47 | #endif |
48 | #include <asm/sibyte/sb1250_genbus.h> | 48 | #include <asm/sibyte/sb1250_genbus.h> |
49 | #include <asm/sibyte/board.h> | 49 | #include <asm/sibyte/board.h> |
@@ -53,7 +53,7 @@ extern void bcm1480_setup(void); | |||
53 | #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) | 53 | #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) |
54 | extern void sb1250_setup(void); | 54 | extern void sb1250_setup(void); |
55 | #else | 55 | #else |
56 | #error invalid SiByte board configuation | 56 | #error invalid SiByte board configuration |
57 | #endif | 57 | #endif |
58 | 58 | ||
59 | extern int xicor_probe(void); | 59 | extern int xicor_probe(void); |
@@ -90,7 +90,7 @@ void __init plat_timer_setup(struct irqaction *irq) | |||
90 | #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) | 90 | #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) |
91 | sb1250_time_init(); | 91 | sb1250_time_init(); |
92 | #else | 92 | #else |
93 | #error invalid SiByte board configuation | 93 | #error invalid SiByte board configuration |
94 | #endif | 94 | #endif |
95 | } | 95 | } |
96 | 96 | ||
@@ -111,7 +111,7 @@ void __init plat_mem_setup(void) | |||
111 | #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) | 111 | #elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X) |
112 | sb1250_setup(); | 112 | sb1250_setup(); |
113 | #else | 113 | #else |
114 | #error invalid SiByte board configuation | 114 | #error invalid SiByte board configuration |
115 | #endif | 115 | #endif |
116 | 116 | ||
117 | panic_timeout = 5; /* For debug. */ | 117 | panic_timeout = 5; /* For debug. */ |