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-rw-r--r--arch/mips/sibyte/bcm1480/irq.c14
-rw-r--r--arch/mips/sibyte/common/sb_tbprof.c1
-rw-r--r--arch/mips/sibyte/sb1250/irq.c14
3 files changed, 14 insertions, 15 deletions
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index 4070268aa769..06e25d949768 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -73,14 +73,14 @@ static struct irq_chip bcm1480_irq_type = {
73/* Store the CPU id (not the logical number) */ 73/* Store the CPU id (not the logical number) */
74int bcm1480_irq_owner[BCM1480_NR_IRQS]; 74int bcm1480_irq_owner[BCM1480_NR_IRQS];
75 75
76DEFINE_SPINLOCK(bcm1480_imr_lock); 76static DEFINE_RAW_SPINLOCK(bcm1480_imr_lock);
77 77
78void bcm1480_mask_irq(int cpu, int irq) 78void bcm1480_mask_irq(int cpu, int irq)
79{ 79{
80 unsigned long flags, hl_spacing; 80 unsigned long flags, hl_spacing;
81 u64 cur_ints; 81 u64 cur_ints;
82 82
83 spin_lock_irqsave(&bcm1480_imr_lock, flags); 83 raw_spin_lock_irqsave(&bcm1480_imr_lock, flags);
84 hl_spacing = 0; 84 hl_spacing = 0;
85 if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) { 85 if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) {
86 hl_spacing = BCM1480_IMR_HL_SPACING; 86 hl_spacing = BCM1480_IMR_HL_SPACING;
@@ -89,7 +89,7 @@ void bcm1480_mask_irq(int cpu, int irq)
89 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); 89 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
90 cur_ints |= (((u64) 1) << irq); 90 cur_ints |= (((u64) 1) << irq);
91 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); 91 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
92 spin_unlock_irqrestore(&bcm1480_imr_lock, flags); 92 raw_spin_unlock_irqrestore(&bcm1480_imr_lock, flags);
93} 93}
94 94
95void bcm1480_unmask_irq(int cpu, int irq) 95void bcm1480_unmask_irq(int cpu, int irq)
@@ -97,7 +97,7 @@ void bcm1480_unmask_irq(int cpu, int irq)
97 unsigned long flags, hl_spacing; 97 unsigned long flags, hl_spacing;
98 u64 cur_ints; 98 u64 cur_ints;
99 99
100 spin_lock_irqsave(&bcm1480_imr_lock, flags); 100 raw_spin_lock_irqsave(&bcm1480_imr_lock, flags);
101 hl_spacing = 0; 101 hl_spacing = 0;
102 if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) { 102 if ((irq >= BCM1480_NR_IRQS_HALF) && (irq <= BCM1480_NR_IRQS)) {
103 hl_spacing = BCM1480_IMR_HL_SPACING; 103 hl_spacing = BCM1480_IMR_HL_SPACING;
@@ -106,7 +106,7 @@ void bcm1480_unmask_irq(int cpu, int irq)
106 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); 106 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
107 cur_ints &= ~(((u64) 1) << irq); 107 cur_ints &= ~(((u64) 1) << irq);
108 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); 108 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing));
109 spin_unlock_irqrestore(&bcm1480_imr_lock, flags); 109 raw_spin_unlock_irqrestore(&bcm1480_imr_lock, flags);
110} 110}
111 111
112#ifdef CONFIG_SMP 112#ifdef CONFIG_SMP
@@ -123,7 +123,7 @@ static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
123 cpu = cpu_logical_map(i); 123 cpu = cpu_logical_map(i);
124 124
125 /* Protect against other affinity changers and IMR manipulation */ 125 /* Protect against other affinity changers and IMR manipulation */
126 spin_lock_irqsave(&bcm1480_imr_lock, flags); 126 raw_spin_lock_irqsave(&bcm1480_imr_lock, flags);
127 127
128 /* Swizzle each CPU's IMR (but leave the IP selection alone) */ 128 /* Swizzle each CPU's IMR (but leave the IP selection alone) */
129 old_cpu = bcm1480_irq_owner[irq]; 129 old_cpu = bcm1480_irq_owner[irq];
@@ -148,7 +148,7 @@ static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
148 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); 148 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING)));
149 } 149 }
150 } 150 }
151 spin_unlock_irqrestore(&bcm1480_imr_lock, flags); 151 raw_spin_unlock_irqrestore(&bcm1480_imr_lock, flags);
152 152
153 return 0; 153 return 0;
154} 154}
diff --git a/arch/mips/sibyte/common/sb_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c
index 15ea778b5e66..ed2453eab5cb 100644
--- a/arch/mips/sibyte/common/sb_tbprof.c
+++ b/arch/mips/sibyte/common/sb_tbprof.c
@@ -28,7 +28,6 @@
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/interrupt.h> 29#include <linux/interrupt.h>
30#include <linux/slab.h> 30#include <linux/slab.h>
31#include <linux/smp_lock.h>
32#include <linux/vmalloc.h> 31#include <linux/vmalloc.h>
33#include <linux/fs.h> 32#include <linux/fs.h>
34#include <linux/errno.h> 33#include <linux/errno.h>
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 5e7f2016cceb..ab44a2f59ee4 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -72,20 +72,20 @@ static struct irq_chip sb1250_irq_type = {
72/* Store the CPU id (not the logical number) */ 72/* Store the CPU id (not the logical number) */
73int sb1250_irq_owner[SB1250_NR_IRQS]; 73int sb1250_irq_owner[SB1250_NR_IRQS];
74 74
75DEFINE_SPINLOCK(sb1250_imr_lock); 75static DEFINE_RAW_SPINLOCK(sb1250_imr_lock);
76 76
77void sb1250_mask_irq(int cpu, int irq) 77void sb1250_mask_irq(int cpu, int irq)
78{ 78{
79 unsigned long flags; 79 unsigned long flags;
80 u64 cur_ints; 80 u64 cur_ints;
81 81
82 spin_lock_irqsave(&sb1250_imr_lock, flags); 82 raw_spin_lock_irqsave(&sb1250_imr_lock, flags);
83 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + 83 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) +
84 R_IMR_INTERRUPT_MASK)); 84 R_IMR_INTERRUPT_MASK));
85 cur_ints |= (((u64) 1) << irq); 85 cur_ints |= (((u64) 1) << irq);
86 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + 86 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) +
87 R_IMR_INTERRUPT_MASK)); 87 R_IMR_INTERRUPT_MASK));
88 spin_unlock_irqrestore(&sb1250_imr_lock, flags); 88 raw_spin_unlock_irqrestore(&sb1250_imr_lock, flags);
89} 89}
90 90
91void sb1250_unmask_irq(int cpu, int irq) 91void sb1250_unmask_irq(int cpu, int irq)
@@ -93,13 +93,13 @@ void sb1250_unmask_irq(int cpu, int irq)
93 unsigned long flags; 93 unsigned long flags;
94 u64 cur_ints; 94 u64 cur_ints;
95 95
96 spin_lock_irqsave(&sb1250_imr_lock, flags); 96 raw_spin_lock_irqsave(&sb1250_imr_lock, flags);
97 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + 97 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) +
98 R_IMR_INTERRUPT_MASK)); 98 R_IMR_INTERRUPT_MASK));
99 cur_ints &= ~(((u64) 1) << irq); 99 cur_ints &= ~(((u64) 1) << irq);
100 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + 100 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) +
101 R_IMR_INTERRUPT_MASK)); 101 R_IMR_INTERRUPT_MASK));
102 spin_unlock_irqrestore(&sb1250_imr_lock, flags); 102 raw_spin_unlock_irqrestore(&sb1250_imr_lock, flags);
103} 103}
104 104
105#ifdef CONFIG_SMP 105#ifdef CONFIG_SMP
@@ -115,7 +115,7 @@ static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
115 cpu = cpu_logical_map(i); 115 cpu = cpu_logical_map(i);
116 116
117 /* Protect against other affinity changers and IMR manipulation */ 117 /* Protect against other affinity changers and IMR manipulation */
118 spin_lock_irqsave(&sb1250_imr_lock, flags); 118 raw_spin_lock_irqsave(&sb1250_imr_lock, flags);
119 119
120 /* Swizzle each CPU's IMR (but leave the IP selection alone) */ 120 /* Swizzle each CPU's IMR (but leave the IP selection alone) */
121 old_cpu = sb1250_irq_owner[irq]; 121 old_cpu = sb1250_irq_owner[irq];
@@ -137,7 +137,7 @@ static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
137 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + 137 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) +
138 R_IMR_INTERRUPT_MASK)); 138 R_IMR_INTERRUPT_MASK));
139 } 139 }
140 spin_unlock_irqrestore(&sb1250_imr_lock, flags); 140 raw_spin_unlock_irqrestore(&sb1250_imr_lock, flags);
141 141
142 return 0; 142 return 0;
143} 143}