diff options
Diffstat (limited to 'arch/mips/sibyte')
-rw-r--r-- | arch/mips/sibyte/sb1250/irq.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 5dae2ecb83ff..ab44a2f59ee4 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c | |||
@@ -72,20 +72,20 @@ static struct irq_chip sb1250_irq_type = { | |||
72 | /* Store the CPU id (not the logical number) */ | 72 | /* Store the CPU id (not the logical number) */ |
73 | int sb1250_irq_owner[SB1250_NR_IRQS]; | 73 | int sb1250_irq_owner[SB1250_NR_IRQS]; |
74 | 74 | ||
75 | static DEFINE_SPINLOCK(sb1250_imr_lock); | 75 | static DEFINE_RAW_SPINLOCK(sb1250_imr_lock); |
76 | 76 | ||
77 | void sb1250_mask_irq(int cpu, int irq) | 77 | void sb1250_mask_irq(int cpu, int irq) |
78 | { | 78 | { |
79 | unsigned long flags; | 79 | unsigned long flags; |
80 | u64 cur_ints; | 80 | u64 cur_ints; |
81 | 81 | ||
82 | spin_lock_irqsave(&sb1250_imr_lock, flags); | 82 | raw_spin_lock_irqsave(&sb1250_imr_lock, flags); |
83 | cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + | 83 | cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + |
84 | R_IMR_INTERRUPT_MASK)); | 84 | R_IMR_INTERRUPT_MASK)); |
85 | cur_ints |= (((u64) 1) << irq); | 85 | cur_ints |= (((u64) 1) << irq); |
86 | ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + | 86 | ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + |
87 | R_IMR_INTERRUPT_MASK)); | 87 | R_IMR_INTERRUPT_MASK)); |
88 | spin_unlock_irqrestore(&sb1250_imr_lock, flags); | 88 | raw_spin_unlock_irqrestore(&sb1250_imr_lock, flags); |
89 | } | 89 | } |
90 | 90 | ||
91 | void sb1250_unmask_irq(int cpu, int irq) | 91 | void sb1250_unmask_irq(int cpu, int irq) |
@@ -93,13 +93,13 @@ void sb1250_unmask_irq(int cpu, int irq) | |||
93 | unsigned long flags; | 93 | unsigned long flags; |
94 | u64 cur_ints; | 94 | u64 cur_ints; |
95 | 95 | ||
96 | spin_lock_irqsave(&sb1250_imr_lock, flags); | 96 | raw_spin_lock_irqsave(&sb1250_imr_lock, flags); |
97 | cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + | 97 | cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + |
98 | R_IMR_INTERRUPT_MASK)); | 98 | R_IMR_INTERRUPT_MASK)); |
99 | cur_ints &= ~(((u64) 1) << irq); | 99 | cur_ints &= ~(((u64) 1) << irq); |
100 | ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + | 100 | ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + |
101 | R_IMR_INTERRUPT_MASK)); | 101 | R_IMR_INTERRUPT_MASK)); |
102 | spin_unlock_irqrestore(&sb1250_imr_lock, flags); | 102 | raw_spin_unlock_irqrestore(&sb1250_imr_lock, flags); |
103 | } | 103 | } |
104 | 104 | ||
105 | #ifdef CONFIG_SMP | 105 | #ifdef CONFIG_SMP |
@@ -115,7 +115,7 @@ static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
115 | cpu = cpu_logical_map(i); | 115 | cpu = cpu_logical_map(i); |
116 | 116 | ||
117 | /* Protect against other affinity changers and IMR manipulation */ | 117 | /* Protect against other affinity changers and IMR manipulation */ |
118 | spin_lock_irqsave(&sb1250_imr_lock, flags); | 118 | raw_spin_lock_irqsave(&sb1250_imr_lock, flags); |
119 | 119 | ||
120 | /* Swizzle each CPU's IMR (but leave the IP selection alone) */ | 120 | /* Swizzle each CPU's IMR (but leave the IP selection alone) */ |
121 | old_cpu = sb1250_irq_owner[irq]; | 121 | old_cpu = sb1250_irq_owner[irq]; |
@@ -137,7 +137,7 @@ static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
137 | ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + | 137 | ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + |
138 | R_IMR_INTERRUPT_MASK)); | 138 | R_IMR_INTERRUPT_MASK)); |
139 | } | 139 | } |
140 | spin_unlock_irqrestore(&sb1250_imr_lock, flags); | 140 | raw_spin_unlock_irqrestore(&sb1250_imr_lock, flags); |
141 | 141 | ||
142 | return 0; | 142 | return 0; |
143 | } | 143 | } |