3 files changed, 17 insertions, 19 deletions

diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index f9bd9f074517..f6d2e19592ea 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -254,8 +254,7 @@ void __init init_sb1250_irqs(void)
 }
 
 
-static irqreturn_t  sb1250_dummy_handler(int irq, void *dev_id,
-        struct pt_regs *regs)
+static irqreturn_t  sb1250_dummy_handler(int irq, void *dev_id)
 {
         return IRQ_NONE;
 }
@@ -403,7 +402,7 @@ void __init arch_init_irq(void)
 #define duart_out(reg, val)     csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
 #define duart_in(reg)           csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
 
-static void sb1250_kgdb_interrupt(struct pt_regs *regs)
+static void sb1250_kgdb_interrupt(void)
 {
         /*
          * Clear break-change status (allow some time for the remote
@@ -414,16 +413,15 @@ static void sb1250_kgdb_interrupt(struct pt_regs *regs)
         mdelay(500);
         duart_out(R_DUART_CMD, V_DUART_MISC_CMD_RESET_BREAK_INT |
                                 M_DUART_RX_EN | M_DUART_TX_EN);
-        set_async_breakpoint(&regs->cp0_epc);
+        set_async_breakpoint(&get_irq_regs()->cp0_epc);
 }
 
 #endif  /* CONFIG_KGDB */
 
-extern void sb1250_timer_interrupt(struct pt_regs *regs);
-extern void sb1250_mailbox_interrupt(struct pt_regs *regs);
-extern void sb1250_kgdb_interrupt(struct pt_regs *regs);
+extern void sb1250_timer_interrupt(void);
+extern void sb1250_mailbox_interrupt(void);
 
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
 {
         unsigned int pending;
 
@@ -446,21 +444,21 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
 
 #ifdef CONFIG_SIBYTE_SB1250_PROF
         if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */
-                sbprof_cpu_intr(exception_epc(regs));
+                sbprof_cpu_intr();
         else
 #endif
 
         if (pending & CAUSEF_IP4)
-                sb1250_timer_interrupt(regs);
+                sb1250_timer_interrupt();
 
 #ifdef CONFIG_SMP
         else if (pending & CAUSEF_IP3)
-                sb1250_mailbox_interrupt(regs);
+                sb1250_mailbox_interrupt();
 #endif
 
 #ifdef CONFIG_KGDB
         else if (pending & CAUSEF_IP6)                  /* KGDB (uart 1) */
-                sb1250_kgdb_interrupt(regs);
+                sb1250_kgdb_interrupt();
 #endif
 
         else if (pending & CAUSEF_IP2) {
@@ -475,9 +473,9 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
                 mask = __raw_readq(IOADDR(A_IMR_REGISTER(smp_processor_id(),
                                               R_IMR_INTERRUPT_STATUS_BASE)));
                 if (mask)
-                        do_IRQ(fls64(mask) - 1, regs);
+                        do_IRQ(fls64(mask) - 1);
                 else
-                        spurious_interrupt(regs);
+                        spurious_interrupt();
         } else
-                spurious_interrupt(regs);
+                spurious_interrupt();
 }
diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c
index f859db02d3c9..c38e1f34460d 100644
--- a/arch/mips/sibyte/sb1250/smp.c
+++ b/arch/mips/sibyte/sb1250/smp.c
@@ -76,7 +76,7 @@ void core_send_ipi(int cpu, unsigned int action)
         __raw_writeq((((u64)action) << 48), mailbox_set_regs[cpu]);
 }
 
-void sb1250_mailbox_interrupt(struct pt_regs *regs)
+void sb1250_mailbox_interrupt(void)
 {
         int cpu = smp_processor_id();
         unsigned int action;
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index 4b669dc86ef4..0d17aec03dd7 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -125,7 +125,7 @@ void sb1250_time_init(void)
          */
 }
 
-void sb1250_timer_interrupt(struct pt_regs *regs)
+void sb1250_timer_interrupt(void)
 {
         int cpu = smp_processor_id();
         int irq = K_INT_TIMER_0 + cpu;
@@ -138,13 +138,13 @@ void sb1250_timer_interrupt(struct pt_regs *regs)
                 /*
                  * CPU 0 handles the global timer interrupt job
                  */
-                ll_timer_interrupt(irq, regs);
+                ll_timer_interrupt(irq);
         }
         else {
                 /*
                  * other CPUs should just do profiling and process accounting
                  */
-                ll_local_timer_interrupt(irq, regs);
+                ll_local_timer_interrupt(irq);
         }
 }