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-rw-r--r--arch/mips/sibyte/sb1250/time.c28
1 files changed, 4 insertions, 24 deletions
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index 0ccf1796dd78..bcb74f2c1948 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -47,15 +47,11 @@
47 47
48#define SB1250_HPT_NUM 3 48#define SB1250_HPT_NUM 3
49#define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */ 49#define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */
50#define SB1250_HPT_SHIFT ((sizeof(unsigned int)*8)-V_SCD_TIMER_WIDTH)
51 50
52 51
53extern int sb1250_steal_irq(int irq); 52extern int sb1250_steal_irq(int irq);
54 53
55static unsigned int sb1250_hpt_read(void); 54static unsigned int sb1250_hpt_read(void);
56static void sb1250_hpt_init(unsigned int);
57
58static unsigned int hpt_offset;
59 55
60void __init sb1250_hpt_setup(void) 56void __init sb1250_hpt_setup(void)
61{ 57{
@@ -69,13 +65,9 @@ void __init sb1250_hpt_setup(void)
69 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, 65 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
70 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG))); 66 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG)));
71 67
72 /* 68 mips_hpt_frequency = V_SCD_TIMER_FREQ;
73 * we need to fill 32 bits, so just use the upper 23 bits and pretend
74 * the timer is going 512Mhz instead of 1Mhz
75 */
76 mips_hpt_frequency = V_SCD_TIMER_FREQ << SB1250_HPT_SHIFT;
77 mips_hpt_init = sb1250_hpt_init;
78 mips_hpt_read = sb1250_hpt_read; 69 mips_hpt_read = sb1250_hpt_read;
70 mips_hpt_mask = M_SCD_TIMER_INIT;
79 } 71 }
80} 72}
81 73
@@ -149,11 +141,7 @@ void sb1250_timer_interrupt(void)
149 141
150/* 142/*
151 * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over 143 * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over
152 * again. There's no easy way to set to a specific value so store init value 144 * again.
153 * in hpt_offset and subtract each time.
154 *
155 * Note: Timer isn't full 32bits so shift it into the upper part making
156 * it appear to run at a higher frequency.
157 */ 145 */
158static unsigned int sb1250_hpt_read(void) 146static unsigned int sb1250_hpt_read(void)
159{ 147{
@@ -161,13 +149,5 @@ static unsigned int sb1250_hpt_read(void)
161 149
162 count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT)))); 150 count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT))));
163 151
164 count = (SB1250_HPT_VALUE - count) << SB1250_HPT_SHIFT; 152 return SB1250_HPT_VALUE - count;
165
166 return count - hpt_offset;
167}
168
169static void sb1250_hpt_init(unsigned int count)
170{
171 hpt_offset = count;
172 return;
173} 153}