diff options
Diffstat (limited to 'arch/mips/sibyte/bcm1480/time.c')
-rw-r--r-- | arch/mips/sibyte/bcm1480/time.c | 117 |
1 files changed, 50 insertions, 67 deletions
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c index c730744aa474..610f0253954d 100644 --- a/arch/mips/sibyte/bcm1480/time.c +++ b/arch/mips/sibyte/bcm1480/time.c | |||
@@ -15,22 +15,12 @@ | |||
15 | * along with this program; if not, write to the Free Software | 15 | * along with this program; if not, write to the Free Software |
16 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 16 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
17 | */ | 17 | */ |
18 | |||
19 | /* | ||
20 | * These are routines to set up and handle interrupts from the | ||
21 | * bcm1480 general purpose timer 0. We're using the timer as a | ||
22 | * system clock, so we set it up to run at 100 Hz. On every | ||
23 | * interrupt, we update our idea of what the time of day is, | ||
24 | * then call do_timer() in the architecture-independent kernel | ||
25 | * code to do general bookkeeping (e.g. update jiffies, run | ||
26 | * bottom halves, etc.) | ||
27 | */ | ||
28 | #include <linux/clockchips.h> | 18 | #include <linux/clockchips.h> |
29 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
20 | #include <linux/irq.h> | ||
30 | #include <linux/percpu.h> | 21 | #include <linux/percpu.h> |
31 | #include <linux/spinlock.h> | 22 | #include <linux/spinlock.h> |
32 | 23 | ||
33 | #include <asm/irq.h> | ||
34 | #include <asm/addrspace.h> | 24 | #include <asm/addrspace.h> |
35 | #include <asm/time.h> | 25 | #include <asm/time.h> |
36 | #include <asm/io.h> | 26 | #include <asm/io.h> |
@@ -47,33 +37,10 @@ | |||
47 | #define IMR_IP3_VAL K_BCM1480_INT_MAP_I1 | 37 | #define IMR_IP3_VAL K_BCM1480_INT_MAP_I1 |
48 | #define IMR_IP4_VAL K_BCM1480_INT_MAP_I2 | 38 | #define IMR_IP4_VAL K_BCM1480_INT_MAP_I2 |
49 | 39 | ||
50 | #ifdef CONFIG_SIMULATION | ||
51 | #define BCM1480_HPT_VALUE 50000 | ||
52 | #else | ||
53 | #define BCM1480_HPT_VALUE 1000000 | ||
54 | #endif | ||
55 | |||
56 | extern int bcm1480_steal_irq(int irq); | 40 | extern int bcm1480_steal_irq(int irq); |
57 | 41 | ||
58 | void __init plat_time_init(void) | ||
59 | { | ||
60 | unsigned int cpu = smp_processor_id(); | ||
61 | unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu; | ||
62 | |||
63 | BUG_ON(cpu > 3); /* Only have 4 general purpose timers */ | ||
64 | |||
65 | bcm1480_mask_irq(cpu, irq); | ||
66 | |||
67 | /* Map the timer interrupt to ip[4] of this cpu */ | ||
68 | __raw_writeq(IMR_IP4_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) | ||
69 | + (irq<<3))); | ||
70 | |||
71 | bcm1480_unmask_irq(cpu, irq); | ||
72 | bcm1480_steal_irq(irq); | ||
73 | } | ||
74 | |||
75 | /* | 42 | /* |
76 | * The general purpose timer ticks at 1 Mhz independent if | 43 | * The general purpose timer ticks at 1MHz independent if |
77 | * the rest of the system | 44 | * the rest of the system |
78 | */ | 45 | */ |
79 | static void sibyte_set_mode(enum clock_event_mode mode, | 46 | static void sibyte_set_mode(enum clock_event_mode mode, |
@@ -88,7 +55,7 @@ static void sibyte_set_mode(enum clock_event_mode mode, | |||
88 | switch (mode) { | 55 | switch (mode) { |
89 | case CLOCK_EVT_MODE_PERIODIC: | 56 | case CLOCK_EVT_MODE_PERIODIC: |
90 | __raw_writeq(0, timer_cfg); | 57 | __raw_writeq(0, timer_cfg); |
91 | __raw_writeq(BCM1480_HPT_VALUE / HZ - 1, timer_init); | 58 | __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1, timer_init); |
92 | __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, | 59 | __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, |
93 | timer_cfg); | 60 | timer_cfg); |
94 | break; | 61 | break; |
@@ -121,80 +88,96 @@ static int sibyte_next_event(unsigned long delta, struct clock_event_device *cd) | |||
121 | return res; | 88 | return res; |
122 | } | 89 | } |
123 | 90 | ||
124 | static DEFINE_PER_CPU(struct clock_event_device, sibyte_hpt_clockevent); | ||
125 | |||
126 | static irqreturn_t sibyte_counter_handler(int irq, void *dev_id) | 91 | static irqreturn_t sibyte_counter_handler(int irq, void *dev_id) |
127 | { | 92 | { |
128 | unsigned int cpu = smp_processor_id(); | 93 | unsigned int cpu = smp_processor_id(); |
129 | struct clock_event_device *cd = &per_cpu(sibyte_hpt_clockevent, cpu); | 94 | struct clock_event_device *cd = dev_id; |
95 | void __iomem *timer_cfg; | ||
96 | |||
97 | timer_cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); | ||
130 | 98 | ||
131 | /* Reset the timer */ | 99 | /* Reset the timer */ |
132 | __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, | 100 | __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, |
133 | IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); | 101 | timer_cfg); |
134 | cd->event_handler(cd); | 102 | cd->event_handler(cd); |
135 | 103 | ||
136 | return IRQ_HANDLED; | 104 | return IRQ_HANDLED; |
137 | } | 105 | } |
138 | 106 | ||
139 | static struct irqaction sibyte_counter_irqaction = { | 107 | static DEFINE_PER_CPU(struct clock_event_device, sibyte_hpt_clockevent); |
140 | .handler = sibyte_counter_handler, | 108 | static DEFINE_PER_CPU(struct irqaction, sibyte_hpt_irqaction); |
141 | .flags = IRQF_DISABLED | IRQF_PERCPU, | 109 | static DEFINE_PER_CPU(char [18], sibyte_hpt_name); |
142 | .name = "timer", | ||
143 | }; | ||
144 | 110 | ||
145 | /* | ||
146 | * This interrupt is "special" in that it doesn't use the request_irq | ||
147 | * way to hook the irq line. The timer interrupt is initialized early | ||
148 | * enough to make this a major pain, and it's also firing enough to | ||
149 | * warrant a bit of special case code. bcm1480_timer_interrupt is | ||
150 | * called directly from irq_handler.S when IP[4] is set during an | ||
151 | * interrupt | ||
152 | */ | ||
153 | void __cpuinit sb1480_clockevent_init(void) | 111 | void __cpuinit sb1480_clockevent_init(void) |
154 | { | 112 | { |
155 | unsigned int cpu = smp_processor_id(); | 113 | unsigned int cpu = smp_processor_id(); |
156 | unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu; | 114 | unsigned int irq = K_BCM1480_INT_TIMER_0 + cpu; |
115 | struct irqaction *action = &per_cpu(sibyte_hpt_irqaction, cpu); | ||
157 | struct clock_event_device *cd = &per_cpu(sibyte_hpt_clockevent, cpu); | 116 | struct clock_event_device *cd = &per_cpu(sibyte_hpt_clockevent, cpu); |
117 | unsigned char *name = per_cpu(sibyte_hpt_name, cpu); | ||
118 | |||
119 | BUG_ON(cpu > 3); /* Only have 4 general purpose timers */ | ||
158 | 120 | ||
159 | cd->name = "bcm1480-counter"; | 121 | sprintf(name, "bcm1480-counter %d", cpu); |
122 | cd->name = name; | ||
160 | cd->features = CLOCK_EVT_FEAT_PERIODIC | | 123 | cd->features = CLOCK_EVT_FEAT_PERIODIC | |
161 | CLOCK_EVT_MODE_ONESHOT; | 124 | CLOCK_EVT_MODE_ONESHOT; |
125 | clockevent_set_clock(cd, V_SCD_TIMER_FREQ); | ||
126 | cd->max_delta_ns = clockevent_delta2ns(0x7fffff, cd); | ||
127 | cd->min_delta_ns = clockevent_delta2ns(1, cd); | ||
128 | cd->rating = 200; | ||
129 | cd->irq = irq; | ||
130 | cd->cpumask = cpumask_of_cpu(cpu); | ||
162 | cd->set_next_event = sibyte_next_event; | 131 | cd->set_next_event = sibyte_next_event; |
163 | cd->set_mode = sibyte_set_mode; | 132 | cd->set_mode = sibyte_set_mode; |
164 | cd->irq = irq; | 133 | clockevents_register_device(cd); |
165 | clockevent_set_clock(cd, BCM1480_HPT_VALUE); | 134 | |
135 | bcm1480_mask_irq(cpu, irq); | ||
136 | |||
137 | /* | ||
138 | * Map timer interrupt to IP[4] of this cpu | ||
139 | */ | ||
140 | __raw_writeq(IMR_IP4_VAL, | ||
141 | IOADDR(A_BCM1480_IMR_REGISTER(cpu, | ||
142 | R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) + (irq << 3))); | ||
166 | 143 | ||
167 | setup_irq(irq, &sibyte_counter_irqaction); | 144 | bcm1480_unmask_irq(cpu, irq); |
145 | bcm1480_steal_irq(irq); | ||
146 | |||
147 | action->handler = sibyte_counter_handler; | ||
148 | action->flags = IRQF_DISABLED | IRQF_PERCPU; | ||
149 | action->name = name; | ||
150 | action->dev_id = cd; | ||
151 | setup_irq(irq, action); | ||
168 | } | 152 | } |
169 | 153 | ||
170 | static cycle_t bcm1480_hpt_read(void) | 154 | static cycle_t bcm1480_hpt_read(void) |
171 | { | 155 | { |
172 | /* We assume this function is called xtime_lock held. */ | 156 | return (cycle_t) __raw_readq(IOADDR(A_SCD_ZBBUS_CYCLE_COUNT)); |
173 | unsigned long count = | ||
174 | __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT))); | ||
175 | return (jiffies + 1) * (BCM1480_HPT_VALUE / HZ) - count; | ||
176 | } | 157 | } |
177 | 158 | ||
178 | struct clocksource bcm1480_clocksource = { | 159 | struct clocksource bcm1480_clocksource = { |
179 | .name = "MIPS", | 160 | .name = "zbbus-cycles", |
180 | .rating = 200, | 161 | .rating = 200, |
181 | .read = bcm1480_hpt_read, | 162 | .read = bcm1480_hpt_read, |
182 | .mask = CLOCKSOURCE_MASK(32), | 163 | .mask = CLOCKSOURCE_MASK(64), |
183 | .shift = 32, | ||
184 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 164 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
185 | }; | 165 | }; |
186 | 166 | ||
187 | void __init sb1480_clocksource_init(void) | 167 | void __init sb1480_clocksource_init(void) |
188 | { | 168 | { |
189 | struct clocksource *cs = &bcm1480_clocksource; | 169 | struct clocksource *cs = &bcm1480_clocksource; |
170 | unsigned int plldiv; | ||
171 | unsigned long zbbus; | ||
190 | 172 | ||
191 | clocksource_set_clock(cs, BCM1480_HPT_VALUE); | 173 | plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); |
174 | zbbus = ((plldiv >> 1) * 50000000) + ((plldiv & 1) * 25000000); | ||
175 | clocksource_set_clock(cs, zbbus); | ||
192 | clocksource_register(cs); | 176 | clocksource_register(cs); |
193 | } | 177 | } |
194 | 178 | ||
195 | void __init bcm1480_hpt_setup(void) | 179 | void __init plat_time_init(void) |
196 | { | 180 | { |
197 | mips_hpt_frequency = BCM1480_HPT_VALUE; | ||
198 | sb1480_clocksource_init(); | 181 | sb1480_clocksource_init(); |
199 | sb1480_clockevent_init(); | 182 | sb1480_clockevent_init(); |
200 | } | 183 | } |