diff options
Diffstat (limited to 'arch/mips/sgi-ip32')
-rw-r--r-- | arch/mips/sgi-ip32/Makefile | 2 | ||||
-rw-r--r-- | arch/mips/sgi-ip32/ip32-irq-glue.S | 86 | ||||
-rw-r--r-- | arch/mips/sgi-ip32/ip32-irq.c | 33 |
3 files changed, 25 insertions, 96 deletions
diff --git a/arch/mips/sgi-ip32/Makefile b/arch/mips/sgi-ip32/Makefile index 470898f4afe1..530bf848c3d0 100644 --- a/arch/mips/sgi-ip32/Makefile +++ b/arch/mips/sgi-ip32/Makefile | |||
@@ -3,7 +3,7 @@ | |||
3 | # under Linux. | 3 | # under Linux. |
4 | # | 4 | # |
5 | 5 | ||
6 | obj-y += ip32-berr.o ip32-irq.o ip32-irq-glue.o ip32-setup.o ip32-reset.o \ | 6 | obj-y += ip32-berr.o ip32-irq.o ip32-setup.o ip32-reset.o \ |
7 | crime.o ip32-memory.o | 7 | crime.o ip32-memory.o |
8 | 8 | ||
9 | EXTRA_AFLAGS := $(CFLAGS) | 9 | EXTRA_AFLAGS := $(CFLAGS) |
diff --git a/arch/mips/sgi-ip32/ip32-irq-glue.S b/arch/mips/sgi-ip32/ip32-irq-glue.S deleted file mode 100644 index 200924e1c4f5..000000000000 --- a/arch/mips/sgi-ip32/ip32-irq-glue.S +++ /dev/null | |||
@@ -1,86 +0,0 @@ | |||
1 | /* | ||
2 | * Low level interrupt handler for the SGI O2 aka IP32 aka Moosehead | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | * | ||
8 | * Copyright (C) 2000 Harald Koerfgen | ||
9 | * Copyright (C) 2001 Keith M Wesolowski | ||
10 | */ | ||
11 | #include <asm/asm.h> | ||
12 | #include <asm/regdef.h> | ||
13 | #include <asm/mipsregs.h> | ||
14 | #include <asm/stackframe.h> | ||
15 | #include <asm/addrspace.h> | ||
16 | |||
17 | .text | ||
18 | .set noreorder | ||
19 | .set noat | ||
20 | .align 5 | ||
21 | NESTED(ip32_handle_int, PT_SIZE, ra) | ||
22 | .set noat | ||
23 | SAVE_ALL | ||
24 | CLI # TEST: interrupts should be off | ||
25 | .set at | ||
26 | .set noreorder | ||
27 | |||
28 | mfc0 s0,CP0_CAUSE | ||
29 | |||
30 | andi t1, s0, IE_IRQ0 | ||
31 | bnez t1, handle_irq0 | ||
32 | andi t1, s0, IE_IRQ1 | ||
33 | bnez t1, handle_irq1 | ||
34 | andi t1, s0, IE_IRQ2 | ||
35 | bnez t1, handle_irq2 | ||
36 | andi t1, s0, IE_IRQ3 | ||
37 | bnez t1, handle_irq3 | ||
38 | andi t1, s0, IE_IRQ4 | ||
39 | bnez t1, handle_irq4 | ||
40 | andi t1, s0, IE_IRQ5 | ||
41 | bnez t1, handle_irq5 | ||
42 | nop | ||
43 | |||
44 | /* Either someone has triggered the "software interrupts" | ||
45 | * or we lost an interrupt somehow. Ignore it. | ||
46 | */ | ||
47 | j ret_from_irq | ||
48 | nop | ||
49 | |||
50 | handle_irq0: | ||
51 | jal ip32_irq0 | ||
52 | move a0, sp | ||
53 | j ret_from_irq | ||
54 | nop | ||
55 | |||
56 | handle_irq1: | ||
57 | jal ip32_irq1 | ||
58 | move a0, sp | ||
59 | j ret_from_irq | ||
60 | nop | ||
61 | |||
62 | handle_irq2: | ||
63 | jal ip32_irq2 | ||
64 | move a0, sp | ||
65 | j ret_from_irq | ||
66 | nop | ||
67 | |||
68 | handle_irq3: | ||
69 | jal ip32_irq3 | ||
70 | move a0, sp | ||
71 | j ret_from_irq | ||
72 | nop | ||
73 | |||
74 | handle_irq4: | ||
75 | jal ip32_irq4 | ||
76 | move a0, sp | ||
77 | j ret_from_irq | ||
78 | nop | ||
79 | |||
80 | handle_irq5: | ||
81 | jal ip32_irq5 | ||
82 | move a0, sp | ||
83 | j ret_from_irq | ||
84 | nop | ||
85 | |||
86 | END(ip32_handle_int) | ||
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index 2eb22d692ed9..22a6df94b4a1 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c | |||
@@ -130,8 +130,6 @@ struct irqaction memerr_irq = { crime_memerr_intr, SA_INTERRUPT, | |||
130 | struct irqaction cpuerr_irq = { crime_cpuerr_intr, SA_INTERRUPT, | 130 | struct irqaction cpuerr_irq = { crime_cpuerr_intr, SA_INTERRUPT, |
131 | CPU_MASK_NONE, "CRIME CPU error", NULL, NULL }; | 131 | CPU_MASK_NONE, "CRIME CPU error", NULL, NULL }; |
132 | 132 | ||
133 | extern void ip32_handle_int(void); | ||
134 | |||
135 | /* | 133 | /* |
136 | * For interrupts wired from a single device to the CPU. Only the clock | 134 | * For interrupts wired from a single device to the CPU. Only the clock |
137 | * uses this it seems, which is IRQ 0 and IP7. | 135 | * uses this it seems, which is IRQ 0 and IP7. |
@@ -503,7 +501,7 @@ static void ip32_unknown_interrupt(struct pt_regs *regs) | |||
503 | 501 | ||
504 | /* CRIME 1.1 appears to deliver all interrupts to this one pin. */ | 502 | /* CRIME 1.1 appears to deliver all interrupts to this one pin. */ |
505 | /* change this to loop over all edge-triggered irqs, exception masked out ones */ | 503 | /* change this to loop over all edge-triggered irqs, exception masked out ones */ |
506 | void ip32_irq0(struct pt_regs *regs) | 504 | static void ip32_irq0(struct pt_regs *regs) |
507 | { | 505 | { |
508 | uint64_t crime_int; | 506 | uint64_t crime_int; |
509 | int irq = 0; | 507 | int irq = 0; |
@@ -520,31 +518,49 @@ void ip32_irq0(struct pt_regs *regs) | |||
520 | do_IRQ(irq, regs); | 518 | do_IRQ(irq, regs); |
521 | } | 519 | } |
522 | 520 | ||
523 | void ip32_irq1(struct pt_regs *regs) | 521 | static void ip32_irq1(struct pt_regs *regs) |
524 | { | 522 | { |
525 | ip32_unknown_interrupt(regs); | 523 | ip32_unknown_interrupt(regs); |
526 | } | 524 | } |
527 | 525 | ||
528 | void ip32_irq2(struct pt_regs *regs) | 526 | static void ip32_irq2(struct pt_regs *regs) |
529 | { | 527 | { |
530 | ip32_unknown_interrupt(regs); | 528 | ip32_unknown_interrupt(regs); |
531 | } | 529 | } |
532 | 530 | ||
533 | void ip32_irq3(struct pt_regs *regs) | 531 | static void ip32_irq3(struct pt_regs *regs) |
534 | { | 532 | { |
535 | ip32_unknown_interrupt(regs); | 533 | ip32_unknown_interrupt(regs); |
536 | } | 534 | } |
537 | 535 | ||
538 | void ip32_irq4(struct pt_regs *regs) | 536 | static void ip32_irq4(struct pt_regs *regs) |
539 | { | 537 | { |
540 | ip32_unknown_interrupt(regs); | 538 | ip32_unknown_interrupt(regs); |
541 | } | 539 | } |
542 | 540 | ||
543 | void ip32_irq5(struct pt_regs *regs) | 541 | static void ip32_irq5(struct pt_regs *regs) |
544 | { | 542 | { |
545 | ll_timer_interrupt(IP32_R4K_TIMER_IRQ, regs); | 543 | ll_timer_interrupt(IP32_R4K_TIMER_IRQ, regs); |
546 | } | 544 | } |
547 | 545 | ||
546 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | ||
547 | { | ||
548 | unsigned int pending = read_c0_cause(); | ||
549 | |||
550 | if (likely(pending & IE_IRQ0)) | ||
551 | ip32_irq0(regs); | ||
552 | else if (unlikely(pending & IE_IRQ1)) | ||
553 | ip32_irq1(regs); | ||
554 | else if (unlikely(pending & IE_IRQ2)) | ||
555 | ip32_irq2(regs); | ||
556 | else if (unlikely(pending & IE_IRQ3)) | ||
557 | ip32_irq3(regs); | ||
558 | else if (unlikely(pending & IE_IRQ4)) | ||
559 | ip32_irq4(regs); | ||
560 | else if (likely(pending & IE_IRQ5)) | ||
561 | ip32_irq5(regs); | ||
562 | } | ||
563 | |||
548 | void __init arch_init_irq(void) | 564 | void __init arch_init_irq(void) |
549 | { | 565 | { |
550 | unsigned int irq; | 566 | unsigned int irq; |
@@ -556,7 +572,6 @@ void __init arch_init_irq(void) | |||
556 | crime->soft_int = 0; | 572 | crime->soft_int = 0; |
557 | mace->perif.ctrl.istat = 0; | 573 | mace->perif.ctrl.istat = 0; |
558 | mace->perif.ctrl.imask = 0; | 574 | mace->perif.ctrl.imask = 0; |
559 | set_except_vector(0, ip32_handle_int); | ||
560 | 575 | ||
561 | for (irq = 0; irq <= IP32_IRQ_MAX; irq++) { | 576 | for (irq = 0; irq <= IP32_IRQ_MAX; irq++) { |
562 | hw_irq_controller *controller; | 577 | hw_irq_controller *controller; |