diff options
Diffstat (limited to 'arch/mips/sgi-ip22/ip22-nvram.c')
-rw-r--r-- | arch/mips/sgi-ip22/ip22-nvram.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/mips/sgi-ip22/ip22-nvram.c b/arch/mips/sgi-ip22/ip22-nvram.c index fd29fd407ae8..e19d60d5fcc1 100644 --- a/arch/mips/sgi-ip22/ip22-nvram.c +++ b/arch/mips/sgi-ip22/ip22-nvram.c | |||
@@ -52,8 +52,7 @@ | |||
52 | * national semiconductor nv ram chip the op code is 3 bits and | 52 | * national semiconductor nv ram chip the op code is 3 bits and |
53 | * the address is 6/8 bits. | 53 | * the address is 6/8 bits. |
54 | */ | 54 | */ |
55 | static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd, | 55 | static inline void eeprom_cmd(unsigned int *ctrl, unsigned cmd, unsigned reg) |
56 | unsigned reg) | ||
57 | { | 56 | { |
58 | unsigned short ser_cmd; | 57 | unsigned short ser_cmd; |
59 | int i; | 58 | int i; |
@@ -61,33 +60,34 @@ static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd, | |||
61 | ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND)); | 60 | ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND)); |
62 | for (i = 0; i < BITS_IN_COMMAND; i++) { | 61 | for (i = 0; i < BITS_IN_COMMAND; i++) { |
63 | if (ser_cmd & (1<<15)) /* if high order bit set */ | 62 | if (ser_cmd & (1<<15)) /* if high order bit set */ |
64 | *ctrl |= EEPROM_DATO; | 63 | writel(readl(ctrl) | EEPROM_DATO, ctrl); |
65 | else | 64 | else |
66 | *ctrl &= ~EEPROM_DATO; | 65 | writel(readl(ctrl) & ~EEPROM_DATO, ctrl); |
67 | *ctrl &= ~EEPROM_ECLK; | 66 | writel(readl(ctrl) & ~EEPROM_ECLK, ctrl); |
68 | *ctrl |= EEPROM_ECLK; | 67 | writel(readl(ctrl) | EEPROM_ECLK, ctrl); |
69 | ser_cmd <<= 1; | 68 | ser_cmd <<= 1; |
70 | } | 69 | } |
71 | *ctrl &= ~EEPROM_DATO; /* see data sheet timing diagram */ | 70 | /* see data sheet timing diagram */ |
71 | writel(readl(ctrl) & ~EEPROM_DATO, ctrl); | ||
72 | } | 72 | } |
73 | 73 | ||
74 | unsigned short ip22_eeprom_read(volatile unsigned int *ctrl, int reg) | 74 | unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg) |
75 | { | 75 | { |
76 | unsigned short res = 0; | 76 | unsigned short res = 0; |
77 | int i; | 77 | int i; |
78 | 78 | ||
79 | *ctrl &= ~EEPROM_EPROT; | 79 | writel(readl(ctrl) & ~EEPROM_EPROT, ctrl); |
80 | eeprom_cs_on(ctrl); | 80 | eeprom_cs_on(ctrl); |
81 | eeprom_cmd(ctrl, EEPROM_READ, reg); | 81 | eeprom_cmd(ctrl, EEPROM_READ, reg); |
82 | 82 | ||
83 | /* clock the data ouf of serial mem */ | 83 | /* clock the data ouf of serial mem */ |
84 | for (i = 0; i < 16; i++) { | 84 | for (i = 0; i < 16; i++) { |
85 | *ctrl &= ~EEPROM_ECLK; | 85 | writel(readl(ctrl) & ~EEPROM_ECLK, ctrl); |
86 | delay(); | 86 | delay(); |
87 | *ctrl |= EEPROM_ECLK; | 87 | writel(readl(ctrl) | EEPROM_ECLK, ctrl); |
88 | delay(); | 88 | delay(); |
89 | res <<= 1; | 89 | res <<= 1; |
90 | if (*ctrl & EEPROM_DATI) | 90 | if (readl(ctrl) & EEPROM_DATI) |
91 | res |= 1; | 91 | res |= 1; |
92 | } | 92 | } |
93 | 93 | ||