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-rw-r--r--arch/mips/sgi-ip22/ip22-mc.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/sgi-ip22/ip22-mc.c b/arch/mips/sgi-ip22/ip22-mc.c
index 01a805dcc67c..3f35d6367bec 100644
--- a/arch/mips/sgi-ip22/ip22-mc.c
+++ b/arch/mips/sgi-ip22/ip22-mc.c
@@ -4,6 +4,7 @@
4 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) 4 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
5 * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu) - Indigo2 changes 5 * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu) - Indigo2 changes
6 * Copyright (C) 2003 Ladislav Michl (ladis@linux-mips.org) 6 * Copyright (C) 2003 Ladislav Michl (ladis@linux-mips.org)
7 * Copyright (C) 2004 Peter Fuerst (pf@net.alphadv.de) - IP28
7 */ 8 */
8 9
9#include <linux/init.h> 10#include <linux/init.h>
@@ -137,9 +138,12 @@ void __init sgimc_init(void)
137 /* Step 2: Enable all parity checking in cpu control register 138 /* Step 2: Enable all parity checking in cpu control register
138 * zero. 139 * zero.
139 */ 140 */
141 /* don't touch parity settings for IP28 */
142#ifndef CONFIG_SGI_IP28
140 tmp = sgimc->cpuctrl0; 143 tmp = sgimc->cpuctrl0;
141 tmp |= (SGIMC_CCTRL0_EPERRGIO | SGIMC_CCTRL0_EPERRMEM | 144 tmp |= (SGIMC_CCTRL0_EPERRGIO | SGIMC_CCTRL0_EPERRMEM |
142 SGIMC_CCTRL0_R4KNOCHKPARR); 145 SGIMC_CCTRL0_R4KNOCHKPARR);
146#endif
143 sgimc->cpuctrl0 = tmp; 147 sgimc->cpuctrl0 = tmp;
144 148
145 /* Step 3: Setup the MC write buffer depth, this is controlled 149 /* Step 3: Setup the MC write buffer depth, this is controlled