4 files changed, 93 insertions, 83 deletions

diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
index c1c29181bd46..4a5f05b662ae 100644
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -24,6 +24,7 @@
 #include <linux/mtd/partitions.h>
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
+#include <linux/serial_8250.h>
 
 #include <asm/bootinfo.h>
 
@@ -39,6 +40,29 @@
 #define ETH0_RX_DMA_ADDR  (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
 #define ETH0_TX_DMA_ADDR  (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)
 
+extern unsigned int idt_cpu_freq;
+
+static struct mpmc_device dev3;
+
+void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&dev3.lock, flags);
+
+        dev3.state = (dev3.state | or_mask) & ~nand_mask;
+        writeb(dev3.state, dev3.base);
+
+        spin_unlock_irqrestore(&dev3.lock, flags);
+}
+EXPORT_SYMBOL(set_latch_u5);
+
+unsigned char get_latch_u5(void)
+{
+        return dev3.state;
+}
+EXPORT_SYMBOL(get_latch_u5);
+
 static struct resource korina_dev0_res[] = {
         {
                 .name = "korina_regs",
@@ -86,7 +110,7 @@ static struct korina_device korina_dev0_data = {
 static struct platform_device korina_dev0 = {
         .id = -1,
         .name = "korina",
-        .dev.platform_data = &korina_dev0_data,
+        .dev.driver_data = &korina_dev0_data,
         .resource = korina_dev0_res,
         .num_resources = ARRAY_SIZE(korina_dev0_res),
 };
@@ -214,12 +238,32 @@ static struct platform_device rb532_wdt = {
         .num_resources  = ARRAY_SIZE(rb532_wdt_res),
 };
 
+static struct plat_serial8250_port rb532_uart_res[] = {
+        {
+                .membase        = (char *)KSEG1ADDR(REGBASE + UART0BASE),
+                .irq            = UART0_IRQ,
+                .regshift       = 2,
+                .iotype         = UPIO_MEM,
+                .flags          = UPF_BOOT_AUTOCONF,
+        },
+        {
+                .flags          = 0,
+        }
+};
+
+static struct platform_device rb532_uart = {
+        .name              = "serial8250",
+        .id                = PLAT8250_DEV_PLATFORM,
+        .dev.platform_data = &rb532_uart_res,
+};
+
 static struct platform_device *rb532_devs[] = {
         &korina_dev0,
         &nand_slot0,
         &cf_slot0,
         &rb532_led,
         &rb532_button,
+        &rb532_uart,
         &rb532_wdt
 };
 
@@ -291,9 +335,20 @@ static int __init plat_setup_devices(void)
         nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);
         nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
 
+        /* Read and map device controller 3 */
+        dev3.base = ioremap_nocache(readl(IDT434_REG_BASE + DEV3BASE), 1);
+
+        if (!dev3.base) {
+                printk(KERN_ERR "rb532: cannot remap device controller 3\n");
+                return -ENXIO;
+        }
+
         /* Initialise the NAND device */
         rb532_nand_setup();
 
+        /* set the uart clock to the current cpu frequency */
+        rb532_uart_res[0].uartclk = idt_cpu_freq;
+
         return platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs));
 }
 
diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c
index 0e84c8ab6a39..37de05d595e7 100644
--- a/arch/mips/rb532/gpio.c
+++ b/arch/mips/rb532/gpio.c
@@ -41,8 +41,6 @@ struct rb532_gpio_chip {
         void __iomem     *regbase;
 };
 
-struct mpmc_device dev3;
-
 static struct resource rb532_gpio_reg0_res[] = {
         {
                 .name   = "gpio_reg0",
@@ -52,61 +50,6 @@ static struct resource rb532_gpio_reg0_res[] = {
         }
 };
 
-static struct resource rb532_dev3_ctl_res[] = {
-        {
-                .name   = "dev3_ctl",
-                .start  = REGBASE + DEV3BASE,
-                .end    = REGBASE + DEV3BASE + sizeof(struct dev_reg) - 1,
-                .flags  = IORESOURCE_MEM,
-        }
-};
-
-void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val)
-{
-        unsigned long flags;
-        unsigned data;
-        unsigned i = 0;
-
-        spin_lock_irqsave(&dev3.lock, flags);
-
-        data = readl(IDT434_REG_BASE + reg_offs);
-        for (i = 0; i != len; ++i) {
-                if (val & (1 << i))
-                        data |= (1 << (i + bit));
-                else
-                        data &= ~(1 << (i + bit));
-        }
-        writel(data, (IDT434_REG_BASE + reg_offs));
-
-        spin_unlock_irqrestore(&dev3.lock, flags);
-}
-EXPORT_SYMBOL(set_434_reg);
-
-unsigned get_434_reg(unsigned reg_offs)
-{
-        return readl(IDT434_REG_BASE + reg_offs);
-}
-EXPORT_SYMBOL(get_434_reg);
-
-void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
-{
-        unsigned long flags;
-
-        spin_lock_irqsave(&dev3.lock, flags);
-
-        dev3.state = (dev3.state | or_mask) & ~nand_mask;
-        writel(dev3.state, &dev3.base);
-
-        spin_unlock_irqrestore(&dev3.lock, flags);
-}
-EXPORT_SYMBOL(set_latch_u5);
-
-unsigned char get_latch_u5(void)
-{
-        return dev3.state;
-}
-EXPORT_SYMBOL(get_latch_u5);
-
 /* rb532_set_bit - sanely set a bit
  *
  * bitval: new value for the bit
@@ -119,13 +62,11 @@ static inline void rb532_set_bit(unsigned bitval,
         unsigned long flags;
         u32 val;
 
-        bitval = !!bitval;              /* map parameter to {0,1} */
-
         local_irq_save(flags);
 
         val = readl(ioaddr);
-        val &= ~( ~bitval << offset );   /* unset bit if bitval == 0 */
-        val |=  (  bitval << offset );   /* set bit if bitval == 1 */
+        val &= ~(!bitval << offset);   /* unset bit if bitval == 0 */
+        val |= (!!bitval << offset);   /* set bit if bitval == 1 */
         writel(val, ioaddr);
 
         local_irq_restore(flags);
@@ -171,8 +112,8 @@ static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 
         gpch = container_of(chip, struct rb532_gpio_chip, chip);
 
-        if (rb532_get_bit(offset, gpch->regbase + GPIOFUNC))
-                return 1;       /* alternate function, GPIOCFG is ignored */
+        /* disable alternate function in case it's set */
+        rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
 
         rb532_set_bit(0, offset, gpch->regbase + GPIOCFG);
         return 0;
@@ -188,8 +129,8 @@ static int rb532_gpio_direction_output(struct gpio_chip *chip,
 
         gpch = container_of(chip, struct rb532_gpio_chip, chip);
 
-        if (rb532_get_bit(offset, gpch->regbase + GPIOFUNC))
-                return 1;       /* alternate function, GPIOCFG is ignored */
+        /* disable alternate function in case it's set */
+        rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
 
         /* set the initial output value */
         rb532_set_bit(value, offset, gpch->regbase + GPIOD);
@@ -233,10 +174,11 @@ EXPORT_SYMBOL(rb532_gpio_set_istat);
 /*
  * Configure GPIO alternate function
  */
-static void rb532_gpio_set_func(int bit, unsigned gpio)
+void rb532_gpio_set_func(unsigned gpio)
 {
-       rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOFUNC);
+       rb532_set_bit(1, gpio, rb532_gpio_chip->regbase + GPIOFUNC);
 }
+EXPORT_SYMBOL(rb532_gpio_set_func);
 
 int __init rb532_gpio_init(void)
 {
@@ -253,20 +195,6 @@ int __init rb532_gpio_init(void)
         /* Register our GPIO chip */
         gpiochip_add(&rb532_gpio_chip->chip);
 
-        r = rb532_dev3_ctl_res;
-        dev3.base = ioremap_nocache(r->start, r->end - r->start);
-
-        if (!dev3.base) {
-                printk(KERN_ERR "rb532: cannot remap device controller 3\n");
-                return -ENXIO;
-        }
-
-        /* configure CF_GPIO_NUM as CFRDY IRQ source */
-        rb532_gpio_set_func(0, CF_GPIO_NUM);
-        rb532_gpio_direction_input(&rb532_gpio_chip->chip, CF_GPIO_NUM);
-        rb532_gpio_set_ilevel(1, CF_GPIO_NUM);
-        rb532_gpio_set_istat(0, CF_GPIO_NUM);
-
         return 0;
 }
 arch_initcall(rb532_gpio_init);
diff --git a/arch/mips/rb532/irq.c b/arch/mips/rb532/irq.c
index 549b46d2fcee..53eeb5e7bc5b 100644
--- a/arch/mips/rb532/irq.c
+++ b/arch/mips/rb532/irq.c
@@ -46,6 +46,7 @@
 #include <asm/system.h>
 
 #include <asm/mach-rc32434/irq.h>
+#include <asm/mach-rc32434/gpio.h>
 
 struct intr_group {
         u32 mask;       /* mask of valid bits in pending/mask registers */
@@ -150,6 +151,9 @@ static void rb532_disable_irq(unsigned int irq_nr)
                 mask |= intr_bit;
                 WRITE_MASK(addr, mask);
 
+                if (group == GPIO_MAPPED_IRQ_GROUP)
+                        rb532_gpio_set_istat(0, irq_nr - GPIO_MAPPED_IRQ_BASE);
+
                 /*
                  * if there are no more interrupts enabled in this
                  * group, disable corresponding IP
@@ -165,12 +169,35 @@ static void rb532_mask_and_ack_irq(unsigned int irq_nr)
         ack_local_irq(group_to_ip(irq_to_group(irq_nr)));
 }
 
+static int rb532_set_type(unsigned int irq_nr, unsigned type)
+{
+        int gpio = irq_nr - GPIO_MAPPED_IRQ_BASE;
+        int group = irq_to_group(irq_nr);
+
+        if (group != GPIO_MAPPED_IRQ_GROUP)
+                return (type == IRQ_TYPE_LEVEL_HIGH) ? 0 : -EINVAL;
+
+        switch (type) {
+        case IRQ_TYPE_LEVEL_HIGH:
+                rb532_gpio_set_ilevel(1, gpio);
+                break;
+        case IRQ_TYPE_LEVEL_LOW:
+                rb532_gpio_set_ilevel(0, gpio);
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
 static struct irq_chip rc32434_irq_type = {
         .name           = "RB532",
         .ack            = rb532_disable_irq,
         .mask           = rb532_disable_irq,
         .mask_ack       = rb532_mask_and_ack_irq,
         .unmask         = rb532_enable_irq,
+        .set_type       = rb532_set_type,
 };
 
 void __init arch_init_irq(void)
diff --git a/arch/mips/rb532/serial.c b/arch/mips/rb532/serial.c
index 3e0d7ec3a579..00ed19f0bdb5 100644
--- a/arch/mips/rb532/serial.c
+++ b/arch/mips/rb532/serial.c
@@ -36,7 +36,7 @@
 extern unsigned int idt_cpu_freq;
 
 static struct uart_port rb532_uart = {
-        .type = PORT_16550A,
+        .flags = UPF_BOOT_AUTOCONF,
         .line = 0,
         .irq = UART0_IRQ,
         .iotype = UPIO_MEM,