aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/rb532/devices.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/rb532/devices.c')
-rw-r--r--arch/mips/rb532/devices.c57
1 files changed, 56 insertions, 1 deletions
diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
index c1c29181bd46..4a5f05b662ae 100644
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -24,6 +24,7 @@
24#include <linux/mtd/partitions.h> 24#include <linux/mtd/partitions.h>
25#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
26#include <linux/input.h> 26#include <linux/input.h>
27#include <linux/serial_8250.h>
27 28
28#include <asm/bootinfo.h> 29#include <asm/bootinfo.h>
29 30
@@ -39,6 +40,29 @@
39#define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET) 40#define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
40#define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET) 41#define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)
41 42
43extern unsigned int idt_cpu_freq;
44
45static struct mpmc_device dev3;
46
47void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
48{
49 unsigned long flags;
50
51 spin_lock_irqsave(&dev3.lock, flags);
52
53 dev3.state = (dev3.state | or_mask) & ~nand_mask;
54 writeb(dev3.state, dev3.base);
55
56 spin_unlock_irqrestore(&dev3.lock, flags);
57}
58EXPORT_SYMBOL(set_latch_u5);
59
60unsigned char get_latch_u5(void)
61{
62 return dev3.state;
63}
64EXPORT_SYMBOL(get_latch_u5);
65
42static struct resource korina_dev0_res[] = { 66static struct resource korina_dev0_res[] = {
43 { 67 {
44 .name = "korina_regs", 68 .name = "korina_regs",
@@ -86,7 +110,7 @@ static struct korina_device korina_dev0_data = {
86static struct platform_device korina_dev0 = { 110static struct platform_device korina_dev0 = {
87 .id = -1, 111 .id = -1,
88 .name = "korina", 112 .name = "korina",
89 .dev.platform_data = &korina_dev0_data, 113 .dev.driver_data = &korina_dev0_data,
90 .resource = korina_dev0_res, 114 .resource = korina_dev0_res,
91 .num_resources = ARRAY_SIZE(korina_dev0_res), 115 .num_resources = ARRAY_SIZE(korina_dev0_res),
92}; 116};
@@ -214,12 +238,32 @@ static struct platform_device rb532_wdt = {
214 .num_resources = ARRAY_SIZE(rb532_wdt_res), 238 .num_resources = ARRAY_SIZE(rb532_wdt_res),
215}; 239};
216 240
241static struct plat_serial8250_port rb532_uart_res[] = {
242 {
243 .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),
244 .irq = UART0_IRQ,
245 .regshift = 2,
246 .iotype = UPIO_MEM,
247 .flags = UPF_BOOT_AUTOCONF,
248 },
249 {
250 .flags = 0,
251 }
252};
253
254static struct platform_device rb532_uart = {
255 .name = "serial8250",
256 .id = PLAT8250_DEV_PLATFORM,
257 .dev.platform_data = &rb532_uart_res,
258};
259
217static struct platform_device *rb532_devs[] = { 260static struct platform_device *rb532_devs[] = {
218 &korina_dev0, 261 &korina_dev0,
219 &nand_slot0, 262 &nand_slot0,
220 &cf_slot0, 263 &cf_slot0,
221 &rb532_led, 264 &rb532_led,
222 &rb532_button, 265 &rb532_button,
266 &rb532_uart,
223 &rb532_wdt 267 &rb532_wdt
224}; 268};
225 269
@@ -291,9 +335,20 @@ static int __init plat_setup_devices(void)
291 nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE); 335 nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);
292 nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000; 336 nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
293 337
338 /* Read and map device controller 3 */
339 dev3.base = ioremap_nocache(readl(IDT434_REG_BASE + DEV3BASE), 1);
340
341 if (!dev3.base) {
342 printk(KERN_ERR "rb532: cannot remap device controller 3\n");
343 return -ENXIO;
344 }
345
294 /* Initialise the NAND device */ 346 /* Initialise the NAND device */
295 rb532_nand_setup(); 347 rb532_nand_setup();
296 348
349 /* set the uart clock to the current cpu frequency */
350 rb532_uart_res[0].uartclk = idt_cpu_freq;
351
297 return platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs)); 352 return platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs));
298} 353}
299 354