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Diffstat (limited to 'arch/mips/ralink/rt3883.c')
-rw-r--r--arch/mips/ralink/rt3883.c174
1 files changed, 42 insertions, 132 deletions
diff --git a/arch/mips/ralink/rt3883.c b/arch/mips/ralink/rt3883.c
index b474ac284b83..86a535c770d8 100644
--- a/arch/mips/ralink/rt3883.c
+++ b/arch/mips/ralink/rt3883.c
@@ -17,132 +17,50 @@
17#include <asm/mipsregs.h> 17#include <asm/mipsregs.h>
18#include <asm/mach-ralink/ralink_regs.h> 18#include <asm/mach-ralink/ralink_regs.h>
19#include <asm/mach-ralink/rt3883.h> 19#include <asm/mach-ralink/rt3883.h>
20#include <asm/mach-ralink/pinmux.h>
20 21
21#include "common.h" 22#include "common.h"
22 23
23static struct ralink_pinmux_grp mode_mux[] = { 24static struct rt2880_pmx_func i2c_func[] = { FUNC("i2c", 0, 1, 2) };
24 { 25static struct rt2880_pmx_func spi_func[] = { FUNC("spi", 0, 3, 4) };
25 .name = "i2c", 26static struct rt2880_pmx_func uartf_func[] = {
26 .mask = RT3883_GPIO_MODE_I2C, 27 FUNC("uartf", RT3883_GPIO_MODE_UARTF, 7, 8),
27 .gpio_first = RT3883_GPIO_I2C_SD, 28 FUNC("pcm uartf", RT3883_GPIO_MODE_PCM_UARTF, 7, 8),
28 .gpio_last = RT3883_GPIO_I2C_SCLK, 29 FUNC("pcm i2s", RT3883_GPIO_MODE_PCM_I2S, 7, 8),
29 }, { 30 FUNC("i2s uartf", RT3883_GPIO_MODE_I2S_UARTF, 7, 8),
30 .name = "spi", 31 FUNC("pcm gpio", RT3883_GPIO_MODE_PCM_GPIO, 11, 4),
31 .mask = RT3883_GPIO_MODE_SPI, 32 FUNC("gpio uartf", RT3883_GPIO_MODE_GPIO_UARTF, 7, 4),
32 .gpio_first = RT3883_GPIO_SPI_CS0, 33 FUNC("gpio i2s", RT3883_GPIO_MODE_GPIO_I2S, 7, 4),
33 .gpio_last = RT3883_GPIO_SPI_MISO,
34 }, {
35 .name = "uartlite",
36 .mask = RT3883_GPIO_MODE_UART1,
37 .gpio_first = RT3883_GPIO_UART1_TXD,
38 .gpio_last = RT3883_GPIO_UART1_RXD,
39 }, {
40 .name = "jtag",
41 .mask = RT3883_GPIO_MODE_JTAG,
42 .gpio_first = RT3883_GPIO_JTAG_TDO,
43 .gpio_last = RT3883_GPIO_JTAG_TCLK,
44 }, {
45 .name = "mdio",
46 .mask = RT3883_GPIO_MODE_MDIO,
47 .gpio_first = RT3883_GPIO_MDIO_MDC,
48 .gpio_last = RT3883_GPIO_MDIO_MDIO,
49 }, {
50 .name = "ge1",
51 .mask = RT3883_GPIO_MODE_GE1,
52 .gpio_first = RT3883_GPIO_GE1_TXD0,
53 .gpio_last = RT3883_GPIO_GE1_RXCLK,
54 }, {
55 .name = "ge2",
56 .mask = RT3883_GPIO_MODE_GE2,
57 .gpio_first = RT3883_GPIO_GE2_TXD0,
58 .gpio_last = RT3883_GPIO_GE2_RXCLK,
59 }, {
60 .name = "pci",
61 .mask = RT3883_GPIO_MODE_PCI,
62 .gpio_first = RT3883_GPIO_PCI_AD0,
63 .gpio_last = RT3883_GPIO_PCI_AD31,
64 }, {
65 .name = "lna a",
66 .mask = RT3883_GPIO_MODE_LNA_A,
67 .gpio_first = RT3883_GPIO_LNA_PE_A0,
68 .gpio_last = RT3883_GPIO_LNA_PE_A2,
69 }, {
70 .name = "lna g",
71 .mask = RT3883_GPIO_MODE_LNA_G,
72 .gpio_first = RT3883_GPIO_LNA_PE_G0,
73 .gpio_last = RT3883_GPIO_LNA_PE_G2,
74 }, {0}
75}; 34};
76 35static struct rt2880_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 15, 2) };
77static struct ralink_pinmux_grp uart_mux[] = { 36static struct rt2880_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 5) };
78 { 37static struct rt2880_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 2) };
79 .name = "uartf", 38static struct rt2880_pmx_func lna_a_func[] = { FUNC("lna a", 0, 32, 3) };
80 .mask = RT3883_GPIO_MODE_UARTF, 39static struct rt2880_pmx_func lna_g_func[] = { FUNC("lna a", 0, 35, 3) };
81 .gpio_first = RT3883_GPIO_7, 40static struct rt2880_pmx_func pci_func[] = {
82 .gpio_last = RT3883_GPIO_14, 41 FUNC("pci-dev", 0, 40, 32),
83 }, { 42 FUNC("pci-host2", 1, 40, 32),
84 .name = "pcm uartf", 43 FUNC("pci-host1", 2, 40, 32),
85 .mask = RT3883_GPIO_MODE_PCM_UARTF, 44 FUNC("pci-fnc", 3, 40, 32)
86 .gpio_first = RT3883_GPIO_7,
87 .gpio_last = RT3883_GPIO_14,
88 }, {
89 .name = "pcm i2s",
90 .mask = RT3883_GPIO_MODE_PCM_I2S,
91 .gpio_first = RT3883_GPIO_7,
92 .gpio_last = RT3883_GPIO_14,
93 }, {
94 .name = "i2s uartf",
95 .mask = RT3883_GPIO_MODE_I2S_UARTF,
96 .gpio_first = RT3883_GPIO_7,
97 .gpio_last = RT3883_GPIO_14,
98 }, {
99 .name = "pcm gpio",
100 .mask = RT3883_GPIO_MODE_PCM_GPIO,
101 .gpio_first = RT3883_GPIO_11,
102 .gpio_last = RT3883_GPIO_14,
103 }, {
104 .name = "gpio uartf",
105 .mask = RT3883_GPIO_MODE_GPIO_UARTF,
106 .gpio_first = RT3883_GPIO_7,
107 .gpio_last = RT3883_GPIO_10,
108 }, {
109 .name = "gpio i2s",
110 .mask = RT3883_GPIO_MODE_GPIO_I2S,
111 .gpio_first = RT3883_GPIO_7,
112 .gpio_last = RT3883_GPIO_10,
113 }, {
114 .name = "gpio",
115 .mask = RT3883_GPIO_MODE_GPIO,
116 }, {0}
117}; 45};
118 46static struct rt2880_pmx_func ge1_func[] = { FUNC("ge1", 0, 72, 12) };
119static struct ralink_pinmux_grp pci_mux[] = { 47static struct rt2880_pmx_func ge2_func[] = { FUNC("ge1", 0, 84, 12) };
120 { 48
121 .name = "pci-dev", 49static struct rt2880_pmx_group rt3883_pinmux_data[] = {
122 .mask = 0, 50 GRP("i2c", i2c_func, 1, RT3883_GPIO_MODE_I2C),
123 .gpio_first = RT3883_GPIO_PCI_AD0, 51 GRP("spi", spi_func, 1, RT3883_GPIO_MODE_SPI),
124 .gpio_last = RT3883_GPIO_PCI_AD31, 52 GRP("uartf", uartf_func, RT3883_GPIO_MODE_UART0_MASK,
125 }, { 53 RT3883_GPIO_MODE_UART0_SHIFT),
126 .name = "pci-host2", 54 GRP("uartlite", uartlite_func, 1, RT3883_GPIO_MODE_UART1),
127 .mask = 1, 55 GRP("jtag", jtag_func, 1, RT3883_GPIO_MODE_JTAG),
128 .gpio_first = RT3883_GPIO_PCI_AD0, 56 GRP("mdio", mdio_func, 1, RT3883_GPIO_MODE_MDIO),
129 .gpio_last = RT3883_GPIO_PCI_AD31, 57 GRP("lna a", lna_a_func, 1, RT3883_GPIO_MODE_LNA_A),
130 }, { 58 GRP("lna g", lna_g_func, 1, RT3883_GPIO_MODE_LNA_G),
131 .name = "pci-host1", 59 GRP("pci", pci_func, RT3883_GPIO_MODE_PCI_MASK,
132 .mask = 2, 60 RT3883_GPIO_MODE_PCI_SHIFT),
133 .gpio_first = RT3883_GPIO_PCI_AD0, 61 GRP("ge1", ge1_func, 1, RT3883_GPIO_MODE_GE1),
134 .gpio_last = RT3883_GPIO_PCI_AD31, 62 GRP("ge2", ge2_func, 1, RT3883_GPIO_MODE_GE2),
135 }, { 63 { 0 }
136 .name = "pci-fnc",
137 .mask = 3,
138 .gpio_first = RT3883_GPIO_PCI_AD0,
139 .gpio_last = RT3883_GPIO_PCI_AD31,
140 }, {
141 .name = "pci-gpio",
142 .mask = 7,
143 .gpio_first = RT3883_GPIO_PCI_AD0,
144 .gpio_last = RT3883_GPIO_PCI_AD31,
145 }, {0}
146}; 64};
147 65
148static void rt3883_wdt_reset(void) 66static void rt3883_wdt_reset(void)
@@ -155,17 +73,6 @@ static void rt3883_wdt_reset(void)
155 rt_sysc_w32(t, RT3883_SYSC_REG_SYSCFG1); 73 rt_sysc_w32(t, RT3883_SYSC_REG_SYSCFG1);
156} 74}
157 75
158struct ralink_pinmux rt_gpio_pinmux = {
159 .mode = mode_mux,
160 .uart = uart_mux,
161 .uart_shift = RT3883_GPIO_MODE_UART0_SHIFT,
162 .uart_mask = RT3883_GPIO_MODE_UART0_MASK,
163 .wdt_reset = rt3883_wdt_reset,
164 .pci = pci_mux,
165 .pci_shift = RT3883_GPIO_MODE_PCI_SHIFT,
166 .pci_mask = RT3883_GPIO_MODE_PCI_MASK,
167};
168
169void __init ralink_clk_init(void) 76void __init ralink_clk_init(void)
170{ 77{
171 unsigned long cpu_rate, sys_rate; 78 unsigned long cpu_rate, sys_rate;
@@ -204,6 +111,7 @@ void __init ralink_clk_init(void)
204 ralink_clk_add("10000b00.spi", sys_rate); 111 ralink_clk_add("10000b00.spi", sys_rate);
205 ralink_clk_add("10000c00.uartlite", 40000000); 112 ralink_clk_add("10000c00.uartlite", 40000000);
206 ralink_clk_add("10100000.ethernet", sys_rate); 113 ralink_clk_add("10100000.ethernet", sys_rate);
114 ralink_clk_add("10180000.wmac", 40000000);
207} 115}
208 116
209void __init ralink_of_remap(void) 117void __init ralink_of_remap(void)
@@ -243,4 +151,6 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
243 soc_info->mem_base = RT3883_SDRAM_BASE; 151 soc_info->mem_base = RT3883_SDRAM_BASE;
244 soc_info->mem_size_min = RT3883_MEM_SIZE_MIN; 152 soc_info->mem_size_min = RT3883_MEM_SIZE_MIN;
245 soc_info->mem_size_max = RT3883_MEM_SIZE_MAX; 153 soc_info->mem_size_max = RT3883_MEM_SIZE_MAX;
154
155 rt2880_pinmux_data = rt3883_pinmux_data;
246} 156}
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-31 07:44:31 -0400