diff options
Diffstat (limited to 'arch/mips/ralink/rt288x.c')
-rw-r--r-- | arch/mips/ralink/rt288x.c | 65 |
1 files changed, 22 insertions, 43 deletions
diff --git a/arch/mips/ralink/rt288x.c b/arch/mips/ralink/rt288x.c index f87de1ab2198..738cec865f41 100644 --- a/arch/mips/ralink/rt288x.c +++ b/arch/mips/ralink/rt288x.c | |||
@@ -17,46 +17,27 @@ | |||
17 | #include <asm/mipsregs.h> | 17 | #include <asm/mipsregs.h> |
18 | #include <asm/mach-ralink/ralink_regs.h> | 18 | #include <asm/mach-ralink/ralink_regs.h> |
19 | #include <asm/mach-ralink/rt288x.h> | 19 | #include <asm/mach-ralink/rt288x.h> |
20 | #include <asm/mach-ralink/pinmux.h> | ||
20 | 21 | ||
21 | #include "common.h" | 22 | #include "common.h" |
22 | 23 | ||
23 | static struct ralink_pinmux_grp mode_mux[] = { | 24 | static struct rt2880_pmx_func i2c_func[] = { FUNC("i2c", 0, 1, 2) }; |
24 | { | 25 | static struct rt2880_pmx_func spi_func[] = { FUNC("spi", 0, 3, 4) }; |
25 | .name = "i2c", | 26 | static struct rt2880_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 7, 8) }; |
26 | .mask = RT2880_GPIO_MODE_I2C, | 27 | static struct rt2880_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 5) }; |
27 | .gpio_first = 1, | 28 | static struct rt2880_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 2) }; |
28 | .gpio_last = 2, | 29 | static struct rt2880_pmx_func sdram_func[] = { FUNC("sdram", 0, 24, 16) }; |
29 | }, { | 30 | static struct rt2880_pmx_func pci_func[] = { FUNC("pci", 0, 40, 32) }; |
30 | .name = "spi", | 31 | |
31 | .mask = RT2880_GPIO_MODE_SPI, | 32 | static struct rt2880_pmx_group rt2880_pinmux_data_act[] = { |
32 | .gpio_first = 3, | 33 | GRP("i2c", i2c_func, 1, RT2880_GPIO_MODE_I2C), |
33 | .gpio_last = 6, | 34 | GRP("spi", spi_func, 1, RT2880_GPIO_MODE_SPI), |
34 | }, { | 35 | GRP("uartlite", uartlite_func, 1, RT2880_GPIO_MODE_UART0), |
35 | .name = "uartlite", | 36 | GRP("jtag", jtag_func, 1, RT2880_GPIO_MODE_JTAG), |
36 | .mask = RT2880_GPIO_MODE_UART0, | 37 | GRP("mdio", mdio_func, 1, RT2880_GPIO_MODE_MDIO), |
37 | .gpio_first = 7, | 38 | GRP("sdram", sdram_func, 1, RT2880_GPIO_MODE_SDRAM), |
38 | .gpio_last = 14, | 39 | GRP("pci", pci_func, 1, RT2880_GPIO_MODE_PCI), |
39 | }, { | 40 | { 0 } |
40 | .name = "jtag", | ||
41 | .mask = RT2880_GPIO_MODE_JTAG, | ||
42 | .gpio_first = 17, | ||
43 | .gpio_last = 21, | ||
44 | }, { | ||
45 | .name = "mdio", | ||
46 | .mask = RT2880_GPIO_MODE_MDIO, | ||
47 | .gpio_first = 22, | ||
48 | .gpio_last = 23, | ||
49 | }, { | ||
50 | .name = "sdram", | ||
51 | .mask = RT2880_GPIO_MODE_SDRAM, | ||
52 | .gpio_first = 24, | ||
53 | .gpio_last = 39, | ||
54 | }, { | ||
55 | .name = "pci", | ||
56 | .mask = RT2880_GPIO_MODE_PCI, | ||
57 | .gpio_first = 40, | ||
58 | .gpio_last = 71, | ||
59 | }, {0} | ||
60 | }; | 41 | }; |
61 | 42 | ||
62 | static void rt288x_wdt_reset(void) | 43 | static void rt288x_wdt_reset(void) |
@@ -69,14 +50,9 @@ static void rt288x_wdt_reset(void) | |||
69 | rt_sysc_w32(t, SYSC_REG_CLKCFG); | 50 | rt_sysc_w32(t, SYSC_REG_CLKCFG); |
70 | } | 51 | } |
71 | 52 | ||
72 | struct ralink_pinmux rt_gpio_pinmux = { | ||
73 | .mode = mode_mux, | ||
74 | .wdt_reset = rt288x_wdt_reset, | ||
75 | }; | ||
76 | |||
77 | void __init ralink_clk_init(void) | 53 | void __init ralink_clk_init(void) |
78 | { | 54 | { |
79 | unsigned long cpu_rate; | 55 | unsigned long cpu_rate, wmac_rate = 40000000; |
80 | u32 t = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG); | 56 | u32 t = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG); |
81 | t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK); | 57 | t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK); |
82 | 58 | ||
@@ -101,6 +77,7 @@ void __init ralink_clk_init(void) | |||
101 | ralink_clk_add("300500.uart", cpu_rate / 2); | 77 | ralink_clk_add("300500.uart", cpu_rate / 2); |
102 | ralink_clk_add("300c00.uartlite", cpu_rate / 2); | 78 | ralink_clk_add("300c00.uartlite", cpu_rate / 2); |
103 | ralink_clk_add("400000.ethernet", cpu_rate / 2); | 79 | ralink_clk_add("400000.ethernet", cpu_rate / 2); |
80 | ralink_clk_add("480000.wmac", wmac_rate); | ||
104 | } | 81 | } |
105 | 82 | ||
106 | void __init ralink_of_remap(void) | 83 | void __init ralink_of_remap(void) |
@@ -140,4 +117,6 @@ void prom_soc_init(struct ralink_soc_info *soc_info) | |||
140 | soc_info->mem_base = RT2880_SDRAM_BASE; | 117 | soc_info->mem_base = RT2880_SDRAM_BASE; |
141 | soc_info->mem_size_min = RT2880_MEM_SIZE_MIN; | 118 | soc_info->mem_size_min = RT2880_MEM_SIZE_MIN; |
142 | soc_info->mem_size_max = RT2880_MEM_SIZE_MAX; | 119 | soc_info->mem_size_max = RT2880_MEM_SIZE_MAX; |
120 | |||
121 | rt2880_pinmux_data = rt2880_pinmux_data_act; | ||
143 | } | 122 | } |