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-rw-r--r--arch/mips/powertv/Makefile7
-rw-r--r--arch/mips/powertv/Platform7
-rw-r--r--arch/mips/powertv/asic/Makefile6
-rw-r--r--arch/mips/powertv/asic/asic-calliope.c2
-rw-r--r--arch/mips/powertv/asic/asic-cronus.c4
-rw-r--r--arch/mips/powertv/asic/asic-gaia.c96
-rw-r--r--arch/mips/powertv/asic/asic-zeus.c2
-rw-r--r--arch/mips/powertv/asic/asic_devices.c276
-rw-r--r--arch/mips/powertv/asic/prealloc-gaia.c589
-rw-r--r--arch/mips/powertv/init.c4
-rw-r--r--arch/mips/powertv/ioremap.c136
-rw-r--r--arch/mips/powertv/memory.c341
-rw-r--r--arch/mips/powertv/powertv-usb.c403
-rw-r--r--arch/mips/powertv/powertv_setup.c6
14 files changed, 1538 insertions, 341 deletions
diff --git a/arch/mips/powertv/Makefile b/arch/mips/powertv/Makefile
index 0a0d73c0564f..baf6e9092a9f 100644
--- a/arch/mips/powertv/Makefile
+++ b/arch/mips/powertv/Makefile
@@ -23,6 +23,9 @@
23# under Linux. 23# under Linux.
24# 24#
25 25
26obj-y += init.o memory.o reset.o time.o powertv_setup.o asic/ pci/ 26obj-y += init.o ioremap.o memory.o powertv_setup.o reset.o time.o \
27 asic/ pci/
27 28
28EXTRA_CFLAGS += -Wall -Werror 29obj-$(CONFIG_USB) += powertv-usb.o
30
31EXTRA_CFLAGS += -Wall
diff --git a/arch/mips/powertv/Platform b/arch/mips/powertv/Platform
new file mode 100644
index 000000000000..4eb5af1d8eea
--- /dev/null
+++ b/arch/mips/powertv/Platform
@@ -0,0 +1,7 @@
1#
2# Cisco PowerTV Platform
3#
4platform-$(CONFIG_POWERTV) += powertv/
5cflags-$(CONFIG_POWERTV) += \
6 -I$(srctree)/arch/mips/include/asm/mach-powertv
7load-$(CONFIG_POWERTV) += 0xffffffff90800000
diff --git a/arch/mips/powertv/asic/Makefile b/arch/mips/powertv/asic/Makefile
index bebfdcff0443..f0e95dc0ac97 100644
--- a/arch/mips/powertv/asic/Makefile
+++ b/arch/mips/powertv/asic/Makefile
@@ -16,8 +16,8 @@
16# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 16# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17# 17#
18 18
19obj-y += asic-calliope.o asic-cronus.o asic-zeus.o asic_devices.o asic_int.o \ 19obj-y += asic-calliope.o asic-cronus.o asic-gaia.o asic-zeus.o \
20 irq_asic.o prealloc-calliope.o prealloc-cronus.o \ 20 asic_devices.o asic_int.o irq_asic.o prealloc-calliope.o \
21 prealloc-cronuslite.o prealloc-zeus.o 21 prealloc-cronus.o prealloc-cronuslite.o prealloc-gaia.o prealloc-zeus.o
22 22
23EXTRA_CFLAGS += -Wall -Werror 23EXTRA_CFLAGS += -Wall -Werror
diff --git a/arch/mips/powertv/asic/asic-calliope.c b/arch/mips/powertv/asic/asic-calliope.c
index 1ae6623444b2..0a170e0ffeaa 100644
--- a/arch/mips/powertv/asic/asic-calliope.c
+++ b/arch/mips/powertv/asic/asic-calliope.c
@@ -77,7 +77,7 @@ const struct register_map calliope_register_map __initdata = {
77 .int_docsis_en = {.phys = CALLIOPE_ADDR(0xA028F4)}, 77 .int_docsis_en = {.phys = CALLIOPE_ADDR(0xA028F4)},
78 78
79 .mips_pll_setup = {.phys = CALLIOPE_ADDR(0x980000)}, 79 .mips_pll_setup = {.phys = CALLIOPE_ADDR(0x980000)},
80 .usb_fs = {.phys = CALLIOPE_ADDR(0x980030)}, 80 .fs432x4b4_usb_ctl = {.phys = CALLIOPE_ADDR(0x980030)},
81 .test_bus = {.phys = CALLIOPE_ADDR(0x9800CC)}, 81 .test_bus = {.phys = CALLIOPE_ADDR(0x9800CC)},
82 .crt_spare = {.phys = CALLIOPE_ADDR(0x9800d4)}, 82 .crt_spare = {.phys = CALLIOPE_ADDR(0x9800d4)},
83 .usb2_ohci_int_mask = {.phys = CALLIOPE_ADDR(0x9A000c)}, 83 .usb2_ohci_int_mask = {.phys = CALLIOPE_ADDR(0x9A000c)},
diff --git a/arch/mips/powertv/asic/asic-cronus.c b/arch/mips/powertv/asic/asic-cronus.c
index 5bb64bfb508b..bbc0c122be5e 100644
--- a/arch/mips/powertv/asic/asic-cronus.c
+++ b/arch/mips/powertv/asic/asic-cronus.c
@@ -77,13 +77,13 @@ const struct register_map cronus_register_map __initdata = {
77 .int_docsis_en = {.phys = CRONUS_ADDR(0x2A28F4)}, 77 .int_docsis_en = {.phys = CRONUS_ADDR(0x2A28F4)},
78 78
79 .mips_pll_setup = {.phys = CRONUS_ADDR(0x1C0000)}, 79 .mips_pll_setup = {.phys = CRONUS_ADDR(0x1C0000)},
80 .usb_fs = {.phys = CRONUS_ADDR(0x1C0018)}, 80 .fs432x4b4_usb_ctl = {.phys = CRONUS_ADDR(0x1C0028)},
81 .test_bus = {.phys = CRONUS_ADDR(0x1C00CC)}, 81 .test_bus = {.phys = CRONUS_ADDR(0x1C00CC)},
82 .crt_spare = {.phys = CRONUS_ADDR(0x1c00d4)}, 82 .crt_spare = {.phys = CRONUS_ADDR(0x1c00d4)},
83 .usb2_ohci_int_mask = {.phys = CRONUS_ADDR(0x20000C)}, 83 .usb2_ohci_int_mask = {.phys = CRONUS_ADDR(0x20000C)},
84 .usb2_strap = {.phys = CRONUS_ADDR(0x200014)}, 84 .usb2_strap = {.phys = CRONUS_ADDR(0x200014)},
85 .ehci_hcapbase = {.phys = CRONUS_ADDR(0x21FE00)}, 85 .ehci_hcapbase = {.phys = CRONUS_ADDR(0x21FE00)},
86 .ohci_hc_revision = {.phys = CRONUS_ADDR(0x1E0000)}, 86 .ohci_hc_revision = {.phys = CRONUS_ADDR(0x21fc00)},
87 .bcm1_bs_lmi_steer = {.phys = CRONUS_ADDR(0x2E0008)}, 87 .bcm1_bs_lmi_steer = {.phys = CRONUS_ADDR(0x2E0008)},
88 .usb2_control = {.phys = CRONUS_ADDR(0x2E004C)}, 88 .usb2_control = {.phys = CRONUS_ADDR(0x2E004C)},
89 .usb2_stbus_obc = {.phys = CRONUS_ADDR(0x21FF00)}, 89 .usb2_stbus_obc = {.phys = CRONUS_ADDR(0x21FF00)},
diff --git a/arch/mips/powertv/asic/asic-gaia.c b/arch/mips/powertv/asic/asic-gaia.c
new file mode 100644
index 000000000000..91dda682752c
--- /dev/null
+++ b/arch/mips/powertv/asic/asic-gaia.c
@@ -0,0 +1,96 @@
1/*
2 * Locations of devices in the Gaia ASIC
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: David VomLehn
21 */
22
23#include <linux/init.h>
24#include <asm/mach-powertv/asic.h>
25
26const struct register_map gaia_register_map __initdata = {
27 .eic_slow0_strt_add = {.phys = GAIA_IO_BASE + 0x000000},
28 .eic_cfg_bits = {.phys = GAIA_IO_BASE + 0x000038},
29 .eic_ready_status = {.phys = GAIA_IO_BASE + 0x00004C},
30
31 .chipver3 = {.phys = GAIA_IO_BASE + 0x2A0800},
32 .chipver2 = {.phys = GAIA_IO_BASE + 0x2A0804},
33 .chipver1 = {.phys = GAIA_IO_BASE + 0x2A0808},
34 .chipver0 = {.phys = GAIA_IO_BASE + 0x2A080C},
35
36 /* The registers of IRBlaster */
37 .uart1_intstat = {.phys = GAIA_IO_BASE + 0x2A1800},
38 .uart1_inten = {.phys = GAIA_IO_BASE + 0x2A1804},
39 .uart1_config1 = {.phys = GAIA_IO_BASE + 0x2A1808},
40 .uart1_config2 = {.phys = GAIA_IO_BASE + 0x2A180C},
41 .uart1_divisorhi = {.phys = GAIA_IO_BASE + 0x2A1810},
42 .uart1_divisorlo = {.phys = GAIA_IO_BASE + 0x2A1814},
43 .uart1_data = {.phys = GAIA_IO_BASE + 0x2A1818},
44 .uart1_status = {.phys = GAIA_IO_BASE + 0x2A181C},
45
46 .int_stat_3 = {.phys = GAIA_IO_BASE + 0x2A2800},
47 .int_stat_2 = {.phys = GAIA_IO_BASE + 0x2A2804},
48 .int_stat_1 = {.phys = GAIA_IO_BASE + 0x2A2808},
49 .int_stat_0 = {.phys = GAIA_IO_BASE + 0x2A280C},
50 .int_config = {.phys = GAIA_IO_BASE + 0x2A2810},
51 .int_int_scan = {.phys = GAIA_IO_BASE + 0x2A2818},
52 .ien_int_3 = {.phys = GAIA_IO_BASE + 0x2A2830},
53 .ien_int_2 = {.phys = GAIA_IO_BASE + 0x2A2834},
54 .ien_int_1 = {.phys = GAIA_IO_BASE + 0x2A2838},
55 .ien_int_0 = {.phys = GAIA_IO_BASE + 0x2A283C},
56 .int_level_3_3 = {.phys = GAIA_IO_BASE + 0x2A2880},
57 .int_level_3_2 = {.phys = GAIA_IO_BASE + 0x2A2884},
58 .int_level_3_1 = {.phys = GAIA_IO_BASE + 0x2A2888},
59 .int_level_3_0 = {.phys = GAIA_IO_BASE + 0x2A288C},
60 .int_level_2_3 = {.phys = GAIA_IO_BASE + 0x2A2890},
61 .int_level_2_2 = {.phys = GAIA_IO_BASE + 0x2A2894},
62 .int_level_2_1 = {.phys = GAIA_IO_BASE + 0x2A2898},
63 .int_level_2_0 = {.phys = GAIA_IO_BASE + 0x2A289C},
64 .int_level_1_3 = {.phys = GAIA_IO_BASE + 0x2A28A0},
65 .int_level_1_2 = {.phys = GAIA_IO_BASE + 0x2A28A4},
66 .int_level_1_1 = {.phys = GAIA_IO_BASE + 0x2A28A8},
67 .int_level_1_0 = {.phys = GAIA_IO_BASE + 0x2A28AC},
68 .int_level_0_3 = {.phys = GAIA_IO_BASE + 0x2A28B0},
69 .int_level_0_2 = {.phys = GAIA_IO_BASE + 0x2A28B4},
70 .int_level_0_1 = {.phys = GAIA_IO_BASE + 0x2A28B8},
71 .int_level_0_0 = {.phys = GAIA_IO_BASE + 0x2A28BC},
72 .int_docsis_en = {.phys = GAIA_IO_BASE + 0x2A28F4},
73
74 .mips_pll_setup = {.phys = GAIA_IO_BASE + 0x1C0000},
75 .fs432x4b4_usb_ctl = {.phys = GAIA_IO_BASE + 0x1C0024},
76 .test_bus = {.phys = GAIA_IO_BASE + 0x1C00CC},
77 .crt_spare = {.phys = GAIA_IO_BASE + 0x1c0108},
78 .usb2_ohci_int_mask = {.phys = GAIA_IO_BASE + 0x20000C},
79 .usb2_strap = {.phys = GAIA_IO_BASE + 0x200014},
80 .ehci_hcapbase = {.phys = GAIA_IO_BASE + 0x21FE00},
81 .ohci_hc_revision = {.phys = GAIA_IO_BASE + 0x21fc00},
82 .bcm1_bs_lmi_steer = {.phys = GAIA_IO_BASE + 0x2E0004},
83 .usb2_control = {.phys = GAIA_IO_BASE + 0x2E004C},
84 .usb2_stbus_obc = {.phys = GAIA_IO_BASE + 0x21FF00},
85 .usb2_stbus_mess_size = {.phys = GAIA_IO_BASE + 0x21FF04},
86 .usb2_stbus_chunk_size = {.phys = GAIA_IO_BASE + 0x21FF08},
87
88 .pcie_regs = {.phys = GAIA_IO_BASE + 0x220000},
89 .tim_ch = {.phys = GAIA_IO_BASE + 0x2A2C10},
90 .tim_cl = {.phys = GAIA_IO_BASE + 0x2A2C14},
91 .gpio_dout = {.phys = GAIA_IO_BASE + 0x2A2C20},
92 .gpio_din = {.phys = GAIA_IO_BASE + 0x2A2C24},
93 .gpio_dir = {.phys = GAIA_IO_BASE + 0x2A2C2C},
94 .watchdog = {.phys = GAIA_IO_BASE + 0x2A2C30},
95 .front_panel = {.phys = GAIA_IO_BASE + 0x2A3800},
96};
diff --git a/arch/mips/powertv/asic/asic-zeus.c b/arch/mips/powertv/asic/asic-zeus.c
index 095cbe10ebb9..4a05bb096476 100644
--- a/arch/mips/powertv/asic/asic-zeus.c
+++ b/arch/mips/powertv/asic/asic-zeus.c
@@ -77,7 +77,7 @@ const struct register_map zeus_register_map __initdata = {
77 .int_docsis_en = {.phys = ZEUS_ADDR(0x2828F4)}, 77 .int_docsis_en = {.phys = ZEUS_ADDR(0x2828F4)},
78 78
79 .mips_pll_setup = {.phys = ZEUS_ADDR(0x1a0000)}, 79 .mips_pll_setup = {.phys = ZEUS_ADDR(0x1a0000)},
80 .usb_fs = {.phys = ZEUS_ADDR(0x1a0018)}, 80 .fs432x4b4_usb_ctl = {.phys = ZEUS_ADDR(0x1a0018)},
81 .test_bus = {.phys = ZEUS_ADDR(0x1a0238)}, 81 .test_bus = {.phys = ZEUS_ADDR(0x1a0238)},
82 .crt_spare = {.phys = ZEUS_ADDR(0x1a0090)}, 82 .crt_spare = {.phys = ZEUS_ADDR(0x1a0090)},
83 .usb2_ohci_int_mask = {.phys = ZEUS_ADDR(0x1e000c)}, 83 .usb2_ohci_int_mask = {.phys = ZEUS_ADDR(0x1e000c)},
diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c
index 9ec523e4dd06..e56fa61b3991 100644
--- a/arch/mips/powertv/asic/asic_devices.c
+++ b/arch/mips/powertv/asic/asic_devices.c
@@ -1,7 +1,6 @@
1/* 1/*
2 * ASIC Device List Intialization
3 * 2 *
4 * Description: Defines the platform resources for the SA settop. 3 * Description: Defines the platform resources for Gaia-based settops.
5 * 4 *
6 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. 5 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
7 * 6 *
@@ -19,11 +18,6 @@
19 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 * 20 *
22 * Author: Ken Eppinett
23 * David Schleef <ds@schleef.org>
24 *
25 * Description: Defines the platform resources for the SA settop.
26 *
27 * NOTE: The bootloader allocates persistent memory at an address which is 21 * NOTE: The bootloader allocates persistent memory at an address which is
28 * 16 MiB below the end of the highest address in KSEG0. All fixed 22 * 16 MiB below the end of the highest address in KSEG0. All fixed
29 * address memory reservations must avoid this region. 23 * address memory reservations must avoid this region.
@@ -39,7 +33,6 @@
39#include <linux/mm.h> 33#include <linux/mm.h>
40#include <linux/platform_device.h> 34#include <linux/platform_device.h>
41#include <linux/module.h> 35#include <linux/module.h>
42#include <linux/gfp.h>
43#include <asm/page.h> 36#include <asm/page.h>
44#include <linux/swap.h> 37#include <linux/swap.h>
45#include <linux/highmem.h> 38#include <linux/highmem.h>
@@ -74,14 +67,13 @@ unsigned long asic_phy_base;
74unsigned long asic_base; 67unsigned long asic_base;
75EXPORT_SYMBOL(asic_base); /* Exported for testing */ 68EXPORT_SYMBOL(asic_base); /* Exported for testing */
76struct resource *gp_resources; 69struct resource *gp_resources;
77static bool usb_configured;
78 70
79/* 71/*
80 * Don't recommend to use it directly, it is usually used by kernel internally. 72 * Don't recommend to use it directly, it is usually used by kernel internally.
81 * Portable code should be using interfaces such as ioremp, dma_map_single, etc. 73 * Portable code should be using interfaces such as ioremp, dma_map_single, etc.
82 */ 74 */
83unsigned long phys_to_bus_offset; 75unsigned long phys_to_dma_offset;
84EXPORT_SYMBOL(phys_to_bus_offset); 76EXPORT_SYMBOL(phys_to_dma_offset);
85 77
86/* 78/*
87 * 79 *
@@ -97,101 +89,19 @@ struct resource asic_resource = {
97}; 89};
98 90
99/* 91/*
100 *
101 * USB Host Resource Definition
102 *
103 */
104
105static struct resource ehci_resources[] = {
106 {
107 .parent = &asic_resource,
108 .start = 0,
109 .end = 0xff,
110 .flags = IORESOURCE_MEM,
111 },
112 {
113 .start = irq_usbehci,
114 .end = irq_usbehci,
115 .flags = IORESOURCE_IRQ,
116 },
117};
118
119static u64 ehci_dmamask = DMA_BIT_MASK(32);
120
121static struct platform_device ehci_device = {
122 .name = "powertv-ehci",
123 .id = 0,
124 .num_resources = 2,
125 .resource = ehci_resources,
126 .dev = {
127 .dma_mask = &ehci_dmamask,
128 .coherent_dma_mask = DMA_BIT_MASK(32),
129 },
130};
131
132static struct resource ohci_resources[] = {
133 {
134 .parent = &asic_resource,
135 .start = 0,
136 .end = 0xff,
137 .flags = IORESOURCE_MEM,
138 },
139 {
140 .start = irq_usbohci,
141 .end = irq_usbohci,
142 .flags = IORESOURCE_IRQ,
143 },
144};
145
146static u64 ohci_dmamask = DMA_BIT_MASK(32);
147
148static struct platform_device ohci_device = {
149 .name = "powertv-ohci",
150 .id = 0,
151 .num_resources = 2,
152 .resource = ohci_resources,
153 .dev = {
154 .dma_mask = &ohci_dmamask,
155 .coherent_dma_mask = DMA_BIT_MASK(32),
156 },
157};
158
159static struct platform_device *platform_devices[] = {
160 &ehci_device,
161 &ohci_device,
162};
163
164/*
165 *
166 * Platform Configuration and Device Initialization
167 *
168 */
169static void __init fs_update(int pe, int md, int sdiv, int disable_div_by_3)
170{
171 int en_prg, byp, pwr, nsb, val;
172 int sout;
173
174 sout = 1;
175 en_prg = 1;
176 byp = 0;
177 nsb = 1;
178 pwr = 1;
179
180 val = ((sdiv << 29) | (md << 24) | (pe<<8) | (sout<<3) | (byp<<2) |
181 (nsb<<1) | (disable_div_by_3<<5));
182
183 asic_write(val, usb_fs);
184 asic_write(val | (en_prg<<4), usb_fs);
185 asic_write(val | (en_prg<<4) | pwr, usb_fs);
186}
187
188/*
189 * Allow override of bootloader-specified model 92 * Allow override of bootloader-specified model
93 * Returns zero on success, a negative errno value on failure. This parameter
94 * allows overriding of the bootloader-specified model.
190 */ 95 */
191static char __initdata cmdline[COMMAND_LINE_SIZE]; 96static char __initdata cmdline[COMMAND_LINE_SIZE];
192 97
193#define FORCEFAMILY_PARAM "forcefamily" 98#define FORCEFAMILY_PARAM "forcefamily"
194 99
100/*
101 * check_forcefamily - check for, and parse, forcefamily command line parameter
102 * @forced_family: Pointer to two-character array in which to store the
103 * value of the forcedfamily parameter, if any.
104 */
195static __init int check_forcefamily(unsigned char forced_family[2]) 105static __init int check_forcefamily(unsigned char forced_family[2])
196{ 106{
197 const char *p; 107 const char *p;
@@ -231,14 +141,10 @@ static __init int check_forcefamily(unsigned char forced_family[2])
231 */ 141 */
232static __init noinline void platform_set_family(void) 142static __init noinline void platform_set_family(void)
233{ 143{
234#define BOOTLDRFAMILY(byte1, byte0) (((byte1) << 8) | (byte0))
235
236 unsigned char forced_family[2]; 144 unsigned char forced_family[2];
237 unsigned short bootldr_family; 145 unsigned short bootldr_family;
238 146
239 check_forcefamily(forced_family); 147 if (check_forcefamily(forced_family) == 0)
240
241 if (forced_family[0] != '\0' && forced_family[1] != '\0')
242 bootldr_family = BOOTLDRFAMILY(forced_family[0], 148 bootldr_family = BOOTLDRFAMILY(forced_family[0],
243 forced_family[1]); 149 forced_family[1]);
244 else { 150 else {
@@ -289,6 +195,9 @@ static __init noinline void platform_set_family(void)
289 case BOOTLDRFAMILY('F', '1'): 195 case BOOTLDRFAMILY('F', '1'):
290 platform_family = FAMILY_1500VZF; 196 platform_family = FAMILY_1500VZF;
291 break; 197 break;
198 case BOOTLDRFAMILY('8', '7'):
199 platform_family = FAMILY_8700;
200 break;
292 default: 201 default:
293 platform_family = -1; 202 platform_family = -1;
294 } 203 }
@@ -301,24 +210,9 @@ unsigned int platform_get_family(void)
301EXPORT_SYMBOL(platform_get_family); 210EXPORT_SYMBOL(platform_get_family);
302 211
303/* 212/*
304 * \brief usb_eye_configure() for optimizing the USB eye on Calliope.
305 *
306 * \param unsigned int value saved to the register.
307 *
308 * \return none
309 *
310 */
311static void __init usb_eye_configure(unsigned int value)
312{
313 asic_write(asic_read(crt_spare) | value, crt_spare);
314}
315
316/*
317 * platform_get_asic - determine the ASIC type. 213 * platform_get_asic - determine the ASIC type.
318 * 214 *
319 * \param none 215 * Returns the ASIC type, or ASIC_UNKNOWN if unknown
320 *
321 * \return ASIC type; ASIC_UNKNOWN if none
322 * 216 *
323 */ 217 */
324enum asic_type platform_get_asic(void) 218enum asic_type platform_get_asic(void)
@@ -328,93 +222,10 @@ enum asic_type platform_get_asic(void)
328EXPORT_SYMBOL(platform_get_asic); 222EXPORT_SYMBOL(platform_get_asic);
329 223
330/* 224/*
331 * platform_configure_usb - usb configuration based on platform type. 225 * set_register_map - set ASIC register configuration
332 * @bcm1_usb2_ctl: value for the BCM1_USB2_CTL register, which is 226 * @phys_base: Physical address of the base of the ASIC registers
333 * quirky 227 * @map: Description of key ASIC registers
334 */
335static void __init platform_configure_usb(void)
336{
337 u32 bcm1_usb2_ctl;
338
339 if (usb_configured)
340 return;
341
342 switch (asic) {
343 case ASIC_ZEUS:
344 case ASIC_CRONUS:
345 case ASIC_CRONUSLITE:
346 fs_update(0x0000, 0x11, 0x02, 0);
347 bcm1_usb2_ctl = 0x803;
348 break;
349
350 case ASIC_CALLIOPE:
351 fs_update(0x0000, 0x11, 0x02, 1);
352
353 switch (platform_family) {
354 case FAMILY_1500VZE:
355 break;
356
357 case FAMILY_1500VZF:
358 usb_eye_configure(0x003c0000);
359 break;
360
361 default:
362 usb_eye_configure(0x00300000);
363 break;
364 }
365
366 bcm1_usb2_ctl = 0x803;
367 break;
368
369 default:
370 pr_err("Unknown ASIC type: %d\n", asic);
371 break;
372 }
373
374 /* turn on USB power */
375 asic_write(0, usb2_strap);
376 /* Enable all OHCI interrupts */
377 asic_write(bcm1_usb2_ctl, usb2_control);
378 /* USB2_STBUS_OBC store32/load32 */
379 asic_write(3, usb2_stbus_obc);
380 /* USB2_STBUS_MESS_SIZE 2 packets */
381 asic_write(1, usb2_stbus_mess_size);
382 /* USB2_STBUS_CHUNK_SIZE 2 packets */
383 asic_write(1, usb2_stbus_chunk_size);
384
385 usb_configured = true;
386}
387
388/*
389 * Set up the USB EHCI interface
390 */ 228 */
391void platform_configure_usb_ehci()
392{
393 platform_configure_usb();
394}
395
396/*
397 * Set up the USB OHCI interface
398 */
399void platform_configure_usb_ohci()
400{
401 platform_configure_usb();
402}
403
404/*
405 * Shut the USB EHCI interface down--currently a NOP
406 */
407void platform_unconfigure_usb_ehci()
408{
409}
410
411/*
412 * Shut the USB OHCI interface down--currently a NOP
413 */
414void platform_unconfigure_usb_ohci()
415{
416}
417
418static void __init set_register_map(unsigned long phys_base, 229static void __init set_register_map(unsigned long phys_base,
419 const struct register_map *map) 230 const struct register_map *map)
420{ 231{
@@ -526,6 +337,15 @@ void __init configure_platform(void)
526 "DVR_CAPABLE\n"); 337 "DVR_CAPABLE\n");
527 break; 338 break;
528 339
340 case FAMILY_8700:
341 platform_features = FFS_CAPABLE | PCIE_CAPABLE;
342 asic = ASIC_GAIA;
343 set_register_map(GAIA_IO_BASE, &gaia_register_map);
344 gp_resources = dvr_gaia_resources;
345
346 pr_info("Platform: 8700 - GAIA, DVR_CAPABLE\n");
347 break;
348
529 default: 349 default:
530 pr_crit("Platform: UNKNOWN PLATFORM\n"); 350 pr_crit("Platform: UNKNOWN PLATFORM\n");
531 break; 351 break;
@@ -533,10 +353,10 @@ void __init configure_platform(void)
533 353
534 switch (asic) { 354 switch (asic) {
535 case ASIC_ZEUS: 355 case ASIC_ZEUS:
536 phys_to_bus_offset = 0x30000000; 356 phys_to_dma_offset = 0x30000000;
537 break; 357 break;
538 case ASIC_CALLIOPE: 358 case ASIC_CALLIOPE:
539 phys_to_bus_offset = 0x10000000; 359 phys_to_dma_offset = 0x10000000;
540 break; 360 break;
541 case ASIC_CRONUSLITE: 361 case ASIC_CRONUSLITE:
542 /* Fall through */ 362 /* Fall through */
@@ -546,42 +366,16 @@ void __init configure_platform(void)
546 * 0x2XXXXXXX. If 0x10000000 aliases into 0x60000000- 366 * 0x2XXXXXXX. If 0x10000000 aliases into 0x60000000-
547 * 0x6XXXXXXX, the offset should be 0x50000000, not 0x10000000. 367 * 0x6XXXXXXX, the offset should be 0x50000000, not 0x10000000.
548 */ 368 */
549 phys_to_bus_offset = 0x10000000; 369 phys_to_dma_offset = 0x10000000;
550 break; 370 break;
551 default: 371 default:
552 phys_to_bus_offset = 0x00000000; 372 phys_to_dma_offset = 0x00000000;
553 break; 373 break;
554 } 374 }
555} 375}
556 376
557/**
558 * platform_devices_init - sets up USB device resourse.
559 */
560static int __init platform_devices_init(void)
561{
562 pr_notice("%s: ----- Initializing USB resources -----\n", __func__);
563
564 asic_resource.start = asic_phy_base;
565 asic_resource.end += asic_resource.start;
566
567 ehci_resources[0].start = asic_reg_phys_addr(ehci_hcapbase);
568 ehci_resources[0].end += ehci_resources[0].start;
569
570 ohci_resources[0].start = asic_reg_phys_addr(ohci_hc_revision);
571 ohci_resources[0].end += ohci_resources[0].start;
572
573 set_io_port_base(0);
574
575 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
576
577 return 0;
578}
579
580arch_initcall(platform_devices_init);
581
582/* 377/*
583 * 378 * RESOURCE ALLOCATION
584 * BOOTMEM ALLOCATION
585 * 379 *
586 */ 380 */
587/* 381/*
@@ -603,7 +397,7 @@ void __init platform_alloc_bootmem(void)
603 int size = gp_resources[i].end - gp_resources[i].start + 1; 397 int size = gp_resources[i].end - gp_resources[i].start + 1;
604 if ((gp_resources[i].start != 0) && 398 if ((gp_resources[i].start != 0) &&
605 ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) { 399 ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) {
606 reserve_bootmem(bus_to_phys(gp_resources[i].start), 400 reserve_bootmem(dma_to_phys(gp_resources[i].start),
607 size, 0); 401 size, 0);
608 total += gp_resources[i].end - 402 total += gp_resources[i].end -
609 gp_resources[i].start + 1; 403 gp_resources[i].start + 1;
@@ -627,7 +421,7 @@ void __init platform_alloc_bootmem(void)
627 421
628 else { 422 else {
629 gp_resources[i].start = 423 gp_resources[i].start =
630 phys_to_bus(virt_to_phys(mem)); 424 phys_to_dma(virt_to_phys(mem));
631 gp_resources[i].end = 425 gp_resources[i].end =
632 gp_resources[i].start + size - 1; 426 gp_resources[i].start + size - 1;
633 total += size; 427 total += size;
@@ -691,7 +485,7 @@ static void __init pmem_setup_resource(void)
691 if (resource && pmemaddr && pmemlen) { 485 if (resource && pmemaddr && pmemlen) {
692 /* The address provided by bootloader is in kseg0. Convert to 486 /* The address provided by bootloader is in kseg0. Convert to
693 * a bus address. */ 487 * a bus address. */
694 resource->start = phys_to_bus(pmemaddr - 0x80000000); 488 resource->start = phys_to_dma(pmemaddr - 0x80000000);
695 resource->end = resource->start + pmemlen - 1; 489 resource->end = resource->start + pmemlen - 1;
696 490
697 pr_info("persistent memory: start=0x%x end=0x%x\n", 491 pr_info("persistent memory: start=0x%x end=0x%x\n",
diff --git a/arch/mips/powertv/asic/prealloc-gaia.c b/arch/mips/powertv/asic/prealloc-gaia.c
new file mode 100644
index 000000000000..8ac8c7aeb986
--- /dev/null
+++ b/arch/mips/powertv/asic/prealloc-gaia.c
@@ -0,0 +1,589 @@
1/*
2 * Memory pre-allocations for Gaia boxes.
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: David VomLehn
21 */
22
23#include <linux/init.h>
24#include <asm/mach-powertv/asic.h>
25
26/*
27 * DVR_CAPABLE GAIA RESOURCES
28 */
29struct resource dvr_gaia_resources[] __initdata = {
30 /*
31 *
32 * VIDEO1 / LX1
33 *
34 */
35 {
36 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
37 .start = 0x24000000,
38 .end = 0x241FFFFF, /* 2MiB */
39 .flags = IORESOURCE_MEM,
40 },
41 {
42 .name = "ST231aMonitor", /* 8KiB block ST231a monitor */
43 .start = 0x24200000,
44 .end = 0x24201FFF,
45 .flags = IORESOURCE_MEM,
46 },
47 {
48 .name = "MediaMemory1",
49 .start = 0x24202000,
50 .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
51 .flags = IORESOURCE_MEM,
52 },
53 /*
54 *
55 * VIDEO2 / LX2
56 *
57 */
58 {
59 .name = "ST231bImage", /* Delta-Mu 2 image and ram */
60 .start = 0x60000000,
61 .end = 0x601FFFFF, /* 2MiB */
62 .flags = IORESOURCE_IO,
63 },
64 {
65 .name = "ST231bMonitor", /* 8KiB block ST231b monitor */
66 .start = 0x60200000,
67 .end = 0x60201FFF,
68 .flags = IORESOURCE_IO,
69 },
70 {
71 .name = "MediaMemory2",
72 .start = 0x60202000,
73 .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
74 .flags = IORESOURCE_IO,
75 },
76 /*
77 *
78 * Sysaudio Driver
79 *
80 * This driver requires:
81 *
82 * Arbitrary Based Buffers:
83 * DSP_Image_Buff - DSP code and data images (1MB)
84 * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
85 * ADSC_AUX_Buff - ADSC AUX buffer (16KB)
86 * ADSC_Main_Buff - ADSC Main buffer (16KB)
87 *
88 */
89 {
90 .name = "DSP_Image_Buff",
91 .start = 0x00000000,
92 .end = 0x000FFFFF,
93 .flags = IORESOURCE_MEM,
94 },
95 {
96 .name = "ADSC_CPU_PCM_Buff",
97 .start = 0x00000000,
98 .end = 0x00009FFF,
99 .flags = IORESOURCE_MEM,
100 },
101 {
102 .name = "ADSC_AUX_Buff",
103 .start = 0x00000000,
104 .end = 0x00003FFF,
105 .flags = IORESOURCE_MEM,
106 },
107 {
108 .name = "ADSC_Main_Buff",
109 .start = 0x00000000,
110 .end = 0x00003FFF,
111 .flags = IORESOURCE_MEM,
112 },
113 /*
114 *
115 * STAVEM driver/STAPI
116 *
117 * This driver requires:
118 *
119 * Arbitrary Based Buffers:
120 * This memory area is used for allocating buffers for Video decoding
121 * purposes. Allocation/De-allocation within this buffer is managed
122 * by the STAVMEM driver of the STAPI. They could be Decimated
123 * Picture Buffers, Intermediate Buffers, as deemed necessary for
124 * video decoding purposes, for any video decoders on Zeus.
125 *
126 */
127 {
128 .name = "AVMEMPartition0",
129 .start = 0x63580000,
130 .end = 0x64180000 - 1, /* 12 MB total */
131 .flags = IORESOURCE_IO,
132 },
133 /*
134 *
135 * DOCSIS Subsystem
136 *
137 * This driver requires:
138 *
139 * Arbitrary Based Buffers:
140 * Docsis -
141 *
142 */
143 {
144 .name = "Docsis",
145 .start = 0x62000000,
146 .end = 0x62700000 - 1, /* 7 MB total */
147 .flags = IORESOURCE_IO,
148 },
149 /*
150 *
151 * GHW HAL Driver
152 *
153 * This driver requires:
154 *
155 * Arbitrary Based Buffers:
156 * GraphicsHeap - PowerTV Graphics Heap
157 *
158 */
159 {
160 .name = "GraphicsHeap",
161 .start = 0x62700000,
162 .end = 0x63500000 - 1, /* 14 MB total */
163 .flags = IORESOURCE_IO,
164 },
165 /*
166 *
167 * multi com buffer area
168 *
169 * This driver requires:
170 *
171 * Arbitrary Based Buffers:
172 * Docsis -
173 *
174 */
175 {
176 .name = "MulticomSHM",
177 .start = 0x26000000,
178 .end = 0x26020000 - 1,
179 .flags = IORESOURCE_MEM,
180 },
181 /*
182 *
183 * DMA Ring buffer
184 *
185 * This driver requires:
186 *
187 * Arbitrary Based Buffers:
188 * Docsis -
189 *
190 */
191 {
192 .name = "BMM_Buffer",
193 .start = 0x00000000,
194 .end = 0x00280000 - 1,
195 .flags = IORESOURCE_MEM,
196 },
197 /*
198 *
199 * Display bins buffer for unit0
200 *
201 * This driver requires:
202 *
203 * Arbitrary Based Buffers:
204 * Display Bins for unit0
205 *
206 */
207 {
208 .name = "DisplayBins0",
209 .start = 0x00000000,
210 .end = 0x00000FFF, /* 4 KB total */
211 .flags = IORESOURCE_MEM,
212 },
213 /*
214 *
215 * Display bins buffer
216 *
217 * This driver requires:
218 *
219 * Arbitrary Based Buffers:
220 * Display Bins for unit1
221 *
222 */
223 {
224 .name = "DisplayBins1",
225 .start = 0x64AD4000,
226 .end = 0x64AD5000 - 1, /* 4 KB total */
227 .flags = IORESOURCE_IO,
228 },
229 /*
230 *
231 * ITFS
232 *
233 * This driver requires:
234 *
235 * Arbitrary Based Buffers:
236 * Docsis -
237 *
238 */
239 {
240 .name = "ITFS",
241 .start = 0x64180000,
242 /* 815,104 bytes each for 2 ITFS partitions. */
243 .end = 0x6430DFFF,
244 .flags = IORESOURCE_IO,
245 },
246 /*
247 *
248 * AVFS
249 *
250 * This driver requires:
251 *
252 * Arbitrary Based Buffers:
253 * Docsis -
254 *
255 */
256 {
257 .name = "AvfsDmaMem",
258 .start = 0x6430E000,
259 /* (945K * 8) = (128K *3) 5 playbacks / 3 server */
260 .end = 0x64AD0000 - 1,
261 .flags = IORESOURCE_IO,
262 },
263 {
264 .name = "AvfsFileSys",
265 .start = 0x64AD0000,
266 .end = 0x64AD1000 - 1, /* 4K */
267 .flags = IORESOURCE_IO,
268 },
269 /*
270 *
271 * Smartcard
272 *
273 * This driver requires:
274 *
275 * Arbitrary Based Buffers:
276 * Read and write buffers for Internal/External cards
277 *
278 */
279 {
280 .name = "SmartCardInfo",
281 .start = 0x64AD1000,
282 .end = 0x64AD3800 - 1,
283 .flags = IORESOURCE_IO,
284 },
285 /*
286 *
287 * KAVNET
288 * NP Reset Vector - must be of the form xxCxxxxx
289 * NP Image - must be video bank 1
290 * NP IPC - must be video bank 2
291 */
292 {
293 .name = "NP_Reset_Vector",
294 .start = 0x27c00000,
295 .end = 0x27c01000 - 1,
296 .flags = IORESOURCE_MEM,
297 },
298 {
299 .name = "NP_Image",
300 .start = 0x27020000,
301 .end = 0x27060000 - 1,
302 .flags = IORESOURCE_MEM,
303 },
304 {
305 .name = "NP_IPC",
306 .start = 0x63500000,
307 .end = 0x63580000 - 1,
308 .flags = IORESOURCE_IO,
309 },
310 /*
311 * Add other resources here
312 */
313 { },
314};
315
316/*
317 * NON_DVR_CAPABLE GAIA RESOURCES
318 */
319struct resource non_dvr_gaia_resources[] __initdata = {
320 /*
321 *
322 * VIDEO1 / LX1
323 *
324 */
325 {
326 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
327 .start = 0x24000000,
328 .end = 0x241FFFFF, /* 2MiB */
329 .flags = IORESOURCE_MEM,
330 },
331 {
332 .name = "ST231aMonitor", /* 8KiB block ST231a monitor */
333 .start = 0x24200000,
334 .end = 0x24201FFF,
335 .flags = IORESOURCE_MEM,
336 },
337 {
338 .name = "MediaMemory1",
339 .start = 0x24202000,
340 .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
341 .flags = IORESOURCE_MEM,
342 },
343 /*
344 *
345 * VIDEO2 / LX2
346 *
347 */
348 {
349 .name = "ST231bImage", /* Delta-Mu 2 image and ram */
350 .start = 0x60000000,
351 .end = 0x601FFFFF, /* 2MiB */
352 .flags = IORESOURCE_IO,
353 },
354 {
355 .name = "ST231bMonitor", /* 8KiB block ST231b monitor */
356 .start = 0x60200000,
357 .end = 0x60201FFF,
358 .flags = IORESOURCE_IO,
359 },
360 {
361 .name = "MediaMemory2",
362 .start = 0x60202000,
363 .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
364 .flags = IORESOURCE_IO,
365 },
366 /*
367 *
368 * Sysaudio Driver
369 *
370 * This driver requires:
371 *
372 * Arbitrary Based Buffers:
373 * DSP_Image_Buff - DSP code and data images (1MB)
374 * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
375 * ADSC_AUX_Buff - ADSC AUX buffer (16KB)
376 * ADSC_Main_Buff - ADSC Main buffer (16KB)
377 *
378 */
379 {
380 .name = "DSP_Image_Buff",
381 .start = 0x00000000,
382 .end = 0x000FFFFF,
383 .flags = IORESOURCE_MEM,
384 },
385 {
386 .name = "ADSC_CPU_PCM_Buff",
387 .start = 0x00000000,
388 .end = 0x00009FFF,
389 .flags = IORESOURCE_MEM,
390 },
391 {
392 .name = "ADSC_AUX_Buff",
393 .start = 0x00000000,
394 .end = 0x00003FFF,
395 .flags = IORESOURCE_MEM,
396 },
397 {
398 .name = "ADSC_Main_Buff",
399 .start = 0x00000000,
400 .end = 0x00003FFF,
401 .flags = IORESOURCE_MEM,
402 },
403 /*
404 *
405 * STAVEM driver/STAPI
406 *
407 * This driver requires:
408 *
409 * Arbitrary Based Buffers:
410 * This memory area is used for allocating buffers for Video decoding
411 * purposes. Allocation/De-allocation within this buffer is managed
412 * by the STAVMEM driver of the STAPI. They could be Decimated
413 * Picture Buffers, Intermediate Buffers, as deemed necessary for
414 * video decoding purposes, for any video decoders on Zeus.
415 *
416 */
417 {
418 .name = "AVMEMPartition0",
419 .start = 0x63580000,
420 .end = 0x64180000 - 1, /* 12 MB total */
421 .flags = IORESOURCE_IO,
422 },
423 /*
424 *
425 * DOCSIS Subsystem
426 *
427 * This driver requires:
428 *
429 * Arbitrary Based Buffers:
430 * Docsis -
431 *
432 */
433 {
434 .name = "Docsis",
435 .start = 0x62000000,
436 .end = 0x62700000 - 1, /* 7 MB total */
437 .flags = IORESOURCE_IO,
438 },
439 /*
440 *
441 * GHW HAL Driver
442 *
443 * This driver requires:
444 *
445 * Arbitrary Based Buffers:
446 * GraphicsHeap - PowerTV Graphics Heap
447 *
448 */
449 {
450 .name = "GraphicsHeap",
451 .start = 0x62700000,
452 .end = 0x63500000 - 1, /* 14 MB total */
453 .flags = IORESOURCE_IO,
454 },
455 /*
456 *
457 * multi com buffer area
458 *
459 * This driver requires:
460 *
461 * Arbitrary Based Buffers:
462 * Docsis -
463 *
464 */
465 {
466 .name = "MulticomSHM",
467 .start = 0x26000000,
468 .end = 0x26020000 - 1,
469 .flags = IORESOURCE_MEM,
470 },
471 /*
472 *
473 * DMA Ring buffer
474 *
475 * This driver requires:
476 *
477 * Arbitrary Based Buffers:
478 * Docsis -
479 *
480 */
481 {
482 .name = "BMM_Buffer",
483 .start = 0x00000000,
484 .end = 0x000AA000 - 1,
485 .flags = IORESOURCE_MEM,
486 },
487 /*
488 *
489 * Display bins buffer for unit0
490 *
491 * This driver requires:
492 *
493 * Arbitrary Based Buffers:
494 * Display Bins for unit0
495 *
496 */
497 {
498 .name = "DisplayBins0",
499 .start = 0x00000000,
500 .end = 0x00000FFF, /* 4 KB total */
501 .flags = IORESOURCE_MEM,
502 },
503 /*
504 *
505 * Display bins buffer
506 *
507 * This driver requires:
508 *
509 * Arbitrary Based Buffers:
510 * Display Bins for unit1
511 *
512 */
513 {
514 .name = "DisplayBins1",
515 .start = 0x64AD4000,
516 .end = 0x64AD5000 - 1, /* 4 KB total */
517 .flags = IORESOURCE_IO,
518 },
519 /*
520 *
521 * AVFS: player HAL memory
522 *
523 *
524 */
525 {
526 .name = "AvfsDmaMem",
527 .start = 0x6430E000,
528 .end = 0x645D2C00 - 1, /* 945K * 3 for playback */
529 .flags = IORESOURCE_IO,
530 },
531 /*
532 *
533 * PMEM
534 *
535 * This driver requires:
536 *
537 * Arbitrary Based Buffers:
538 * Persistent memory for diagnostics.
539 *
540 */
541 {
542 .name = "DiagPersistentMemory",
543 .start = 0x00000000,
544 .end = 0x10000 - 1,
545 .flags = IORESOURCE_MEM,
546 },
547 /*
548 *
549 * Smartcard
550 *
551 * This driver requires:
552 *
553 * Arbitrary Based Buffers:
554 * Read and write buffers for Internal/External cards
555 *
556 */
557 {
558 .name = "SmartCardInfo",
559 .start = 0x64AD1000,
560 .end = 0x64AD3800 - 1,
561 .flags = IORESOURCE_IO,
562 },
563 /*
564 *
565 * KAVNET
566 * NP Reset Vector - must be of the form xxCxxxxx
567 * NP Image - must be video bank 1
568 * NP IPC - must be video bank 2
569 */
570 {
571 .name = "NP_Reset_Vector",
572 .start = 0x27c00000,
573 .end = 0x27c01000 - 1,
574 .flags = IORESOURCE_MEM,
575 },
576 {
577 .name = "NP_Image",
578 .start = 0x27020000,
579 .end = 0x27060000 - 1,
580 .flags = IORESOURCE_MEM,
581 },
582 {
583 .name = "NP_IPC",
584 .start = 0x63500000,
585 .end = 0x63580000 - 1,
586 .flags = IORESOURCE_IO,
587 },
588 { },
589};
diff --git a/arch/mips/powertv/init.c b/arch/mips/powertv/init.c
index 0afe227f1d0a..83552288e802 100644
--- a/arch/mips/powertv/init.c
+++ b/arch/mips/powertv/init.c
@@ -117,8 +117,10 @@ void __init prom_init(void)
117 board_nmi_handler_setup = mips_nmi_setup; 117 board_nmi_handler_setup = mips_nmi_setup;
118 board_ejtag_handler_setup = mips_ejtag_setup; 118 board_ejtag_handler_setup = mips_ejtag_setup;
119 119
120 if (prom_argc == 1) 120 if (prom_argc == 1) {
121 strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
121 strlcat(arcs_cmdline, prom_argv, COMMAND_LINE_SIZE); 122 strlcat(arcs_cmdline, prom_argv, COMMAND_LINE_SIZE);
123 }
122 124
123 configure_platform(); 125 configure_platform();
124 prom_meminit(); 126 prom_meminit();
diff --git a/arch/mips/powertv/ioremap.c b/arch/mips/powertv/ioremap.c
new file mode 100644
index 000000000000..a77c6f62fe23
--- /dev/null
+++ b/arch/mips/powertv/ioremap.c
@@ -0,0 +1,136 @@
1/*
2 * ioremap.c
3 *
4 * Support for mapping between dma_addr_t values a phys_addr_t values.
5 *
6 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 *
22 * Author: David VomLehn <dvomlehn@cisco.com>
23 *
24 * Description: Defines the platform resources for the SA settop.
25 *
26 * NOTE: The bootloader allocates persistent memory at an address which is
27 * 16 MiB below the end of the highest address in KSEG0. All fixed
28 * address memory reservations must avoid this region.
29 */
30
31#include <linux/kernel.h>
32#include <linux/module.h>
33
34#include <asm/mach-powertv/ioremap.h>
35
36/*
37 * Define the sizes of and masks for grains in physical and DMA space. The
38 * values are the same but the types are not.
39 */
40#define IOR_PHYS_GRAIN ((phys_addr_t) 1 << IOR_LSBITS)
41#define IOR_PHYS_GRAIN_MASK (IOR_PHYS_GRAIN - 1)
42
43#define IOR_DMA_GRAIN ((dma_addr_t) 1 << IOR_LSBITS)
44#define IOR_DMA_GRAIN_MASK (IOR_DMA_GRAIN - 1)
45
46/*
47 * Values that, when accessed by an index derived from a phys_addr_t and
48 * added to phys_addr_t value, yield a DMA address
49 */
50struct ior_phys_to_dma _ior_phys_to_dma[IOR_NUM_PHYS_TO_DMA];
51EXPORT_SYMBOL(_ior_phys_to_dma);
52
53/*
54 * Values that, when accessed by an index derived from a dma_addr_t and
55 * added to that dma_addr_t value, yield a physical address
56 */
57struct ior_dma_to_phys _ior_dma_to_phys[IOR_NUM_DMA_TO_PHYS];
58EXPORT_SYMBOL(_ior_dma_to_phys);
59
60/**
61 * setup_dma_to_phys - set up conversion from DMA to physical addresses
62 * @dma_idx: Top IOR_LSBITS bits of the DMA address, i.e. an index
63 * into the array _dma_to_phys.
64 * @delta: Value that, when added to the DMA address, will yield the
65 * physical address
66 * @s: Number of bytes in the section of memory with the given delta
67 * between DMA and physical addresses.
68 */
69static void setup_dma_to_phys(dma_addr_t dma, phys_addr_t delta, dma_addr_t s)
70{
71 int dma_idx, first_idx, last_idx;
72 phys_addr_t first, last;
73
74 /*
75 * Calculate the first and last indices, rounding the first up and
76 * the second down.
77 */
78 first = dma & ~IOR_DMA_GRAIN_MASK;
79 last = (dma + s - 1) & ~IOR_DMA_GRAIN_MASK;
80 first_idx = first >> IOR_LSBITS; /* Convert to indices */
81 last_idx = last >> IOR_LSBITS;
82
83 for (dma_idx = first_idx; dma_idx <= last_idx; dma_idx++)
84 _ior_dma_to_phys[dma_idx].offset = delta >> IOR_DMA_SHIFT;
85}
86
87/**
88 * setup_phys_to_dma - set up conversion from DMA to physical addresses
89 * @phys_idx: Top IOR_LSBITS bits of the DMA address, i.e. an index
90 * into the array _phys_to_dma.
91 * @delta: Value that, when added to the DMA address, will yield the
92 * physical address
93 * @s: Number of bytes in the section of memory with the given delta
94 * between DMA and physical addresses.
95 */
96static void setup_phys_to_dma(phys_addr_t phys, dma_addr_t delta, phys_addr_t s)
97{
98 int phys_idx, first_idx, last_idx;
99 phys_addr_t first, last;
100
101 /*
102 * Calculate the first and last indices, rounding the first up and
103 * the second down.
104 */
105 first = phys & ~IOR_PHYS_GRAIN_MASK;
106 last = (phys + s - 1) & ~IOR_PHYS_GRAIN_MASK;
107 first_idx = first >> IOR_LSBITS; /* Convert to indices */
108 last_idx = last >> IOR_LSBITS;
109
110 for (phys_idx = first_idx; phys_idx <= last_idx; phys_idx++)
111 _ior_phys_to_dma[phys_idx].offset = delta >> IOR_PHYS_SHIFT;
112}
113
114/**
115 * ioremap_add_map - add to the physical and DMA address conversion arrays
116 * @phys: Process's view of the address of the start of the memory chunk
117 * @dma: DMA address of the start of the memory chunk
118 * @size: Size, in bytes, of the chunk of memory
119 *
120 * NOTE: It might be obvious, but the assumption is that all @size bytes have
121 * the same offset between the physical address and the DMA address.
122 */
123void ioremap_add_map(phys_addr_t phys, phys_addr_t dma, phys_addr_t size)
124{
125 if (size == 0)
126 return;
127
128 if ((dma & IOR_DMA_GRAIN_MASK) != 0 ||
129 (phys & IOR_PHYS_GRAIN_MASK) != 0 ||
130 (size & IOR_PHYS_GRAIN_MASK) != 0)
131 pr_crit("Memory allocation must be in chunks of 0x%x bytes\n",
132 IOR_PHYS_GRAIN);
133
134 setup_dma_to_phys(dma, phys - dma, size);
135 setup_phys_to_dma(phys, dma - phys, size);
136}
diff --git a/arch/mips/powertv/memory.c b/arch/mips/powertv/memory.c
index f49eb3d0358b..73880ad29bc2 100644
--- a/arch/mips/powertv/memory.c
+++ b/arch/mips/powertv/memory.c
@@ -30,28 +30,141 @@
30#include <asm/sections.h> 30#include <asm/sections.h>
31 31
32#include <asm/mips-boards/prom.h> 32#include <asm/mips-boards/prom.h>
33#include <asm/mach-powertv/asic.h>
34#include <asm/mach-powertv/ioremap.h>
33 35
34#include "init.h" 36#include "init.h"
35 37
36/* Memory constants */ 38/* Memory constants */
37#define KIBIBYTE(n) ((n) * 1024) /* Number of kibibytes */ 39#define KIBIBYTE(n) ((n) * 1024) /* Number of kibibytes */
38#define MEBIBYTE(n) ((n) * KIBIBYTE(1024)) /* Number of mebibytes */ 40#define MEBIBYTE(n) ((n) * KIBIBYTE(1024)) /* Number of mebibytes */
39#define DEFAULT_MEMSIZE MEBIBYTE(256) /* If no memsize provided */ 41#define DEFAULT_MEMSIZE MEBIBYTE(128) /* If no memsize provided */
40#define LOW_MEM_MAX MEBIBYTE(252) /* Max usable low mem */
41#define RES_BOOTLDR_MEMSIZE MEBIBYTE(1) /* Memory reserved for bldr */
42#define BOOT_MEM_SIZE KIBIBYTE(256) /* Memory reserved for bldr */
43#define PHYS_MEM_START 0x10000000 /* Start of physical memory */
44 42
45char __initdata cmdline[COMMAND_LINE_SIZE]; 43#define BLDR_SIZE KIBIBYTE(256) /* Memory reserved for bldr */
44#define RV_SIZE MEBIBYTE(4) /* Size of reset vector */
46 45
47void __init prom_meminit(void) 46#define LOW_MEM_END 0x20000000 /* Highest low memory address */
47#define BLDR_ALIAS 0x10000000 /* Bootloader address */
48#define RV_PHYS 0x1fc00000 /* Reset vector address */
49#define LOW_RAM_END RV_PHYS /* End of real RAM in low mem */
50
51/*
52 * Very low-level conversion from processor physical address to device
53 * DMA address for the first bank of memory.
54 */
55#define PHYS_TO_DMA(paddr) ((paddr) + (CONFIG_LOW_RAM_DMA - LOW_RAM_ALIAS))
56
57unsigned long ptv_memsize;
58
59/*
60 * struct low_mem_reserved - Items in low memmory that are reserved
61 * @start: Physical address of item
62 * @size: Size, in bytes, of this item
63 * @is_aliased: True if this is RAM aliased from another location. If false,
64 * it is something other than aliased RAM and the RAM in the
65 * unaliased address is still visible outside of low memory.
66 */
67struct low_mem_reserved {
68 phys_addr_t start;
69 phys_addr_t size;
70 bool is_aliased;
71};
72
73/*
74 * Must be in ascending address order
75 */
76struct low_mem_reserved low_mem_reserved[] = {
77 {BLDR_ALIAS, BLDR_SIZE, true}, /* Bootloader RAM */
78 {RV_PHYS, RV_SIZE, false}, /* Reset vector */
79};
80
81/*
82 * struct mem_layout - layout of a piece of the system RAM
83 * @phys: Physical address of the start of this piece of RAM. This is the
84 * address at which both the processor and I/O devices see the
85 * RAM.
86 * @alias: Alias of this piece of memory in order to make it appear in
87 * the low memory part of the processor's address space. I/O
88 * devices don't see anything here.
89 * @size: Size, in bytes, of this piece of RAM
90 */
91struct mem_layout {
92 phys_addr_t phys;
93 phys_addr_t alias;
94 phys_addr_t size;
95};
96
97/*
98 * struct mem_layout_list - list descriptor for layouts of system RAM pieces
99 * @family: Specifies the family being described
100 * @n: Number of &struct mem_layout elements
101 * @layout: Pointer to the list of &mem_layout structures
102 */
103struct mem_layout_list {
104 enum family_type family;
105 size_t n;
106 struct mem_layout *layout;
107};
108
109static struct mem_layout f1500_layout[] = {
110 {0x20000000, 0x10000000, MEBIBYTE(256)},
111};
112
113static struct mem_layout f4500_layout[] = {
114 {0x40000000, 0x10000000, MEBIBYTE(256)},
115 {0x20000000, 0x20000000, MEBIBYTE(32)},
116};
117
118static struct mem_layout f8500_layout[] = {
119 {0x40000000, 0x10000000, MEBIBYTE(256)},
120 {0x20000000, 0x20000000, MEBIBYTE(32)},
121 {0x30000000, 0x30000000, MEBIBYTE(32)},
122};
123
124static struct mem_layout fx600_layout[] = {
125 {0x20000000, 0x10000000, MEBIBYTE(256)},
126 {0x60000000, 0x60000000, MEBIBYTE(128)},
127};
128
129static struct mem_layout_list layout_list[] = {
130 {FAMILY_1500, ARRAY_SIZE(f1500_layout), f1500_layout},
131 {FAMILY_1500VZE, ARRAY_SIZE(f1500_layout), f1500_layout},
132 {FAMILY_1500VZF, ARRAY_SIZE(f1500_layout), f1500_layout},
133 {FAMILY_4500, ARRAY_SIZE(f4500_layout), f4500_layout},
134 {FAMILY_8500, ARRAY_SIZE(f8500_layout), f8500_layout},
135 {FAMILY_8500RNG, ARRAY_SIZE(f8500_layout), f8500_layout},
136 {FAMILY_4600, ARRAY_SIZE(fx600_layout), fx600_layout},
137 {FAMILY_4600VZA, ARRAY_SIZE(fx600_layout), fx600_layout},
138 {FAMILY_8600, ARRAY_SIZE(fx600_layout), fx600_layout},
139 {FAMILY_8600VZB, ARRAY_SIZE(fx600_layout), fx600_layout},
140};
141
142/* If we can't determine the layout, use this */
143static struct mem_layout default_layout[] = {
144 {0x20000000, 0x10000000, MEBIBYTE(128)},
145};
146
147/**
148 * register_non_ram - register low memory not available for RAM usage
149 */
150static __init void register_non_ram(void)
151{
152 int i;
153
154 for (i = 0; i < ARRAY_SIZE(low_mem_reserved); i++)
155 add_memory_region(low_mem_reserved[i].start,
156 low_mem_reserved[i].size, BOOT_MEM_RESERVED);
157}
158
159/**
160 * get_memsize - get the size of memory as a single bank
161 */
162static phys_addr_t get_memsize(void)
48{ 163{
164 static char cmdline[COMMAND_LINE_SIZE] __initdata;
165 phys_addr_t memsize = 0;
49 char *memsize_str; 166 char *memsize_str;
50 unsigned long memsize = 0;
51 unsigned int physend;
52 char *ptr; 167 char *ptr;
53 int low_mem;
54 int high_mem;
55 168
56 /* Check the command line first for a memsize directive */ 169 /* Check the command line first for a memsize directive */
57 strcpy(cmdline, arcs_cmdline); 170 strcpy(cmdline, arcs_cmdline);
@@ -73,96 +186,156 @@ void __init prom_meminit(void)
73 if (memsize == 0) { 186 if (memsize == 0) {
74 if (_prom_memsize != 0) { 187 if (_prom_memsize != 0) {
75 memsize = _prom_memsize; 188 memsize = _prom_memsize;
76 pr_info("_prom_memsize = 0x%lx\n", memsize); 189 pr_info("_prom_memsize = 0x%x\n", memsize);
77 /* add in memory that the bootloader doesn't 190 /* add in memory that the bootloader doesn't
78 * report */ 191 * report */
79 memsize += BOOT_MEM_SIZE; 192 memsize += BLDR_SIZE;
80 } else { 193 } else {
81 memsize = DEFAULT_MEMSIZE; 194 memsize = DEFAULT_MEMSIZE;
82 pr_info("Memsize not passed by bootloader, " 195 pr_info("Memsize not passed by bootloader, "
83 "defaulting to 0x%lx\n", memsize); 196 "defaulting to 0x%x\n", memsize);
84 } 197 }
85 } 198 }
86 } 199 }
87 200
88 physend = PFN_ALIGN(&_end) - 0x80000000; 201 return memsize;
89 if (memsize > LOW_MEM_MAX) { 202}
90 low_mem = LOW_MEM_MAX; 203
91 high_mem = memsize - low_mem; 204/**
92 } else { 205 * register_low_ram - register an aliased section of RAM
93 low_mem = memsize; 206 * @p: Alias address of memory
94 high_mem = 0; 207 * @n: Number of bytes in this section of memory
208 *
209 * Returns the number of bytes registered
210 *
211 */
212static __init phys_addr_t register_low_ram(phys_addr_t p, phys_addr_t n)
213{
214 phys_addr_t s;
215 int i;
216 phys_addr_t orig_n;
217
218 orig_n = n;
219
220 BUG_ON(p + n > RV_PHYS);
221
222 for (i = 0; n != 0 && i < ARRAY_SIZE(low_mem_reserved); i++) {
223 phys_addr_t start;
224 phys_addr_t size;
225
226 start = low_mem_reserved[i].start;
227 size = low_mem_reserved[i].size;
228
229 /* Handle memory before this low memory section */
230 if (p < start) {
231 phys_addr_t s;
232 s = min(n, start - p);
233 add_memory_region(p, s, BOOT_MEM_RAM);
234 p += s;
235 n -= s;
236 }
237
238 /* Handle the low memory section itself. If it's aliased,
239 * we reduce the number of byes left, but if not, the RAM
240 * is available elsewhere and we don't reduce the number of
241 * bytes remaining. */
242 if (p == start) {
243 if (low_mem_reserved[i].is_aliased) {
244 s = min(n, size);
245 n -= s;
246 p += s;
247 } else
248 p += n;
249 }
95 } 250 }
96 251
252 return orig_n - n;
253}
254
97/* 255/*
98 * TODO: We will use the hard code for memory configuration until 256 * register_ram - register real RAM
99 * the bootloader releases their device tree to us. 257 * @p: Address of memory as seen by devices
258 * @alias: If the memory is seen at an additional address by the processor,
259 * this will be the address, otherwise it is the same as @p.
260 * @n: Number of bytes in this section of memory
100 */ 261 */
262static __init void register_ram(phys_addr_t p, phys_addr_t alias,
263 phys_addr_t n)
264{
101 /* 265 /*
102 * Add the memory reserved for use by the bootloader to the 266 * If some or all of this memory has an alias, break it into the
103 * memory map. 267 * aliased and non-aliased portion.
104 */
105 add_memory_region(PHYS_MEM_START, RES_BOOTLDR_MEMSIZE,
106 BOOT_MEM_RESERVED);
107#ifdef CONFIG_HIGHMEM_256_128
108 /*
109 * Add memory in low for general use by the kernel and its friends
110 * (like drivers, applications, etc).
111 */
112 add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE,
113 LOW_MEM_MAX - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM);
114 /*
115 * Add the memory reserved for reset vector.
116 */
117 add_memory_region(0x1fc00000, MEBIBYTE(4), BOOT_MEM_RESERVED);
118 /*
119 * Add the memory reserved.
120 */
121 add_memory_region(0x20000000, MEBIBYTE(1024 + 75), BOOT_MEM_RESERVED);
122 /*
123 * Add memory in high for general use by the kernel and its friends
124 * (like drivers, applications, etc).
125 *
126 * 75MB is reserved for devices which are using the memory in high.
127 */
128 add_memory_region(0x60000000 + MEBIBYTE(75), MEBIBYTE(128 - 75),
129 BOOT_MEM_RAM);
130#elif defined CONFIG_HIGHMEM_128_128
131 /*
132 * Add memory in low for general use by the kernel and its friends
133 * (like drivers, applications, etc).
134 */
135 add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE,
136 MEBIBYTE(128) - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM);
137 /*
138 * Add the memory reserved.
139 */
140 add_memory_region(PHYS_MEM_START + MEBIBYTE(128),
141 MEBIBYTE(128 + 1024 + 75), BOOT_MEM_RESERVED);
142 /*
143 * Add memory in high for general use by the kernel and its friends
144 * (like drivers, applications, etc).
145 *
146 * 75MB is reserved for devices which are using the memory in high.
147 */
148 add_memory_region(0x60000000 + MEBIBYTE(75), MEBIBYTE(128 - 75),
149 BOOT_MEM_RAM);
150#else
151 /* Add low memory regions for either:
152 * - no-highmemory configuration case -OR-
153 * - highmemory "HIGHMEM_LOWBANK_ONLY" case
154 */
155 /*
156 * Add memory for general use by the kernel and its friends
157 * (like drivers, applications, etc).
158 */ 268 */
159 add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE, 269 if (p != alias) {
160 low_mem - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM); 270 phys_addr_t alias_size;
271 phys_addr_t registered;
272
273 alias_size = min(n, LOW_RAM_END - alias);
274 registered = register_low_ram(alias, alias_size);
275 ioremap_add_map(alias, p, n);
276 n -= registered;
277 p += registered;
278 }
279
280#ifdef CONFIG_HIGHMEM
281 if (n != 0) {
282 add_memory_region(p, n, BOOT_MEM_RAM);
283 ioremap_add_map(p, p, n);
284 }
285#endif
286}
287
288/**
289 * register_address_space - register things in the address space
290 * @memsize: Number of bytes of RAM installed
291 *
292 * Takes the given number of bytes of RAM and registers as many of the regions,
293 * or partial regions, as it can. So, the default configuration might have
294 * two regions with 256 MiB each. If the memsize passed in on the command line
295 * is 384 MiB, it will register the first region with 256 MiB and the second
296 * with 128 MiB.
297 */
298static __init void register_address_space(phys_addr_t memsize)
299{
300 int i;
301 phys_addr_t size;
302 size_t n;
303 struct mem_layout *layout;
304 enum family_type family;
305
161 /* 306 /*
162 * Add the memory reserved for reset vector. 307 * Register all of the things that aren't available to the kernel as
308 * memory.
163 */ 309 */
164 add_memory_region(0x1fc00000, MEBIBYTE(4), BOOT_MEM_RESERVED); 310 register_non_ram();
165#endif 311
312 /* Find the appropriate memory description */
313 family = platform_get_family();
314
315 for (i = 0; i < ARRAY_SIZE(layout_list); i++) {
316 if (layout_list[i].family == family)
317 break;
318 }
319
320 if (i == ARRAY_SIZE(layout_list)) {
321 n = ARRAY_SIZE(default_layout);
322 layout = default_layout;
323 } else {
324 n = layout_list[i].n;
325 layout = layout_list[i].layout;
326 }
327
328 for (i = 0; memsize != 0 && i < n; i++) {
329 size = min(memsize, layout[i].size);
330 register_ram(layout[i].phys, layout[i].alias, size);
331 memsize -= size;
332 }
333}
334
335void __init prom_meminit(void)
336{
337 ptv_memsize = get_memsize();
338 register_address_space(ptv_memsize);
166} 339}
167 340
168void __init prom_free_prom_memory(void) 341void __init prom_free_prom_memory(void)
diff --git a/arch/mips/powertv/powertv-usb.c b/arch/mips/powertv/powertv-usb.c
new file mode 100644
index 000000000000..6ac85cf7aa20
--- /dev/null
+++ b/arch/mips/powertv/powertv-usb.c
@@ -0,0 +1,403 @@
1/*
2 * powertv-usb.c
3 *
4 * Description: ASIC-specific USB device setup and shutdown
5 *
6 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
7 * Copyright (C) 2009 Cisco Systems, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 *
23 * Author: Ken Eppinett
24 * David Schleef <ds@schleef.org>
25 *
26 * NOTE: The bootloader allocates persistent memory at an address which is
27 * 16 MiB below the end of the highest address in KSEG0. All fixed
28 * address memory reservations must avoid this region.
29 */
30
31#include <linux/kernel.h>
32#include <linux/ioport.h>
33#include <linux/platform_device.h>
34#include <asm/mach-powertv/asic.h>
35#include <asm/mach-powertv/interrupts.h>
36
37/* misc_clk_ctl1 values */
38#define MCC1_30MHZ_POWERUP_SELECT (1 << 14)
39#define MCC1_DIV9 (1 << 13)
40#define MCC1_ETHMIPS_POWERUP_SELECT (1 << 11)
41#define MCC1_USB_POWERUP_SELECT (1 << 1)
42#define MCC1_CLOCK108_POWERUP_SELECT (1 << 0)
43
44/* Possible values for clock select */
45#define MCC1_USB_CLOCK_HIGH_Z (0 << 4)
46#define MCC1_USB_CLOCK_48MHZ (1 << 4)
47#define MCC1_USB_CLOCK_24MHZ (2 << 4)
48#define MCC1_USB_CLOCK_6MHZ (3 << 4)
49
50#define MCC1_CONFIG (MCC1_30MHZ_POWERUP_SELECT | \
51 MCC1_DIV9 | \
52 MCC1_ETHMIPS_POWERUP_SELECT | \
53 MCC1_USB_POWERUP_SELECT | \
54 MCC1_CLOCK108_POWERUP_SELECT)
55
56/* misc_clk_ctl2 values */
57#define MCC2_GMII_GCLK_TO_PAD (1 << 31)
58#define MCC2_ETHER125_0_CLOCK_SELECT (1 << 29)
59#define MCC2_RMII_0_CLOCK_SELECT (1 << 28)
60#define MCC2_GMII_TX0_CLOCK_SELECT (1 << 27)
61#define MCC2_GMII_RX0_CLOCK_SELECT (1 << 26)
62#define MCC2_ETHER125_1_CLOCK_SELECT (1 << 24)
63#define MCC2_RMII_1_CLOCK_SELECT (1 << 23)
64#define MCC2_GMII_TX1_CLOCK_SELECT (1 << 22)
65#define MCC2_GMII_RX1_CLOCK_SELECT (1 << 21)
66#define MCC2_ETHER125_2_CLOCK_SELECT (1 << 19)
67#define MCC2_RMII_2_CLOCK_SELECT (1 << 18)
68#define MCC2_GMII_TX2_CLOCK_SELECT (1 << 17)
69#define MCC2_GMII_RX2_CLOCK_SELECT (1 << 16)
70
71#define ETHER_CLK_CONFIG (MCC2_GMII_GCLK_TO_PAD | \
72 MCC2_ETHER125_0_CLOCK_SELECT | \
73 MCC2_RMII_0_CLOCK_SELECT | \
74 MCC2_GMII_TX0_CLOCK_SELECT | \
75 MCC2_GMII_RX0_CLOCK_SELECT | \
76 MCC2_ETHER125_1_CLOCK_SELECT | \
77 MCC2_RMII_1_CLOCK_SELECT | \
78 MCC2_GMII_TX1_CLOCK_SELECT | \
79 MCC2_GMII_RX1_CLOCK_SELECT | \
80 MCC2_ETHER125_2_CLOCK_SELECT | \
81 MCC2_RMII_2_CLOCK_SELECT | \
82 MCC2_GMII_TX2_CLOCK_SELECT | \
83 MCC2_GMII_RX2_CLOCK_SELECT)
84
85/* misc_clk_ctl2 definitions for Gaia */
86#define FSX4A_REF_SELECT (1 << 16)
87#define FSX4B_REF_SELECT (1 << 17)
88#define FSX4C_REF_SELECT (1 << 18)
89#define DDR_PLL_REF_SELECT (1 << 19)
90#define MIPS_PLL_REF_SELECT (1 << 20)
91
92/* Definitions for the QAM frequency select register FS432X4A4_QAM_CTL */
93#define QAM_FS_SDIV_SHIFT 29
94#define QAM_FS_MD_SHIFT 24
95#define QAM_FS_MD_MASK 0x1f /* Cut down to 5 bits */
96#define QAM_FS_PE_SHIFT 8
97
98#define QAM_FS_DISABLE_DIVIDE_BY_3 (1 << 5)
99#define QAM_FS_ENABLE_PROGRAM (1 << 4)
100#define QAM_FS_ENABLE_OUTPUT (1 << 3)
101#define QAM_FS_SELECT_TEST_BYPASS (1 << 2)
102#define QAM_FS_DISABLE_DIGITAL_STANDBY (1 << 1)
103#define QAM_FS_CHOOSE_FS (1 << 0)
104
105/* Definitions for fs432x4a_ctl register */
106#define QAM_FS_NSDIV_54MHZ (1 << 2)
107
108/* Definitions for bcm1_usb2_ctl register */
109#define BCM1_USB2_CTL_BISTOK (1 << 11)
110#define BCM1_USB2_CTL_PORT2_SHIFT_JK (1 << 7)
111#define BCM1_USB2_CTL_PORT1_SHIFT_JK (1 << 6)
112#define BCM1_USB2_CTL_PORT2_FAST_EDGE (1 << 5)
113#define BCM1_USB2_CTL_PORT1_FAST_EDGE (1 << 4)
114#define BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH (1 << 1)
115#define BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH (1 << 0)
116
117/* Definitions for crt_spare register */
118#define CRT_SPARE_PORT2_SHIFT_JK (1 << 21)
119#define CRT_SPARE_PORT1_SHIFT_JK (1 << 20)
120#define CRT_SPARE_PORT2_FAST_EDGE (1 << 19)
121#define CRT_SPARE_PORT1_FAST_EDGE (1 << 18)
122#define CRT_SPARE_DIVIDE_BY_9_FROM_432 (1 << 17)
123#define CRT_SPARE_USB_DIVIDE_BY_9 (1 << 16)
124
125/* Definitions for usb2_stbus_obc register */
126#define USB_STBUS_OBC_STORE32_LOAD32 0x3
127
128/* Definitions for usb2_stbus_mess_size register */
129#define USB2_STBUS_MESS_SIZE_2 0x1 /* 2 packets */
130
131/* Definitions for usb2_stbus_chunk_size register */
132#define USB2_STBUS_CHUNK_SIZE_2 0x1 /* 2 packets */
133
134/* Definitions for usb2_strap register */
135#define USB2_STRAP_HFREQ_SELECT 0x1
136
137/*
138 * USB Host Resource Definition
139 */
140
141static struct resource ehci_resources[] = {
142 {
143 .parent = &asic_resource,
144 .start = 0,
145 .end = 0xff,
146 .flags = IORESOURCE_MEM,
147 },
148 {
149 .start = irq_usbehci,
150 .end = irq_usbehci,
151 .flags = IORESOURCE_IRQ,
152 },
153};
154
155static u64 ehci_dmamask = 0xffffffffULL;
156
157static struct platform_device ehci_device = {
158 .name = "powertv-ehci",
159 .id = 0,
160 .num_resources = 2,
161 .resource = ehci_resources,
162 .dev = {
163 .dma_mask = &ehci_dmamask,
164 .coherent_dma_mask = 0xffffffff,
165 },
166};
167
168static struct resource ohci_resources[] = {
169 {
170 .parent = &asic_resource,
171 .start = 0,
172 .end = 0xff,
173 .flags = IORESOURCE_MEM,
174 },
175 {
176 .start = irq_usbohci,
177 .end = irq_usbohci,
178 .flags = IORESOURCE_IRQ,
179 },
180};
181
182static u64 ohci_dmamask = 0xffffffffULL;
183
184static struct platform_device ohci_device = {
185 .name = "powertv-ohci",
186 .id = 0,
187 .num_resources = 2,
188 .resource = ohci_resources,
189 .dev = {
190 .dma_mask = &ohci_dmamask,
191 .coherent_dma_mask = 0xffffffff,
192 },
193};
194
195static unsigned usb_users;
196static DEFINE_SPINLOCK(usb_regs_lock);
197
198/*
199 *
200 * fs_update - set frequency synthesizer for USB
201 * @pe_bits Phase tap setting
202 * @md_bits Coarse selector bus for algorithm of phase tap
203 * @sdiv_bits Output divider setting
204 * @disable_div_by_3 Either QAM_FS_DISABLE_DIVIDE_BY_3 or zero
205 * @standby Either QAM_FS_DISABLE_DIGITAL_STANDBY or zero
206 *
207 * QAM frequency selection code, which affects the frequency at which USB
208 * runs. The frequency is calculated as:
209 * 2^15 * ndiv * Fin
210 * Fout = ------------------------------------------------------------
211 * (sdiv * (ipe * (1 + md/32) - (ipe - 2^15)*(1 + (md + 1)/32)))
212 * where:
213 * Fin 54 MHz
214 * ndiv QAM_FS_NSDIV_54MHZ ? 8 : 16
215 * sdiv 1 << (sdiv_bits + 1)
216 * ipe Same as pe_bits
217 * md A five-bit, two's-complement integer (range [-16, 15]), which
218 * is the lower 5 bits of md_bits.
219 */
220static void fs_update(u32 pe_bits, int md_bits, u32 sdiv_bits,
221 u32 disable_div_by_3, u32 standby)
222{
223 u32 val;
224
225 val = ((sdiv_bits << QAM_FS_SDIV_SHIFT) |
226 ((md_bits & QAM_FS_MD_MASK) << QAM_FS_MD_SHIFT) |
227 (pe_bits << QAM_FS_PE_SHIFT) |
228 QAM_FS_ENABLE_OUTPUT |
229 standby |
230 disable_div_by_3);
231 asic_write(val, fs432x4b4_usb_ctl);
232 asic_write(val | QAM_FS_ENABLE_PROGRAM, fs432x4b4_usb_ctl);
233 asic_write(val | QAM_FS_ENABLE_PROGRAM | QAM_FS_CHOOSE_FS,
234 fs432x4b4_usb_ctl);
235}
236
237/*
238 * usb_eye_configure - for optimizing the shape USB eye waveform
239 * @set: Bits to set in the register
240 * @clear: Bits to clear in the register; each bit with a one will
241 * be set in the register, zero bits will not be modified
242 */
243static void usb_eye_configure(u32 set, u32 clear)
244{
245 u32 old;
246
247 old = asic_read(crt_spare);
248 old |= set;
249 old &= ~clear;
250 asic_write(old, crt_spare);
251}
252
253/*
254 * platform_configure_usb - usb configuration based on platform type.
255 */
256static void platform_configure_usb(void)
257{
258 u32 bcm1_usb2_ctl_value;
259 enum asic_type asic_type;
260 unsigned long flags;
261
262 spin_lock_irqsave(&usb_regs_lock, flags);
263 usb_users++;
264
265 if (usb_users != 1) {
266 spin_unlock_irqrestore(&usb_regs_lock, flags);
267 return;
268 }
269
270 asic_type = platform_get_asic();
271
272 switch (asic_type) {
273 case ASIC_ZEUS:
274 fs_update(0x0000, -15, 0x02, 0, 0);
275 bcm1_usb2_ctl_value = BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH |
276 BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH;
277 break;
278
279 case ASIC_CRONUS:
280 case ASIC_CRONUSLITE:
281 usb_eye_configure(0, CRT_SPARE_USB_DIVIDE_BY_9);
282 fs_update(0x8000, -14, 0x03, QAM_FS_DISABLE_DIVIDE_BY_3,
283 QAM_FS_DISABLE_DIGITAL_STANDBY);
284 bcm1_usb2_ctl_value = BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH |
285 BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH;
286 break;
287
288 case ASIC_CALLIOPE:
289 fs_update(0x0000, -15, 0x02, QAM_FS_DISABLE_DIVIDE_BY_3,
290 QAM_FS_DISABLE_DIGITAL_STANDBY);
291
292 switch (platform_get_family()) {
293 case FAMILY_1500VZE:
294 break;
295
296 case FAMILY_1500VZF:
297 usb_eye_configure(CRT_SPARE_PORT2_SHIFT_JK |
298 CRT_SPARE_PORT1_SHIFT_JK |
299 CRT_SPARE_PORT2_FAST_EDGE |
300 CRT_SPARE_PORT1_FAST_EDGE, 0);
301 break;
302
303 default:
304 usb_eye_configure(CRT_SPARE_PORT2_SHIFT_JK |
305 CRT_SPARE_PORT1_SHIFT_JK, 0);
306 break;
307 }
308
309 bcm1_usb2_ctl_value = BCM1_USB2_CTL_BISTOK |
310 BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH |
311 BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH;
312 break;
313
314 case ASIC_GAIA:
315 fs_update(0x8000, -14, 0x03, QAM_FS_DISABLE_DIVIDE_BY_3,
316 QAM_FS_DISABLE_DIGITAL_STANDBY);
317 bcm1_usb2_ctl_value = BCM1_USB2_CTL_BISTOK |
318 BCM1_USB2_CTL_EHCI_PRT_PWR_ACTIVE_HIGH |
319 BCM1_USB2_CTL_APP_PRT_OVRCUR_IN_ACTIVE_HIGH;
320 break;
321
322 default:
323 pr_err("Unknown ASIC type: %d\n", asic_type);
324 bcm1_usb2_ctl_value = 0;
325 break;
326 }
327
328 /* turn on USB power */
329 asic_write(0, usb2_strap);
330 /* Enable all OHCI interrupts */
331 asic_write(bcm1_usb2_ctl_value, usb2_control);
332 /* usb2_stbus_obc store32/load32 */
333 asic_write(USB_STBUS_OBC_STORE32_LOAD32, usb2_stbus_obc);
334 /* usb2_stbus_mess_size 2 packets */
335 asic_write(USB2_STBUS_MESS_SIZE_2, usb2_stbus_mess_size);
336 /* usb2_stbus_chunk_size 2 packets */
337 asic_write(USB2_STBUS_CHUNK_SIZE_2, usb2_stbus_chunk_size);
338 spin_unlock_irqrestore(&usb_regs_lock, flags);
339}
340
341static void platform_unconfigure_usb(void)
342{
343 unsigned long flags;
344
345 spin_lock_irqsave(&usb_regs_lock, flags);
346 usb_users--;
347 if (usb_users == 0)
348 asic_write(USB2_STRAP_HFREQ_SELECT, usb2_strap);
349 spin_unlock_irqrestore(&usb_regs_lock, flags);
350}
351
352/*
353 * Set up the USB EHCI interface
354 */
355void platform_configure_usb_ehci()
356{
357 platform_configure_usb();
358}
359EXPORT_SYMBOL(platform_configure_usb_ehci);
360
361/*
362 * Set up the USB OHCI interface
363 */
364void platform_configure_usb_ohci()
365{
366 platform_configure_usb();
367}
368EXPORT_SYMBOL(platform_configure_usb_ohci);
369
370/*
371 * Shut the USB EHCI interface down
372 */
373void platform_unconfigure_usb_ehci()
374{
375 platform_unconfigure_usb();
376}
377EXPORT_SYMBOL(platform_unconfigure_usb_ehci);
378
379/*
380 * Shut the USB OHCI interface down
381 */
382void platform_unconfigure_usb_ohci()
383{
384 platform_unconfigure_usb();
385}
386EXPORT_SYMBOL(platform_unconfigure_usb_ohci);
387
388/**
389 * platform_devices_init - sets up USB device resourse.
390 */
391int __init platform_usb_devices_init(struct platform_device **ehci_dev,
392 struct platform_device **ohci_dev)
393{
394 *ehci_dev = &ehci_device;
395 ehci_resources[0].start = asic_reg_phys_addr(ehci_hcapbase);
396 ehci_resources[0].end += ehci_resources[0].start;
397
398 *ohci_dev = &ohci_device;
399 ohci_resources[0].start = asic_reg_phys_addr(ohci_hc_revision);
400 ohci_resources[0].end += ohci_resources[0].start;
401
402 return 0;
403}
diff --git a/arch/mips/powertv/powertv_setup.c b/arch/mips/powertv/powertv_setup.c
index af2cae0a5ab3..3933c373a438 100644
--- a/arch/mips/powertv/powertv_setup.c
+++ b/arch/mips/powertv/powertv_setup.c
@@ -199,14 +199,8 @@ static int panic_handler(struct notifier_block *notifier_block,
199 my_regs.cp0_status = read_c0_status(); 199 my_regs.cp0_status = read_c0_status();
200 } 200 }
201 201
202#ifdef CONFIG_DIAGNOSTICS
203 failure_report((char *) cause_string,
204 have_die_regs ? &die_regs : &my_regs);
205 have_die_regs = false;
206#else
207 pr_crit("I'm feeling a bit sleepy. hmmmmm... perhaps a nap would... " 202 pr_crit("I'm feeling a bit sleepy. hmmmmm... perhaps a nap would... "
208 "zzzz... \n"); 203 "zzzz... \n");
209#endif
210 204
211 return NOTIFY_DONE; 205 return NOTIFY_DONE;
212} 206}
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