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-rw-r--r--arch/mips/pmc-sierra/yosemite/Makefile2
-rw-r--r--arch/mips/pmc-sierra/yosemite/irq-handler.S93
-rw-r--r--arch/mips/pmc-sierra/yosemite/irq.c33
3 files changed, 32 insertions, 96 deletions
diff --git a/arch/mips/pmc-sierra/yosemite/Makefile b/arch/mips/pmc-sierra/yosemite/Makefile
index ae96a71a3089..e931e0d44229 100644
--- a/arch/mips/pmc-sierra/yosemite/Makefile
+++ b/arch/mips/pmc-sierra/yosemite/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the PMC-Sierra Titan 2# Makefile for the PMC-Sierra Titan
3# 3#
4 4
5obj-y += irq-handler.o irq.o i2c-yosemite.o prom.o py-console.o setup.o 5obj-y += irq.o i2c-yosemite.o prom.o py-console.o setup.o
6 6
7obj-$(CONFIG_KGDB) += dbg_io.o 7obj-$(CONFIG_KGDB) += dbg_io.o
8obj-$(CONFIG_SMP) += smp.o 8obj-$(CONFIG_SMP) += smp.o
diff --git a/arch/mips/pmc-sierra/yosemite/irq-handler.S b/arch/mips/pmc-sierra/yosemite/irq-handler.S
deleted file mode 100644
index 33b9c40d4f5c..000000000000
--- a/arch/mips/pmc-sierra/yosemite/irq-handler.S
+++ /dev/null
@@ -1,93 +0,0 @@
1/*
2 * Copyright 2003, 04 PMC-Sierra Inc.
3 * Author: Manish Lachwani (lachwani@pmc-sierra.com
4 * Copyright 2004 Ralf Baechle (ralf@linux-mips.org)
5 *
6 * First-level interrupt router for the PMC-Sierra Titan board
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * Titan supports Hypertransport or PCI but not both. Hence, one interrupt
14 * line is shared between the PCI slot A and Hypertransport. This is the
15 * Processor INTB #0.
16 */
17
18#include <linux/config.h>
19#include <asm/asm.h>
20#include <asm/mipsregs.h>
21#include <asm/addrspace.h>
22#include <asm/regdef.h>
23#include <asm/stackframe.h>
24
25 .align 5
26 NESTED(titan_handle_int, PT_SIZE, sp)
27 SAVE_ALL
28 CLI
29 .set at
30 .set noreorder
31 la ra, ret_from_irq
32 mfc0 t0, CP0_CAUSE
33 mfc0 t2, CP0_STATUS
34
35 and t0, t2
36
37 andi t2, t0, STATUSF_IP7 /* INTB5 hardware line */
38 bnez t2, ll_timer_irq /* Timer */
39 andi t1, t0, STATUSF_IP2 /* INTB0 hardware line */
40 bnez t1, ll_pcia_irq /* 64-bit PCI */
41 andi t2, t0, STATUSF_IP3 /* INTB1 hardware line */
42 bnez t2, ll_pcib_irq /* second 64-bit PCI slot */
43 andi t1, t0, STATUSF_IP4 /* INTB2 hardware line */
44 bnez t1, ll_duart_irq /* UART */
45 andi t2, t0, STATUSF_IP5 /* SMP inter-core interrupts */
46 bnez t2, ll_smp_irq
47 andi t1, t0, STATUSF_IP6
48 bnez t1, ll_ht_irq /* Hypertransport */
49
50 move a0, sp
51 j do_extended_irq
52 END(titan_handle_int)
53
54 .set reorder
55 .align 5
56
57ll_pcia_irq:
58 li a0, 2
59 move a1, sp
60#ifdef CONFIG_HYPERTRANSPORT
61 j ll_ht_smp_irq_handler
62#else
63 j do_IRQ
64#endif
65
66ll_pcib_irq:
67 li a0, 3
68 move a1, sp
69 j do_IRQ
70
71ll_duart_irq:
72 li a0, 4
73 move a1, sp
74 j do_IRQ
75
76ll_smp_irq:
77 li a0, 5
78 move a1, sp
79#ifdef CONFIG_SMP
80 j titan_mailbox_irq
81#else
82 j do_IRQ
83#endif
84
85ll_ht_irq:
86 li a0, 6
87 move a1, sp
88 j ll_ht_smp_irq_handler
89
90ll_timer_irq:
91 li a0, 7
92 move a1, sp
93 j do_IRQ
diff --git a/arch/mips/pmc-sierra/yosemite/irq.c b/arch/mips/pmc-sierra/yosemite/irq.c
index f4e2897d9bf7..a1f524fc4c10 100644
--- a/arch/mips/pmc-sierra/yosemite/irq.c
+++ b/arch/mips/pmc-sierra/yosemite/irq.c
@@ -2,6 +2,8 @@
2 * Copyright (C) 2003 PMC-Sierra Inc. 2 * Copyright (C) 2003 PMC-Sierra Inc.
3 * Author: Manish Lachwani (lachwani@pmc-sierra.com) 3 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
4 * 4 *
5 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
6 *
5 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the 8 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your 9 * Free Software Foundation; either version 2 of the License, or (at your
@@ -55,7 +57,6 @@
55#define HYPERTRANSPORT_INTC 0x7a /* INTC# */ 57#define HYPERTRANSPORT_INTC 0x7a /* INTC# */
56#define HYPERTRANSPORT_INTD 0x7b /* INTD# */ 58#define HYPERTRANSPORT_INTD 0x7b /* INTD# */
57 59
58extern asmlinkage void titan_handle_int(void);
59extern void jaguar_mailbox_irq(struct pt_regs *); 60extern void jaguar_mailbox_irq(struct pt_regs *);
60 61
61/* 62/*
@@ -125,6 +126,35 @@ asmlinkage void do_extended_irq(struct pt_regs *regs)
125 126
126} 127}
127 128
129asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
130{
131 unsigned int cause = read_c0_cause();
132 unsigned int status = read_c0_status();
133 unsigned int pending = cause & status;
134
135 if (pending & STATUSF_IP7) {
136 do_IRQ(7, regs);
137 } else if (pending & STATUSF_IP2) {
138#ifdef CONFIG_HYPERTRANSPORT
139 ll_ht_smp_irq_handler(2, regs);
140#else
141 do_IRQ(2, regs);
142#endif
143 } else if (pending & STATUSF_IP3) {
144 do_IRQ(3, regs);
145 } else if (pending & STATUSF_IP4) {
146 do_IRQ(4, regs);
147 } else if (pending & STATUSF_IP5) {
148#ifdef CONFIG_SMP
149 titan_mailbox_irq(regs);
150#else
151 do_IRQ(5, regs);
152#endif
153 } else if (pending & STATUSF_IP6) {
154 do_IRQ(4, regs);
155 }
156}
157
128#ifdef CONFIG_KGDB 158#ifdef CONFIG_KGDB
129extern void init_second_port(void); 159extern void init_second_port(void);
130#endif 160#endif
@@ -136,7 +166,6 @@ void __init arch_init_irq(void)
136{ 166{
137 clear_c0_status(ST0_IM); 167 clear_c0_status(ST0_IM);
138 168
139 set_except_vector(0, titan_handle_int);
140 mips_cpu_irq_init(0); 169 mips_cpu_irq_init(0);
141 rm7k_cpu_irq_init(8); 170 rm7k_cpu_irq_init(8);
142 rm9k_cpu_irq_init(12); 171 rm9k_cpu_irq_init(12);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-23 00:28:33 -0500