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-rw-r--r--arch/mips/pci/ops-loongson2.c10
-rw-r--r--arch/mips/pci/pci-sb1250.c3
2 files changed, 12 insertions, 1 deletions
diff --git a/arch/mips/pci/ops-loongson2.c b/arch/mips/pci/ops-loongson2.c
index 2bb4057bf6c7..d657ee0bc131 100644
--- a/arch/mips/pci/ops-loongson2.c
+++ b/arch/mips/pci/ops-loongson2.c
@@ -180,15 +180,21 @@ struct pci_ops loongson_pci_ops = {
180}; 180};
181 181
182#ifdef CONFIG_CS5536 182#ifdef CONFIG_CS5536
183DEFINE_RAW_SPINLOCK(msr_lock);
184
183void _rdmsr(u32 msr, u32 *hi, u32 *lo) 185void _rdmsr(u32 msr, u32 *hi, u32 *lo)
184{ 186{
185 struct pci_bus bus = { 187 struct pci_bus bus = {
186 .number = PCI_BUS_CS5536 188 .number = PCI_BUS_CS5536
187 }; 189 };
188 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); 190 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
191 unsigned long flags;
192
193 raw_spin_lock_irqsave(&msr_lock, flags);
189 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); 194 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
190 loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo); 195 loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
191 loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi); 196 loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
197 raw_spin_unlock_irqrestore(&msr_lock, flags);
192} 198}
193EXPORT_SYMBOL(_rdmsr); 199EXPORT_SYMBOL(_rdmsr);
194 200
@@ -198,9 +204,13 @@ void _wrmsr(u32 msr, u32 hi, u32 lo)
198 .number = PCI_BUS_CS5536 204 .number = PCI_BUS_CS5536
199 }; 205 };
200 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); 206 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
207 unsigned long flags;
208
209 raw_spin_lock_irqsave(&msr_lock, flags);
201 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); 210 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
202 loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo); 211 loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
203 loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi); 212 loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
213 raw_spin_unlock_irqrestore(&msr_lock, flags);
204} 214}
205EXPORT_SYMBOL(_wrmsr); 215EXPORT_SYMBOL(_wrmsr);
206#endif 216#endif
diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c
index ada24e6f951f..1711e8e101bc 100644
--- a/arch/mips/pci/pci-sb1250.c
+++ b/arch/mips/pci/pci-sb1250.c
@@ -37,6 +37,7 @@
37#include <linux/mm.h> 37#include <linux/mm.h>
38#include <linux/console.h> 38#include <linux/console.h>
39#include <linux/tty.h> 39#include <linux/tty.h>
40#include <linux/vt.h>
40 41
41#include <asm/io.h> 42#include <asm/io.h>
42 43
@@ -254,7 +255,7 @@ static int __init sb1250_pcibios_init(void)
254 * XXX ehs: Should this happen in PCI Device mode? 255 * XXX ehs: Should this happen in PCI Device mode?
255 */ 256 */
256 io_map_base = ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES, 1024 * 1024); 257 io_map_base = ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES, 1024 * 1024);
257 sb1250_controller.io_map_base = io_map_base; 258 sb1250_controller.io_map_base = (unsigned long)io_map_base;
258 set_io_port_base((unsigned long)io_map_base); 259 set_io_port_base((unsigned long)io_map_base);
259 260
260#ifdef CONFIG_SIBYTE_HAS_LDT 261#ifdef CONFIG_SIBYTE_HAS_LDT