diff options
Diffstat (limited to 'arch/mips/pci')
-rw-r--r-- | arch/mips/pci/msi-octeon.c | 24 | ||||
-rw-r--r-- | arch/mips/pci/ops-pmcmsp.c | 4 | ||||
-rw-r--r-- | arch/mips/pci/pci-bcm1480.c | 2 | ||||
-rw-r--r-- | arch/mips/pci/pci-octeon.c | 4 | ||||
-rw-r--r-- | arch/mips/pci/pci.c | 2 |
5 files changed, 18 insertions, 18 deletions
diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c index d8080499872a..5d530f89d872 100644 --- a/arch/mips/pci/msi-octeon.c +++ b/arch/mips/pci/msi-octeon.c | |||
@@ -172,7 +172,7 @@ msi_irq_allocated: | |||
172 | pci_write_config_word(dev, desc->msi_attrib.pos + PCI_MSI_FLAGS, | 172 | pci_write_config_word(dev, desc->msi_attrib.pos + PCI_MSI_FLAGS, |
173 | control); | 173 | control); |
174 | 174 | ||
175 | set_irq_msi(irq, desc); | 175 | irq_set_msi_desc(irq, desc); |
176 | write_msi_msg(irq, &msg); | 176 | write_msi_msg(irq, &msg); |
177 | return 0; | 177 | return 0; |
178 | } | 178 | } |
@@ -259,11 +259,11 @@ static DEFINE_RAW_SPINLOCK(octeon_irq_msi_lock); | |||
259 | static u64 msi_rcv_reg[4]; | 259 | static u64 msi_rcv_reg[4]; |
260 | static u64 mis_ena_reg[4]; | 260 | static u64 mis_ena_reg[4]; |
261 | 261 | ||
262 | static void octeon_irq_msi_enable_pcie(unsigned int irq) | 262 | static void octeon_irq_msi_enable_pcie(struct irq_data *data) |
263 | { | 263 | { |
264 | u64 en; | 264 | u64 en; |
265 | unsigned long flags; | 265 | unsigned long flags; |
266 | int msi_number = irq - OCTEON_IRQ_MSI_BIT0; | 266 | int msi_number = data->irq - OCTEON_IRQ_MSI_BIT0; |
267 | int irq_index = msi_number >> 6; | 267 | int irq_index = msi_number >> 6; |
268 | int irq_bit = msi_number & 0x3f; | 268 | int irq_bit = msi_number & 0x3f; |
269 | 269 | ||
@@ -275,11 +275,11 @@ static void octeon_irq_msi_enable_pcie(unsigned int irq) | |||
275 | raw_spin_unlock_irqrestore(&octeon_irq_msi_lock, flags); | 275 | raw_spin_unlock_irqrestore(&octeon_irq_msi_lock, flags); |
276 | } | 276 | } |
277 | 277 | ||
278 | static void octeon_irq_msi_disable_pcie(unsigned int irq) | 278 | static void octeon_irq_msi_disable_pcie(struct irq_data *data) |
279 | { | 279 | { |
280 | u64 en; | 280 | u64 en; |
281 | unsigned long flags; | 281 | unsigned long flags; |
282 | int msi_number = irq - OCTEON_IRQ_MSI_BIT0; | 282 | int msi_number = data->irq - OCTEON_IRQ_MSI_BIT0; |
283 | int irq_index = msi_number >> 6; | 283 | int irq_index = msi_number >> 6; |
284 | int irq_bit = msi_number & 0x3f; | 284 | int irq_bit = msi_number & 0x3f; |
285 | 285 | ||
@@ -293,11 +293,11 @@ static void octeon_irq_msi_disable_pcie(unsigned int irq) | |||
293 | 293 | ||
294 | static struct irq_chip octeon_irq_chip_msi_pcie = { | 294 | static struct irq_chip octeon_irq_chip_msi_pcie = { |
295 | .name = "MSI", | 295 | .name = "MSI", |
296 | .enable = octeon_irq_msi_enable_pcie, | 296 | .irq_enable = octeon_irq_msi_enable_pcie, |
297 | .disable = octeon_irq_msi_disable_pcie, | 297 | .irq_disable = octeon_irq_msi_disable_pcie, |
298 | }; | 298 | }; |
299 | 299 | ||
300 | static void octeon_irq_msi_enable_pci(unsigned int irq) | 300 | static void octeon_irq_msi_enable_pci(struct irq_data *data) |
301 | { | 301 | { |
302 | /* | 302 | /* |
303 | * Octeon PCI doesn't have the ability to mask/unmask MSI | 303 | * Octeon PCI doesn't have the ability to mask/unmask MSI |
@@ -308,15 +308,15 @@ static void octeon_irq_msi_enable_pci(unsigned int irq) | |||
308 | */ | 308 | */ |
309 | } | 309 | } |
310 | 310 | ||
311 | static void octeon_irq_msi_disable_pci(unsigned int irq) | 311 | static void octeon_irq_msi_disable_pci(struct irq_data *data) |
312 | { | 312 | { |
313 | /* See comment in enable */ | 313 | /* See comment in enable */ |
314 | } | 314 | } |
315 | 315 | ||
316 | static struct irq_chip octeon_irq_chip_msi_pci = { | 316 | static struct irq_chip octeon_irq_chip_msi_pci = { |
317 | .name = "MSI", | 317 | .name = "MSI", |
318 | .enable = octeon_irq_msi_enable_pci, | 318 | .irq_enable = octeon_irq_msi_enable_pci, |
319 | .disable = octeon_irq_msi_disable_pci, | 319 | .irq_disable = octeon_irq_msi_disable_pci, |
320 | }; | 320 | }; |
321 | 321 | ||
322 | /* | 322 | /* |
@@ -388,7 +388,7 @@ int __init octeon_msi_initialize(void) | |||
388 | } | 388 | } |
389 | 389 | ||
390 | for (irq = OCTEON_IRQ_MSI_BIT0; irq <= OCTEON_IRQ_MSI_LAST; irq++) | 390 | for (irq = OCTEON_IRQ_MSI_BIT0; irq <= OCTEON_IRQ_MSI_LAST; irq++) |
391 | set_irq_chip_and_handler(irq, msi, handle_simple_irq); | 391 | irq_set_chip_and_handler(irq, msi, handle_simple_irq); |
392 | 392 | ||
393 | if (octeon_has_feature(OCTEON_FEATURE_PCIE)) { | 393 | if (octeon_has_feature(OCTEON_FEATURE_PCIE)) { |
394 | if (request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt0, | 394 | if (request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt0, |
diff --git a/arch/mips/pci/ops-pmcmsp.c b/arch/mips/pci/ops-pmcmsp.c index 68798f869c0f..8fbfbf2b931c 100644 --- a/arch/mips/pci/ops-pmcmsp.c +++ b/arch/mips/pci/ops-pmcmsp.c | |||
@@ -344,7 +344,7 @@ static irqreturn_t bpci_interrupt(int irq, void *dev_id) | |||
344 | * PCI_ACCESS_WRITE and PCI_ACCESS_READ. | 344 | * PCI_ACCESS_WRITE and PCI_ACCESS_READ. |
345 | * | 345 | * |
346 | * bus - pointer to the bus number of the device to | 346 | * bus - pointer to the bus number of the device to |
347 | * be targetted for the configuration cycle. | 347 | * be targeted for the configuration cycle. |
348 | * The only element of the pci_bus structure | 348 | * The only element of the pci_bus structure |
349 | * used is bus->number. This argument determines | 349 | * used is bus->number. This argument determines |
350 | * if the configuration access will be Type 0 or | 350 | * if the configuration access will be Type 0 or |
@@ -354,7 +354,7 @@ static irqreturn_t bpci_interrupt(int irq, void *dev_id) | |||
354 | * | 354 | * |
355 | * devfn - this is an 8-bit field. The lower three bits | 355 | * devfn - this is an 8-bit field. The lower three bits |
356 | * specify the function number of the device to | 356 | * specify the function number of the device to |
357 | * be targetted for the configuration cycle, with | 357 | * be targeted for the configuration cycle, with |
358 | * all three-bit combinations being legal. The | 358 | * all three-bit combinations being legal. The |
359 | * upper five bits specify the device number, | 359 | * upper five bits specify the device number, |
360 | * with legal values being 10 to 31. | 360 | * with legal values being 10 to 31. |
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c index 6f5e24c6ae67..af8c31996965 100644 --- a/arch/mips/pci/pci-bcm1480.c +++ b/arch/mips/pci/pci-bcm1480.c | |||
@@ -210,7 +210,7 @@ static int __init bcm1480_pcibios_init(void) | |||
210 | PCIBIOS_MIN_IO = 0x00008000UL; | 210 | PCIBIOS_MIN_IO = 0x00008000UL; |
211 | PCIBIOS_MIN_MEM = 0x01000000UL; | 211 | PCIBIOS_MIN_MEM = 0x01000000UL; |
212 | 212 | ||
213 | /* Set I/O resource limits. - unlimited for now to accomodate HT */ | 213 | /* Set I/O resource limits. - unlimited for now to accommodate HT */ |
214 | ioport_resource.end = 0xffffffffUL; | 214 | ioport_resource.end = 0xffffffffUL; |
215 | iomem_resource.end = 0xffffffffUL; | 215 | iomem_resource.end = 0xffffffffUL; |
216 | 216 | ||
diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c index 2d74fc9ae3ba..ed1c54284b8f 100644 --- a/arch/mips/pci/pci-octeon.c +++ b/arch/mips/pci/pci-octeon.c | |||
@@ -441,7 +441,7 @@ static void octeon_pci_initialize(void) | |||
441 | 441 | ||
442 | /* | 442 | /* |
443 | * TDOMC must be set to one in PCI mode. TDOMC should be set to 4 | 443 | * TDOMC must be set to one in PCI mode. TDOMC should be set to 4 |
444 | * in PCI-X mode to allow four oustanding splits. Otherwise, | 444 | * in PCI-X mode to allow four outstanding splits. Otherwise, |
445 | * should not change from its reset value. Don't write PCI_CFG19 | 445 | * should not change from its reset value. Don't write PCI_CFG19 |
446 | * in PCI mode (0x82000001 reset value), write it to 0x82000004 | 446 | * in PCI mode (0x82000001 reset value), write it to 0x82000004 |
447 | * after PCI-X mode is known. MRBCI,MDWE,MDRE -> must be zero. | 447 | * after PCI-X mode is known. MRBCI,MDWE,MDRE -> must be zero. |
@@ -515,7 +515,7 @@ static void octeon_pci_initialize(void) | |||
515 | #endif /* USE_OCTEON_INTERNAL_ARBITER */ | 515 | #endif /* USE_OCTEON_INTERNAL_ARBITER */ |
516 | 516 | ||
517 | /* | 517 | /* |
518 | * Preferrably written to 1 to set MLTD. [RDSATI,TRTAE, | 518 | * Preferably written to 1 to set MLTD. [RDSATI,TRTAE, |
519 | * TWTAE,TMAE,DPPMR -> must be zero. TILT -> must not be set to | 519 | * TWTAE,TMAE,DPPMR -> must be zero. TILT -> must not be set to |
520 | * 1..7. | 520 | * 1..7. |
521 | */ | 521 | */ |
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c index 38bc28005b4a..33bba7bff258 100644 --- a/arch/mips/pci/pci.c +++ b/arch/mips/pci/pci.c | |||
@@ -125,7 +125,7 @@ void __devinit register_pci_controller(struct pci_controller *hose) | |||
125 | hose_tail = &hose->next; | 125 | hose_tail = &hose->next; |
126 | 126 | ||
127 | /* | 127 | /* |
128 | * Do not panic here but later - this might hapen before console init. | 128 | * Do not panic here but later - this might happen before console init. |
129 | */ | 129 | */ |
130 | if (!hose->io_map_base) { | 130 | if (!hose->io_map_base) { |
131 | printk(KERN_WARNING | 131 | printk(KERN_WARNING |