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-rw-r--r--arch/mips/pci/Makefile1
-rw-r--r--arch/mips/pci/fixup-cobalt.c6
-rw-r--r--arch/mips/pci/ops-gt64111.c2
-rw-r--r--arch/mips/pci/pci-bcm1480.c2
4 files changed, 5 insertions, 6 deletions
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 741e67c9195a..16205b587338 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o ops-titan-ht.o \
46obj-$(CONFIG_SGI_IP27) += pci-ip27.o 46obj-$(CONFIG_SGI_IP27) += pci-ip27.o
47obj-$(CONFIG_SGI_IP32) += fixup-ip32.o ops-mace.o pci-ip32.o 47obj-$(CONFIG_SGI_IP32) += fixup-ip32.o ops-mace.o pci-ip32.o
48obj-$(CONFIG_SIBYTE_SB1250) += fixup-sb1250.o pci-sb1250.o 48obj-$(CONFIG_SIBYTE_SB1250) += fixup-sb1250.o pci-sb1250.o
49obj-$(CONFIG_SIBYTE_BCM112X) += fixup-sb1250.o pci-sb1250.o
49obj-$(CONFIG_SIBYTE_BCM1x80) += pci-bcm1480.o pci-bcm1480ht.o 50obj-$(CONFIG_SIBYTE_BCM1x80) += pci-bcm1480.o pci-bcm1480ht.o
50obj-$(CONFIG_SNI_RM200_PCI) += fixup-sni.o ops-sni.o 51obj-$(CONFIG_SNI_RM200_PCI) += fixup-sni.o ops-sni.o
51obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o 52obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c
index 909292f50d06..75a01e764898 100644
--- a/arch/mips/pci/fixup-cobalt.c
+++ b/arch/mips/pci/fixup-cobalt.c
@@ -17,7 +17,7 @@
17#include <asm/io.h> 17#include <asm/io.h>
18#include <asm/gt64120.h> 18#include <asm/gt64120.h>
19 19
20#include <asm/cobalt/cobalt.h> 20#include <asm/mach-cobalt/cobalt.h>
21 21
22extern int cobalt_board_id; 22extern int cobalt_board_id;
23 23
@@ -52,7 +52,7 @@ static void qube_raq_via_bmIDE_fixup(struct pci_dev *dev)
52 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lt); 52 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lt);
53 if (lt < 64) 53 if (lt < 64)
54 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); 54 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
55 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7); 55 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 8);
56} 56}
57 57
58DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, 58DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
@@ -69,7 +69,7 @@ static void qube_raq_galileo_fixup(struct pci_dev *dev)
69 * host bridge. 69 * host bridge.
70 */ 70 */
71 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); 71 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
72 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7); 72 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 8);
73 73
74 /* 74 /*
75 * The code described by the comment below has been removed 75 * The code described by the comment below has been removed
diff --git a/arch/mips/pci/ops-gt64111.c b/arch/mips/pci/ops-gt64111.c
index c1807934768d..13de45940b19 100644
--- a/arch/mips/pci/ops-gt64111.c
+++ b/arch/mips/pci/ops-gt64111.c
@@ -15,7 +15,7 @@
15#include <asm/io.h> 15#include <asm/io.h>
16#include <asm/gt64120.h> 16#include <asm/gt64120.h>
17 17
18#include <asm/cobalt/cobalt.h> 18#include <asm/mach-cobalt/cobalt.h>
19 19
20/* 20/*
21 * Device 31 on the GT64111 is used to generate PCI special 21 * Device 31 on the GT64111 is used to generate PCI special
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index f194b4e4f86a..ca975e7d32ff 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -234,11 +234,9 @@ static int __init bcm1480_pcibios_init(void)
234 234
235 /* turn on ExpMemEn */ 235 /* turn on ExpMemEn */
236 cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40)); 236 cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40));
237 printk("PCIFeatureCtrl = %x\n", cmdreg);
238 WRITECFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40), 237 WRITECFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40),
239 cmdreg | 0x10); 238 cmdreg | 0x10);
240 cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40)); 239 cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40));
241 printk("PCIFeatureCtrl = %x\n", cmdreg);
242 240
243 /* 241 /*
244 * Establish mappings in KSEG2 (kernel virtual) to PCI I/O 242 * Establish mappings in KSEG2 (kernel virtual) to PCI I/O