diff options
Diffstat (limited to 'arch/mips/pci')
-rw-r--r-- | arch/mips/pci/fixup-atlas.c | 6 | ||||
-rw-r--r-- | arch/mips/pci/ops-au1000.c | 2 | ||||
-rw-r--r-- | arch/mips/pci/ops-sni.c | 22 |
3 files changed, 15 insertions, 15 deletions
diff --git a/arch/mips/pci/fixup-atlas.c b/arch/mips/pci/fixup-atlas.c index 45224fd2c7ba..506e883a8c71 100644 --- a/arch/mips/pci/fixup-atlas.c +++ b/arch/mips/pci/fixup-atlas.c | |||
@@ -77,12 +77,12 @@ int pcibios_plat_dev_init(struct pci_dev *dev) | |||
77 | * code, but it is better than nothing... | 77 | * code, but it is better than nothing... |
78 | */ | 78 | */ |
79 | 79 | ||
80 | static void atlas_saa9730_base_fixup (struct pci_dev *pdev) | 80 | static void atlas_saa9730_base_fixup(struct pci_dev *pdev) |
81 | { | 81 | { |
82 | extern void *saa9730_base; | 82 | extern void *saa9730_base; |
83 | if (pdev->bus == 0 && PCI_SLOT(pdev->devfn) == 19) | 83 | if (pdev->bus == 0 && PCI_SLOT(pdev->devfn) == 19) |
84 | (void) pci_read_config_dword (pdev, 0x14, (u32 *)&saa9730_base); | 84 | (void) pci_read_config_dword(pdev, 0x14, (u32 *)&saa9730_base); |
85 | printk ("saa9730_base = %x\n", saa9730_base); | 85 | printk("saa9730_base = %x\n", saa9730_base); |
86 | } | 86 | } |
87 | 87 | ||
88 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730, | 88 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730, |
diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c index 7932dfe5eb9b..6b29904acf45 100644 --- a/arch/mips/pci/ops-au1000.c +++ b/arch/mips/pci/ops-au1000.c | |||
@@ -112,7 +112,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus, | |||
112 | first_cfg = 0; | 112 | first_cfg = 0; |
113 | pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP); | 113 | pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP); |
114 | if (!pci_cfg_vm) | 114 | if (!pci_cfg_vm) |
115 | panic (KERN_ERR "PCI unable to get vm area\n"); | 115 | panic(KERN_ERR "PCI unable to get vm area\n"); |
116 | pci_cfg_wired_entry = read_c0_wired(); | 116 | pci_cfg_wired_entry = read_c0_wired(); |
117 | add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K); | 117 | add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K); |
118 | last_entryLo0 = last_entryLo1 = 0xffffffff; | 118 | last_entryLo0 = last_entryLo1 = 0xffffffff; |
diff --git a/arch/mips/pci/ops-sni.c b/arch/mips/pci/ops-sni.c index fa2d2c60f797..97ed25b92edf 100644 --- a/arch/mips/pci/ops-sni.c +++ b/arch/mips/pci/ops-sni.c | |||
@@ -70,13 +70,13 @@ static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg, | |||
70 | 70 | ||
71 | switch (size) { | 71 | switch (size) { |
72 | case 1: | 72 | case 1: |
73 | outb (val, PCIMT_CONFIG_DATA + (reg & 3)); | 73 | outb(val, PCIMT_CONFIG_DATA + (reg & 3)); |
74 | break; | 74 | break; |
75 | case 2: | 75 | case 2: |
76 | outw (val, PCIMT_CONFIG_DATA + (reg & 2)); | 76 | outw(val, PCIMT_CONFIG_DATA + (reg & 2)); |
77 | break; | 77 | break; |
78 | case 4: | 78 | case 4: |
79 | outl (val, PCIMT_CONFIG_DATA); | 79 | outl(val, PCIMT_CONFIG_DATA); |
80 | break; | 80 | break; |
81 | } | 81 | } |
82 | 82 | ||
@@ -93,7 +93,7 @@ static int pcit_set_config_address(unsigned int busno, unsigned int devfn, int r | |||
93 | if ((devfn > 255) || (reg > 255) || (busno > 255)) | 93 | if ((devfn > 255) || (reg > 255) || (busno > 255)) |
94 | return PCIBIOS_BAD_REGISTER_NUMBER; | 94 | return PCIBIOS_BAD_REGISTER_NUMBER; |
95 | 95 | ||
96 | outl ((1 << 31) | ((busno & 0xff) << 16) | ((devfn & 0xff) << 8) | (reg & 0xfc), 0xcf8); | 96 | outl((1 << 31) | ((busno & 0xff) << 16) | ((devfn & 0xff) << 8) | (reg & 0xfc), 0xcf8); |
97 | return PCIBIOS_SUCCESSFUL; | 97 | return PCIBIOS_SUCCESSFUL; |
98 | } | 98 | } |
99 | 99 | ||
@@ -108,12 +108,12 @@ static int pcit_read(struct pci_bus *bus, unsigned int devfn, int reg, | |||
108 | * we don't do it, we will get a data bus error | 108 | * we don't do it, we will get a data bus error |
109 | */ | 109 | */ |
110 | if (bus->number == 0) { | 110 | if (bus->number == 0) { |
111 | pcit_set_config_address (0, 0, 0x68); | 111 | pcit_set_config_address(0, 0, 0x68); |
112 | outl (inl (0xcfc) | 0xc0000000, 0xcfc); | 112 | outl(inl(0xcfc) | 0xc0000000, 0xcfc); |
113 | if ((res = pcit_set_config_address(0, devfn, 0))) | 113 | if ((res = pcit_set_config_address(0, devfn, 0))) |
114 | return res; | 114 | return res; |
115 | outl (0xffffffff, 0xcfc); | 115 | outl(0xffffffff, 0xcfc); |
116 | pcit_set_config_address (0, 0, 0x68); | 116 | pcit_set_config_address(0, 0, 0x68); |
117 | if (inl(0xcfc) & 0x100000) | 117 | if (inl(0xcfc) & 0x100000) |
118 | return PCIBIOS_DEVICE_NOT_FOUND; | 118 | return PCIBIOS_DEVICE_NOT_FOUND; |
119 | } | 119 | } |
@@ -144,13 +144,13 @@ static int pcit_write(struct pci_bus *bus, unsigned int devfn, int reg, | |||
144 | 144 | ||
145 | switch (size) { | 145 | switch (size) { |
146 | case 1: | 146 | case 1: |
147 | outb (val, PCIMT_CONFIG_DATA + (reg & 3)); | 147 | outb(val, PCIMT_CONFIG_DATA + (reg & 3)); |
148 | break; | 148 | break; |
149 | case 2: | 149 | case 2: |
150 | outw (val, PCIMT_CONFIG_DATA + (reg & 2)); | 150 | outw(val, PCIMT_CONFIG_DATA + (reg & 2)); |
151 | break; | 151 | break; |
152 | case 4: | 152 | case 4: |
153 | outl (val, PCIMT_CONFIG_DATA); | 153 | outl(val, PCIMT_CONFIG_DATA); |
154 | break; | 154 | break; |
155 | } | 155 | } |
156 | 156 | ||