diff options
Diffstat (limited to 'arch/mips/pci/ops-titan.c')
-rw-r--r-- | arch/mips/pci/ops-titan.c | 25 |
1 files changed, 18 insertions, 7 deletions
diff --git a/arch/mips/pci/ops-titan.c b/arch/mips/pci/ops-titan.c index 233ec6f2054d..ebf8fc40e9b2 100644 --- a/arch/mips/pci/ops-titan.c +++ b/arch/mips/pci/ops-titan.c | |||
@@ -26,8 +26,19 @@ | |||
26 | #include <linux/pci.h> | 26 | #include <linux/pci.h> |
27 | #include <linux/kernel.h> | 27 | #include <linux/kernel.h> |
28 | 28 | ||
29 | #include <asm/titan_dep.h> | 29 | #include <asm/pci.h> |
30 | #include <asm/io.h> | ||
31 | #include <asm/rm9k-ocd.h> | ||
30 | 32 | ||
33 | /* | ||
34 | * PCI specific defines | ||
35 | */ | ||
36 | #define TITAN_PCI_0_CONFIG_ADDRESS 0x780 | ||
37 | #define TITAN_PCI_0_CONFIG_DATA 0x784 | ||
38 | |||
39 | /* | ||
40 | * Titan PCI Config Read Byte | ||
41 | */ | ||
31 | static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg, | 42 | static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg, |
32 | int size, u32 * val) | 43 | int size, u32 * val) |
33 | { | 44 | { |
@@ -43,8 +54,8 @@ static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg, | |||
43 | 54 | ||
44 | 55 | ||
45 | /* start the configuration cycle */ | 56 | /* start the configuration cycle */ |
46 | TITAN_WRITE(TITAN_PCI_0_CONFIG_ADDRESS, address); | 57 | ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS); |
47 | tmp = TITAN_READ(TITAN_PCI_0_CONFIG_DATA) >> ((reg & 3) << 3); | 58 | tmp = ocd_readl(TITAN_PCI_0_CONFIG_DATA) >> ((reg & 3) << 3); |
48 | 59 | ||
49 | switch (size) { | 60 | switch (size) { |
50 | case 1: | 61 | case 1: |
@@ -71,20 +82,20 @@ static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg, | |||
71 | (reg & 0xfc) | 0x80000000; | 82 | (reg & 0xfc) | 0x80000000; |
72 | 83 | ||
73 | /* start the configuration cycle */ | 84 | /* start the configuration cycle */ |
74 | TITAN_WRITE(TITAN_PCI_0_CONFIG_ADDRESS, address); | 85 | ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS); |
75 | 86 | ||
76 | /* write the data */ | 87 | /* write the data */ |
77 | switch (size) { | 88 | switch (size) { |
78 | case 1: | 89 | case 1: |
79 | TITAN_WRITE_8(TITAN_PCI_0_CONFIG_DATA + (~reg & 0x3), val); | 90 | ocd_writeb(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x3)); |
80 | break; | 91 | break; |
81 | 92 | ||
82 | case 2: | 93 | case 2: |
83 | TITAN_WRITE_16(TITAN_PCI_0_CONFIG_DATA + (~reg & 0x2), val); | 94 | ocd_writew(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x2)); |
84 | break; | 95 | break; |
85 | 96 | ||
86 | case 4: | 97 | case 4: |
87 | TITAN_WRITE(TITAN_PCI_0_CONFIG_DATA, val); | 98 | ocd_writel(val, TITAN_PCI_0_CONFIG_DATA); |
88 | break; | 99 | break; |
89 | } | 100 | } |
90 | 101 | ||