diff options
Diffstat (limited to 'arch/mips/pci/ops-msc.c')
-rw-r--r-- | arch/mips/pci/ops-msc.c | 31 |
1 files changed, 5 insertions, 26 deletions
diff --git a/arch/mips/pci/ops-msc.c b/arch/mips/pci/ops-msc.c index 7bc099643a9d..5d9fbb0f4670 100644 --- a/arch/mips/pci/ops-msc.c +++ b/arch/mips/pci/ops-msc.c | |||
@@ -21,7 +21,6 @@ | |||
21 | * MIPS boards specific PCI support. | 21 | * MIPS boards specific PCI support. |
22 | * | 22 | * |
23 | */ | 23 | */ |
24 | #include <linux/config.h> | ||
25 | #include <linux/types.h> | 24 | #include <linux/types.h> |
26 | #include <linux/pci.h> | 25 | #include <linux/pci.h> |
27 | #include <linux/kernel.h> | 26 | #include <linux/kernel.h> |
@@ -49,34 +48,17 @@ static int msc_pcibios_config_access(unsigned char access_type, | |||
49 | struct pci_bus *bus, unsigned int devfn, int where, u32 * data) | 48 | struct pci_bus *bus, unsigned int devfn, int where, u32 * data) |
50 | { | 49 | { |
51 | unsigned char busnum = bus->number; | 50 | unsigned char busnum = bus->number; |
52 | unsigned char type; | ||
53 | u32 intr; | 51 | u32 intr; |
54 | 52 | ||
55 | #ifdef CONFIG_MIPS_BOARDS_GEN | ||
56 | if ((busnum == 0) && (PCI_SLOT(devfn) == 17)) { | ||
57 | /* MIPS Core boards have SOCit connected as device 17 */ | ||
58 | return -1; | ||
59 | } | ||
60 | #endif | ||
61 | |||
62 | /* Clear status register bits. */ | 53 | /* Clear status register bits. */ |
63 | MSC_WRITE(MSC01_PCI_INTSTAT, | 54 | MSC_WRITE(MSC01_PCI_INTSTAT, |
64 | (MSC01_PCI_INTCFG_MA_BIT | MSC01_PCI_INTCFG_TA_BIT)); | 55 | (MSC01_PCI_INTCFG_MA_BIT | MSC01_PCI_INTCFG_TA_BIT)); |
65 | 56 | ||
66 | /* Setup address */ | ||
67 | if (busnum == 0) | ||
68 | type = 0; /* Type 0 */ | ||
69 | else | ||
70 | type = 1; /* Type 1 */ | ||
71 | |||
72 | MSC_WRITE(MSC01_PCI_CFGADDR, | 57 | MSC_WRITE(MSC01_PCI_CFGADDR, |
73 | ((busnum << MSC01_PCI_CFGADDR_BNUM_SHF) | | 58 | ((busnum << MSC01_PCI_CFGADDR_BNUM_SHF) | |
74 | (PCI_SLOT(devfn) << MSC01_PCI_CFGADDR_DNUM_SHF) | 59 | (PCI_SLOT(devfn) << MSC01_PCI_CFGADDR_DNUM_SHF) | |
75 | | (PCI_FUNC(devfn) << | 60 | (PCI_FUNC(devfn) << MSC01_PCI_CFGADDR_FNUM_SHF) | |
76 | MSC01_PCI_CFGADDR_FNUM_SHF) | ((where / | 61 | ((where / 4) << MSC01_PCI_CFGADDR_RNUM_SHF))); |
77 | 4) << | ||
78 | MSC01_PCI_CFGADDR_RNUM_SHF) | ||
79 | | (type))); | ||
80 | 62 | ||
81 | /* Perform access */ | 63 | /* Perform access */ |
82 | if (access_type == PCI_ACCESS_WRITE) | 64 | if (access_type == PCI_ACCESS_WRITE) |
@@ -86,15 +68,12 @@ static int msc_pcibios_config_access(unsigned char access_type, | |||
86 | 68 | ||
87 | /* Detect Master/Target abort */ | 69 | /* Detect Master/Target abort */ |
88 | MSC_READ(MSC01_PCI_INTSTAT, intr); | 70 | MSC_READ(MSC01_PCI_INTSTAT, intr); |
89 | if (intr & (MSC01_PCI_INTCFG_MA_BIT | | 71 | if (intr & (MSC01_PCI_INTCFG_MA_BIT | MSC01_PCI_INTCFG_TA_BIT)) { |
90 | MSC01_PCI_INTCFG_TA_BIT)) { | ||
91 | /* Error occurred */ | 72 | /* Error occurred */ |
92 | 73 | ||
93 | /* Clear bits */ | 74 | /* Clear bits */ |
94 | MSC_READ(MSC01_PCI_INTSTAT, intr); | ||
95 | MSC_WRITE(MSC01_PCI_INTSTAT, | 75 | MSC_WRITE(MSC01_PCI_INTSTAT, |
96 | (MSC01_PCI_INTCFG_MA_BIT | | 76 | (MSC01_PCI_INTCFG_MA_BIT | MSC01_PCI_INTCFG_TA_BIT)); |
97 | MSC01_PCI_INTCFG_TA_BIT)); | ||
98 | 77 | ||
99 | return -1; | 78 | return -1; |
100 | } | 79 | } |