diff options
Diffstat (limited to 'arch/mips/pci/ops-fuloong2e.c')
-rw-r--r-- | arch/mips/pci/ops-fuloong2e.c | 154 |
1 files changed, 154 insertions, 0 deletions
diff --git a/arch/mips/pci/ops-fuloong2e.c b/arch/mips/pci/ops-fuloong2e.c new file mode 100644 index 000000000000..171f65c99ca1 --- /dev/null +++ b/arch/mips/pci/ops-fuloong2e.c | |||
@@ -0,0 +1,154 @@ | |||
1 | /* | ||
2 | * fuloong2e specific PCI support. | ||
3 | * | ||
4 | * Copyright (C) 1999, 2000, 2004 MIPS Technologies, Inc. | ||
5 | * All rights reserved. | ||
6 | * Authors: Carsten Langgaard <carstenl@mips.com> | ||
7 | * Maciej W. Rozycki <macro@mips.com> | ||
8 | * | ||
9 | * Copyright (C) 2009 Lemote Inc. | ||
10 | * Author: Wu Zhangjin <wuzj@lemote.com> | ||
11 | * | ||
12 | * This program is free software; you can distribute it and/or modify it | ||
13 | * under the terms of the GNU General Public License (Version 2) as | ||
14 | * published by the Free Software Foundation. | ||
15 | */ | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/pci.h> | ||
18 | #include <linux/kernel.h> | ||
19 | #include <linux/init.h> | ||
20 | |||
21 | #include <loongson.h> | ||
22 | |||
23 | #define PCI_ACCESS_READ 0 | ||
24 | #define PCI_ACCESS_WRITE 1 | ||
25 | |||
26 | #define CFG_SPACE_REG(offset) \ | ||
27 | (void *)CKSEG1ADDR(LOONGSON_PCICFG_BASE | (offset)) | ||
28 | #define ID_SEL_BEGIN 11 | ||
29 | #define MAX_DEV_NUM (31 - ID_SEL_BEGIN) | ||
30 | |||
31 | |||
32 | static int loongson_pcibios_config_access(unsigned char access_type, | ||
33 | struct pci_bus *bus, | ||
34 | unsigned int devfn, int where, | ||
35 | u32 *data) | ||
36 | { | ||
37 | u32 busnum = bus->number; | ||
38 | u32 addr, type; | ||
39 | u32 dummy; | ||
40 | void *addrp; | ||
41 | int device = PCI_SLOT(devfn); | ||
42 | int function = PCI_FUNC(devfn); | ||
43 | int reg = where & ~3; | ||
44 | |||
45 | if (busnum == 0) { | ||
46 | /* Type 0 configuration for onboard PCI bus */ | ||
47 | if (device > MAX_DEV_NUM) | ||
48 | return -1; | ||
49 | |||
50 | addr = (1 << (device + ID_SEL_BEGIN)) | (function << 8) | reg; | ||
51 | type = 0; | ||
52 | } else { | ||
53 | /* Type 1 configuration for offboard PCI bus */ | ||
54 | addr = (busnum << 16) | (device << 11) | (function << 8) | reg; | ||
55 | type = 0x10000; | ||
56 | } | ||
57 | |||
58 | /* Clear aborts */ | ||
59 | LOONGSON_PCICMD |= LOONGSON_PCICMD_MABORT_CLR | \ | ||
60 | LOONGSON_PCICMD_MTABORT_CLR; | ||
61 | |||
62 | LOONGSON_PCIMAP_CFG = (addr >> 16) | type; | ||
63 | |||
64 | /* Flush Bonito register block */ | ||
65 | dummy = LOONGSON_PCIMAP_CFG; | ||
66 | mmiowb(); | ||
67 | |||
68 | addrp = CFG_SPACE_REG(addr & 0xffff); | ||
69 | if (access_type == PCI_ACCESS_WRITE) | ||
70 | writel(cpu_to_le32(*data), addrp); | ||
71 | else | ||
72 | *data = le32_to_cpu(readl(addrp)); | ||
73 | |||
74 | /* Detect Master/Target abort */ | ||
75 | if (LOONGSON_PCICMD & (LOONGSON_PCICMD_MABORT_CLR | | ||
76 | LOONGSON_PCICMD_MTABORT_CLR)) { | ||
77 | /* Error occurred */ | ||
78 | |||
79 | /* Clear bits */ | ||
80 | LOONGSON_PCICMD |= (LOONGSON_PCICMD_MABORT_CLR | | ||
81 | LOONGSON_PCICMD_MTABORT_CLR); | ||
82 | |||
83 | return -1; | ||
84 | } | ||
85 | |||
86 | return 0; | ||
87 | |||
88 | } | ||
89 | |||
90 | |||
91 | /* | ||
92 | * We can't address 8 and 16 bit words directly. Instead we have to | ||
93 | * read/write a 32bit word and mask/modify the data we actually want. | ||
94 | */ | ||
95 | static int loongson_pcibios_read(struct pci_bus *bus, unsigned int devfn, | ||
96 | int where, int size, u32 *val) | ||
97 | { | ||
98 | u32 data = 0; | ||
99 | |||
100 | if ((size == 2) && (where & 1)) | ||
101 | return PCIBIOS_BAD_REGISTER_NUMBER; | ||
102 | else if ((size == 4) && (where & 3)) | ||
103 | return PCIBIOS_BAD_REGISTER_NUMBER; | ||
104 | |||
105 | if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, | ||
106 | &data)) | ||
107 | return -1; | ||
108 | |||
109 | if (size == 1) | ||
110 | *val = (data >> ((where & 3) << 3)) & 0xff; | ||
111 | else if (size == 2) | ||
112 | *val = (data >> ((where & 3) << 3)) & 0xffff; | ||
113 | else | ||
114 | *val = data; | ||
115 | |||
116 | return PCIBIOS_SUCCESSFUL; | ||
117 | } | ||
118 | |||
119 | static int loongson_pcibios_write(struct pci_bus *bus, unsigned int devfn, | ||
120 | int where, int size, u32 val) | ||
121 | { | ||
122 | u32 data = 0; | ||
123 | |||
124 | if ((size == 2) && (where & 1)) | ||
125 | return PCIBIOS_BAD_REGISTER_NUMBER; | ||
126 | else if ((size == 4) && (where & 3)) | ||
127 | return PCIBIOS_BAD_REGISTER_NUMBER; | ||
128 | |||
129 | if (size == 4) | ||
130 | data = val; | ||
131 | else { | ||
132 | if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, | ||
133 | where, &data)) | ||
134 | return -1; | ||
135 | |||
136 | if (size == 1) | ||
137 | data = (data & ~(0xff << ((where & 3) << 3))) | | ||
138 | (val << ((where & 3) << 3)); | ||
139 | else if (size == 2) | ||
140 | data = (data & ~(0xffff << ((where & 3) << 3))) | | ||
141 | (val << ((where & 3) << 3)); | ||
142 | } | ||
143 | |||
144 | if (loongson_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where, | ||
145 | &data)) | ||
146 | return -1; | ||
147 | |||
148 | return PCIBIOS_SUCCESSFUL; | ||
149 | } | ||
150 | |||
151 | struct pci_ops loongson_pci_ops = { | ||
152 | .read = loongson_pcibios_read, | ||
153 | .write = loongson_pcibios_write | ||
154 | }; | ||