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-rw-r--r--arch/mips/pci/fixup-cobalt.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c
index 909292f50d06..75a01e764898 100644
--- a/arch/mips/pci/fixup-cobalt.c
+++ b/arch/mips/pci/fixup-cobalt.c
@@ -17,7 +17,7 @@
17#include <asm/io.h> 17#include <asm/io.h>
18#include <asm/gt64120.h> 18#include <asm/gt64120.h>
19 19
20#include <asm/cobalt/cobalt.h> 20#include <asm/mach-cobalt/cobalt.h>
21 21
22extern int cobalt_board_id; 22extern int cobalt_board_id;
23 23
@@ -52,7 +52,7 @@ static void qube_raq_via_bmIDE_fixup(struct pci_dev *dev)
52 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lt); 52 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lt);
53 if (lt < 64) 53 if (lt < 64)
54 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); 54 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
55 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7); 55 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 8);
56} 56}
57 57
58DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, 58DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
@@ -69,7 +69,7 @@ static void qube_raq_galileo_fixup(struct pci_dev *dev)
69 * host bridge. 69 * host bridge.
70 */ 70 */
71 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); 71 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
72 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7); 72 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 8);
73 73
74 /* 74 /*
75 * The code described by the comment below has been removed 75 * The code described by the comment below has been removed