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Diffstat (limited to 'arch/mips/pci/fixup-cobalt.c')
-rw-r--r--arch/mips/pci/fixup-cobalt.c40
1 files changed, 29 insertions, 11 deletions
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c
index 76b4f0ffb1e5..f7df1142912b 100644
--- a/arch/mips/pci/fixup-cobalt.c
+++ b/arch/mips/pci/fixup-cobalt.c
@@ -18,6 +18,24 @@
18#include <asm/gt64120.h> 18#include <asm/gt64120.h>
19 19
20#include <cobalt.h> 20#include <cobalt.h>
21#include <irq.h>
22
23/*
24 * PCI slot numbers
25 */
26#define COBALT_PCICONF_CPU 0x06
27#define COBALT_PCICONF_ETH0 0x07
28#define COBALT_PCICONF_RAQSCSI 0x08
29#define COBALT_PCICONF_VIA 0x09
30#define COBALT_PCICONF_PCISLOT 0x0A
31#define COBALT_PCICONF_ETH1 0x0C
32
33/*
34 * The Cobalt board ID information. The boards have an ID number wired
35 * into the VIA that is available in the high nibble of register 94.
36 */
37#define VIA_COBALT_BRD_ID_REG 0x94
38#define VIA_COBALT_BRD_REG_to_ID(reg) ((unsigned char)(reg) >> 4)
21 39
22static void qube_raq_galileo_early_fixup(struct pci_dev *dev) 40static void qube_raq_galileo_early_fixup(struct pci_dev *dev)
23{ 41{
@@ -132,29 +150,29 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0,
132 150
133static char irq_tab_qube1[] __initdata = { 151static char irq_tab_qube1[] __initdata = {
134 [COBALT_PCICONF_CPU] = 0, 152 [COBALT_PCICONF_CPU] = 0,
135 [COBALT_PCICONF_ETH0] = COBALT_QUBE1_ETH0_IRQ, 153 [COBALT_PCICONF_ETH0] = QUBE1_ETH0_IRQ,
136 [COBALT_PCICONF_RAQSCSI] = COBALT_SCSI_IRQ, 154 [COBALT_PCICONF_RAQSCSI] = SCSI_IRQ,
137 [COBALT_PCICONF_VIA] = 0, 155 [COBALT_PCICONF_VIA] = 0,
138 [COBALT_PCICONF_PCISLOT] = COBALT_QUBE_SLOT_IRQ, 156 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
139 [COBALT_PCICONF_ETH1] = 0 157 [COBALT_PCICONF_ETH1] = 0
140}; 158};
141 159
142static char irq_tab_cobalt[] __initdata = { 160static char irq_tab_cobalt[] __initdata = {
143 [COBALT_PCICONF_CPU] = 0, 161 [COBALT_PCICONF_CPU] = 0,
144 [COBALT_PCICONF_ETH0] = COBALT_ETH0_IRQ, 162 [COBALT_PCICONF_ETH0] = ETH0_IRQ,
145 [COBALT_PCICONF_RAQSCSI] = COBALT_SCSI_IRQ, 163 [COBALT_PCICONF_RAQSCSI] = SCSI_IRQ,
146 [COBALT_PCICONF_VIA] = 0, 164 [COBALT_PCICONF_VIA] = 0,
147 [COBALT_PCICONF_PCISLOT] = COBALT_QUBE_SLOT_IRQ, 165 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
148 [COBALT_PCICONF_ETH1] = COBALT_ETH1_IRQ 166 [COBALT_PCICONF_ETH1] = ETH1_IRQ
149}; 167};
150 168
151static char irq_tab_raq2[] __initdata = { 169static char irq_tab_raq2[] __initdata = {
152 [COBALT_PCICONF_CPU] = 0, 170 [COBALT_PCICONF_CPU] = 0,
153 [COBALT_PCICONF_ETH0] = COBALT_ETH0_IRQ, 171 [COBALT_PCICONF_ETH0] = ETH0_IRQ,
154 [COBALT_PCICONF_RAQSCSI] = COBALT_RAQ_SCSI_IRQ, 172 [COBALT_PCICONF_RAQSCSI] = RAQ2_SCSI_IRQ,
155 [COBALT_PCICONF_VIA] = 0, 173 [COBALT_PCICONF_VIA] = 0,
156 [COBALT_PCICONF_PCISLOT] = COBALT_QUBE_SLOT_IRQ, 174 [COBALT_PCICONF_PCISLOT] = PCISLOT_IRQ,
157 [COBALT_PCICONF_ETH1] = COBALT_ETH1_IRQ 175 [COBALT_PCICONF_ETH1] = ETH1_IRQ
158}; 176};
159 177
160int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 178int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)