diff options
Diffstat (limited to 'arch/mips/pci/fixup-cobalt.c')
-rw-r--r-- | arch/mips/pci/fixup-cobalt.c | 25 |
1 files changed, 22 insertions, 3 deletions
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c index 7d5f6bbf7a9d..d57ffd7242ca 100644 --- a/arch/mips/pci/fixup-cobalt.c +++ b/arch/mips/pci/fixup-cobalt.c | |||
@@ -17,9 +17,7 @@ | |||
17 | #include <asm/io.h> | 17 | #include <asm/io.h> |
18 | #include <asm/gt64120.h> | 18 | #include <asm/gt64120.h> |
19 | 19 | ||
20 | #include <asm/mach-cobalt/cobalt.h> | 20 | #include <cobalt.h> |
21 | |||
22 | extern int cobalt_board_id; | ||
23 | 21 | ||
24 | static void qube_raq_galileo_early_fixup(struct pci_dev *dev) | 22 | static void qube_raq_galileo_early_fixup(struct pci_dev *dev) |
25 | { | 23 | { |
@@ -115,6 +113,27 @@ static void qube_raq_galileo_fixup(struct pci_dev *dev) | |||
115 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111, | 113 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111, |
116 | qube_raq_galileo_fixup); | 114 | qube_raq_galileo_fixup); |
117 | 115 | ||
116 | int cobalt_board_id; | ||
117 | |||
118 | static void qube_raq_via_board_id_fixup(struct pci_dev *dev) | ||
119 | { | ||
120 | u8 id; | ||
121 | int retval; | ||
122 | |||
123 | retval = pci_read_config_byte(dev, VIA_COBALT_BRD_ID_REG, &id); | ||
124 | if (retval) { | ||
125 | panic("Cannot read board ID"); | ||
126 | return; | ||
127 | } | ||
128 | |||
129 | cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(id); | ||
130 | |||
131 | printk(KERN_INFO "Cobalt board ID: %d\n", cobalt_board_id); | ||
132 | } | ||
133 | |||
134 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0, | ||
135 | qube_raq_via_board_id_fixup); | ||
136 | |||
118 | static char irq_tab_qube1[] __initdata = { | 137 | static char irq_tab_qube1[] __initdata = { |
119 | [COBALT_PCICONF_CPU] = 0, | 138 | [COBALT_PCICONF_CPU] = 0, |
120 | [COBALT_PCICONF_ETH0] = COBALT_QUBE1_ETH0_IRQ, | 139 | [COBALT_PCICONF_ETH0] = COBALT_QUBE1_ETH0_IRQ, |